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GET /api/patches/55678/?format=api
{ "id": 55678, "url": "http://patches.dpdk.org/api/patches/55678/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-3-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190630180609.36705-3-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190630180609.36705-3-jerinj@marvell.com", "date": "2019-06-30T18:05:14", "name": "[v2,02/57] net/octeontx2: add ethdev probe and remove", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e51e4a2aa864e974096d104ff59c371c0e5a4761", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-3-jerinj@marvell.com/mbox/", "series": [ { "id": 5236, "url": "http://patches.dpdk.org/api/series/5236/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5236", "date": "2019-06-30T18:05:12", "name": "OCTEON TX2 Ethdev driver", "version": 2, "mbox": "http://patches.dpdk.org/series/5236/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55678/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/55678/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8BADE1B9A5;\n\tSun, 30 Jun 2019 20:06:53 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 647041B965\n\tfor <dev@dpdk.org>; Sun, 30 Jun 2019 20:06:41 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5UI640p016301; Sun, 30 Jun 2019 11:06:40 -0700", "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2te7gm3y70-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 30 Jun 2019 11:06:40 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 30 Jun 2019 11:06:38 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 30 Jun 2019 11:06:39 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 3609B3F703F;\n\tSun, 30 Jun 2019 11:06:36 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : subject\n\t: date : message-id : in-reply-to : references : mime-version :\n\tcontent-transfer-encoding : content-type; s=pfpt0818;\n\tbh=jQsd30Vtwt5Gg7E5CPiupqRNPrFY4Rngb6ArUrSsgAE=;\n\tb=VKgHj8uZViMAtCuEQpAecdrN4+bTXgdcLI/s2ntu6bh00Hr+Tf68OOWuMj6eMdOxKBw1\n\tU16QVdZRvyq3V3ni5YOTSxwNOxkffISFwaM8RBIa0pCDW9iWkDVZ2ROFnb5R7dJsj5gg\n\tDScGIe9uUaSJSYc+RARVuIfBaN/YeE4ZEmEBFDI/oIs5vV8tvJQkQYa0xiYyQz70Dw1u\n\tY9OIxDhZwJQ+ylTfT+zQCmKb9KIwamgkL/1F+SnHch+Rl4cmvc6XzlSBxgSwHpvwgYb7\n\tpUmySDLkLuQgcbgIV4tZquY3bJl4vtR/DrUilhFa689dfRTh/aaMDugt9fWVVc7o4TQw\n\tMQ== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>,\n\t\"Anatoly Burakov\" <anatoly.burakov@intel.com>", "Date": "Sun, 30 Jun 2019 23:35:14 +0530", "Message-ID": "<20190630180609.36705-3-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190630180609.36705-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>\n\t<20190630180609.36705-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-30_08:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v2 02/57] net/octeontx2: add ethdev probe and\n\tremove", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jerin Jacob <jerinj@marvell.com>\n\nadd basic PCIe ethdev probe and remove.\n\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/net/octeontx2/Makefile | 8 ++-\n drivers/net/octeontx2/meson.build | 14 ++++-\n drivers/net/octeontx2/otx2_ethdev.c | 93 +++++++++++++++++++++++++++++\n drivers/net/octeontx2/otx2_ethdev.h | 27 +++++++++\n 4 files changed, 140 insertions(+), 2 deletions(-)\n create mode 100644 drivers/net/octeontx2/otx2_ethdev.h", "diff": "diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile\nindex 9c467352f..b3060e2dd 100644\n--- a/drivers/net/octeontx2/Makefile\n+++ b/drivers/net/octeontx2/Makefile\n@@ -15,6 +15,11 @@ CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2\n CFLAGS += -I$(RTE_SDK)/drivers/net/octeontx2\n CFLAGS += -O3\n \n+ifneq ($(CONFIG_RTE_ARCH_64),y)\n+CFLAGS += -Wno-int-to-pointer-cast\n+CFLAGS += -Wno-pointer-to-int-cast\n+endif\n+\n EXPORT_MAP := rte_pmd_octeontx2_version.map\n \n LIBABIVER := 1\n@@ -25,6 +30,7 @@ LIBABIVER := 1\n SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \\\n \totx2_ethdev.c\n \n-LDLIBS += -lrte_common_octeontx2 -lrte_mempool_octeontx2\n+LDLIBS += -lrte_common_octeontx2 -lrte_mempool_octeontx2 -lrte_eal\n+LDLIBS += -lrte_ethdev -lrte_bus_pci\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/octeontx2/meson.build b/drivers/net/octeontx2/meson.build\nindex 0d0ca32da..db375f33b 100644\n--- a/drivers/net/octeontx2/meson.build\n+++ b/drivers/net/octeontx2/meson.build\n@@ -6,4 +6,16 @@ sources = files(\n \t\t'otx2_ethdev.c',\n \t\t)\n \n-deps += ['common_octeontx2', 'mempool_octeontx2']\n+deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2']\n+\n+extra_flags = []\n+# This integrated controller runs only on a arm64 machine, remove 32bit warnings\n+if not dpdk_conf.get('RTE_ARCH_64')\n+\textra_flags += ['-Wno-int-to-pointer-cast', '-Wno-pointer-to-int-cast']\n+endif\n+\n+foreach flag: extra_flags\n+\tif cc.has_argument(flag)\n+\t\tcflags += flag\n+\tendif\n+endforeach\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex d26535dee..05fa8988e 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -1,3 +1,96 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n * Copyright(C) 2019 Marvell International Ltd.\n */\n+\n+#include <rte_ethdev_pci.h>\n+#include <rte_io.h>\n+#include <rte_malloc.h>\n+\n+#include \"otx2_ethdev.h\"\n+\n+static int\n+otx2_eth_dev_init(struct rte_eth_dev *eth_dev)\n+{\n+\tRTE_SET_USED(eth_dev);\n+\n+\treturn -ENODEV;\n+}\n+\n+static int\n+otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close)\n+{\n+\tRTE_SET_USED(eth_dev);\n+\tRTE_SET_USED(mbox_close);\n+\n+\treturn -ENODEV;\n+}\n+\n+static int\n+nix_remove(struct rte_pci_device *pci_dev)\n+{\n+\tstruct rte_eth_dev *eth_dev;\n+\tint rc;\n+\n+\teth_dev = rte_eth_dev_allocated(pci_dev->device.name);\n+\tif (eth_dev) {\n+\t\t/* Cleanup eth dev */\n+\t\trc = otx2_eth_dev_uninit(eth_dev, true);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\n+\t\trte_eth_dev_pci_release(eth_dev);\n+\t}\n+\n+\t/* Nothing to be done for secondary processes */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\treturn 0;\n+}\n+\n+static int\n+nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n+{\n+\tint rc;\n+\n+\tRTE_SET_USED(pci_drv);\n+\n+\trc = rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct otx2_eth_dev),\n+\t\t\t\t\t otx2_eth_dev_init);\n+\n+\t/* On error on secondary, recheck if port exists in primary or\n+\t * in mid of detach state.\n+\t */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY && rc)\n+\t\tif (!rte_eth_dev_allocated(pci_dev->device.name))\n+\t\t\treturn 0;\n+\treturn rc;\n+}\n+\n+static const struct rte_pci_id pci_nix_map[] = {\n+\t{\n+\t\tRTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_PF)\n+\t},\n+\t{\n+\t\tRTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_VF)\n+\t},\n+\t{\n+\t\tRTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,\n+\t\t\t PCI_DEVID_OCTEONTX2_RVU_AF_VF)\n+\t},\n+\t{\n+\t\t.vendor_id = 0,\n+\t},\n+};\n+\n+static struct rte_pci_driver pci_nix = {\n+\t.id_table = pci_nix_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA |\n+\t\t\tRTE_PCI_DRV_INTR_LSC,\n+\t.probe = nix_probe,\n+\t.remove = nix_remove,\n+};\n+\n+RTE_PMD_REGISTER_PCI(net_octeontx2, pci_nix);\n+RTE_PMD_REGISTER_PCI_TABLE(net_octeontx2, pci_nix_map);\n+RTE_PMD_REGISTER_KMOD_DEP(net_octeontx2, \"vfio-pci\");\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nnew file mode 100644\nindex 000000000..fd01a3254\n--- /dev/null\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -0,0 +1,27 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef __OTX2_ETHDEV_H__\n+#define __OTX2_ETHDEV_H__\n+\n+#include <stdint.h>\n+\n+#include <rte_common.h>\n+\n+#include \"otx2_common.h\"\n+#include \"otx2_dev.h\"\n+#include \"otx2_irq.h\"\n+#include \"otx2_mempool.h\"\n+\n+struct otx2_eth_dev {\n+\tOTX2_DEV; /* Base class */\n+} __rte_cache_aligned;\n+\n+static inline struct otx2_eth_dev *\n+otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)\n+{\n+\treturn eth_dev->data->dev_private;\n+}\n+\n+#endif /* __OTX2_ETHDEV_H__ */\n", "prefixes": [ "v2", "02/57" ] }