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GET /api/patches/55647/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 55647,
    "url": "http://patches.dpdk.org/api/patches/55647/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-43-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190628182354.228-43-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190628182354.228-43-pbhagavatula@marvell.com",
    "date": "2019-06-28T18:23:53",
    "name": "[v3,42/42] event/octeontx2: add devargs to control adapter parameters",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "42dbe94d4f1406b07895a69ef6e2831f96c599c6",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerin.jacob@caviumnetworks.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-43-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 5227,
            "url": "http://patches.dpdk.org/api/series/5227/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5227",
            "date": "2019-06-28T18:23:11",
            "name": "OCTEONTX2 event device driver",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/5227/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/55647/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/55647/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "X-BeenThere": "dev@dpdk.org",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "MIME-Version": "1.0",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"John\n\tMcNamara\" <john.mcnamara@intel.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>",
        "CC": "<dev@dpdk.org>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_08:, , signatures=0",
        "In-Reply-To": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Delivered-To": "patchwork@dpdk.org",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "X-Mailer": "git-send-email 2.17.1",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=EeQknJPAM41CobT79yUDrztaqnmxVMETt2hAnlB8Ew4=;\n\tb=aCUp33Rb0XiOBp3psRnq9ioNHdZXggLTL1Vu3Y9obOW72LAcl5n5i26K4l89JkOUml0L\n\tdlfNBklYLtjjXe1Ffuac+zT5LpV9BPBoX8JM3fKkja13FUpRg+PRBYSLf/50CPKMyxCX\n\t/WmE3OswPmt7b5fXzZTKKF/7MdEF9eBEGj/WxPCzHhGXnoGxsamC98qOd3V+YDJ+EMow\n\tpwVa9g3A4k/2tFOJJQDzGyYr7SyBq+9rh/FPh/INjw2HbNtjeNx4qukBYXFGQdEguAGw\n\tfz94sm84tVjPHu8fm+AUf+7Zc4g5m6a9ashhqze4bgZkEbL04XfHNa3lokt3etmX+Fy9\n\tPw== ",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 103131BBEB;\n\tFri, 28 Jun 2019 20:25:56 +0200 (CEST)",
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            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5SILBYw011342; Fri, 28 Jun 2019 11:25:40 -0700",
            "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2tdd77agrn-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tFri, 28 Jun 2019 11:25:40 -0700",
            "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 11:25:39 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 11:25:39 -0700",
            "from BG-LT7430.marvell.com (unknown [10.28.17.12])\n\tby maili.marvell.com (Postfix) with ESMTP id ADA753F7040;\n\tFri, 28 Jun 2019 11:25:37 -0700 (PDT)"
        ],
        "X-Original-To": "patchwork@dpdk.org",
        "Content-Type": "text/plain",
        "Message-ID": "<20190628182354.228-43-pbhagavatula@marvell.com>",
        "Content-Transfer-Encoding": "8bit",
        "X-Mailman-Version": "2.1.15",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "References": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Subject": "[dpdk-dev] [PATCH v3 42/42] event/octeontx2: add devargs to control\n\tadapter parameters",
        "Date": "Fri, 28 Jun 2019 23:53:53 +0530",
        "List-Post": "<mailto:dev@dpdk.org>",
        "Precedence": "list"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd devargs to control each event timer adapter i.e. TIM rings internal\nparameters uniquely. The following dict format is expected\n[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.\nExample:\n\n\t--dev \"0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]\"\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n doc/guides/eventdevs/octeontx2.rst       | 10 +++\n drivers/event/octeontx2/otx2_tim_evdev.c | 87 +++++++++++++++++++++++-\n drivers/event/octeontx2/otx2_tim_evdev.h | 10 +++\n 3 files changed, 106 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst\nindex baa866a1e..e5624ba23 100644\n--- a/doc/guides/eventdevs/octeontx2.rst\n+++ b/doc/guides/eventdevs/octeontx2.rst\n@@ -132,6 +132,16 @@ Runtime Config Options\n \n     --dev \"0002:0e:00.0,tim_rings_lmt=5\"\n \n+- ``TIM ring control internal parameters``\n+\n+  When using multiple TIM rings the ``tim_ring_ctl`` devargs can be used to\n+  control each TIM rings internal parameters uniquely. The following dict\n+  format is expected [ring-chnk_slots-disable_npa-stats_ena]. 0 represents\n+  default values.\n+  For Example::\n+\n+    --dev \"0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]\"\n+\n Debugging Options\n ~~~~~~~~~~~~~~~~~\n \ndiff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c\nindex c312bd541..446807606 100644\n--- a/drivers/event/octeontx2/otx2_tim_evdev.c\n+++ b/drivers/event/octeontx2/otx2_tim_evdev.c\n@@ -255,7 +255,7 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr)\n \tstruct tim_lf_alloc_req *req;\n \tstruct tim_lf_alloc_rsp *rsp;\n \tuint64_t nb_timers;\n-\tint rc;\n+\tint i, rc;\n \n \tif (dev == NULL)\n \t\treturn -ENODEV;\n@@ -304,6 +304,18 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr)\n \ttim_ring->disable_npa = dev->disable_npa;\n \ttim_ring->enable_stats = dev->enable_stats;\n \n+\tfor (i = 0; i < dev->ring_ctl_cnt ; i++) {\n+\t\tstruct otx2_tim_ctl *ring_ctl = &dev->ring_ctl_data[i];\n+\n+\t\tif (ring_ctl->ring == tim_ring->ring_id) {\n+\t\t\ttim_ring->chunk_sz = ring_ctl->chunk_slots ?\n+\t\t\t\t((uint32_t)(ring_ctl->chunk_slots + 1) *\n+\t\t\t\t OTX2_TIM_CHUNK_ALIGNMENT) : tim_ring->chunk_sz;\n+\t\t\ttim_ring->enable_stats = ring_ctl->enable_stats;\n+\t\t\ttim_ring->disable_npa = ring_ctl->disable_npa;\n+\t\t}\n+\t}\n+\n \ttim_ring->nb_chunks = nb_timers / OTX2_TIM_NB_CHUNK_SLOTS(\n \t\t\t\t\t\t\ttim_ring->chunk_sz);\n \ttim_ring->nb_chunk_slots = OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);\n@@ -528,6 +540,77 @@ otx2_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n #define OTX2_TIM_CHNK_SLOTS\t\"tim_chnk_slots\"\n #define OTX2_TIM_STATS_ENA\t\"tim_stats_ena\"\n #define OTX2_TIM_RINGS_LMT\t\"tim_rings_lmt\"\n+#define OTX2_TIM_RING_CTL\t\"tim_ring_ctl\"\n+\n+static void\n+tim_parse_ring_param(char *value, void *opaque)\n+{\n+\tstruct otx2_tim_evdev *dev = opaque;\n+\tstruct otx2_tim_ctl ring_ctl = {0};\n+\tchar *tok = strtok(value, \"-\");\n+\tuint16_t *val;\n+\n+\tval = (uint16_t *)&ring_ctl;\n+\n+\tif (!strlen(value))\n+\t\treturn;\n+\n+\twhile (tok != NULL) {\n+\t\t*val = atoi(tok);\n+\t\ttok = strtok(NULL, \"-\");\n+\t\tval++;\n+\t}\n+\n+\tif (val != (&ring_ctl.enable_stats + 1)) {\n+\t\totx2_err(\n+\t\t\"Invalid ring param expected [ring-chunk_sz-disable_npa-enable_stats]\");\n+\t\treturn;\n+\t}\n+\n+\tdev->ring_ctl_cnt++;\n+\tdev->ring_ctl_data = rte_realloc(dev->ring_ctl_data,\n+\t\t\tsizeof(struct otx2_tim_ctl), 0);\n+\tdev->ring_ctl_data[dev->ring_ctl_cnt - 1] = ring_ctl;\n+}\n+\n+static void\n+tim_parse_ring_ctl_list(const char *value, void *opaque)\n+{\n+\tchar *s = strdup(value);\n+\tchar *start = NULL;\n+\tchar *end = NULL;\n+\tchar *f = s;\n+\n+\twhile (*s) {\n+\t\tif (*s == '[')\n+\t\t\tstart = s;\n+\t\telse if (*s == ']')\n+\t\t\tend = s;\n+\n+\t\tif (start < end && *start) {\n+\t\t\t*end = 0;\n+\t\t\ttim_parse_ring_param(start + 1, opaque);\n+\t\t\tstart = end;\n+\t\t\ts = end;\n+\t\t}\n+\t\ts++;\n+\t}\n+\n+\tfree(f);\n+}\n+\n+static int\n+tim_parse_kvargs_dict(const char *key, const char *value, void *opaque)\n+{\n+\tRTE_SET_USED(key);\n+\n+\t/* Dict format [ring-chunk_sz-disable_npa-enable_stats] use '-' as ','\n+\t * isn't allowed. 0 represents default.\n+\t */\n+\ttim_parse_ring_ctl_list(value, opaque);\n+\n+\treturn 0;\n+}\n \n static void\n tim_parse_devargs(struct rte_devargs *devargs, struct otx2_tim_evdev *dev)\n@@ -549,6 +632,8 @@ tim_parse_devargs(struct rte_devargs *devargs, struct otx2_tim_evdev *dev)\n \t\t\t   &dev->enable_stats);\n \trte_kvargs_process(kvlist, OTX2_TIM_RINGS_LMT, &parse_kvargs_value,\n \t\t\t   &dev->min_ring_cnt);\n+\trte_kvargs_process(kvlist, OTX2_TIM_RING_CTL,\n+\t\t\t   &tim_parse_kvargs_dict, &dev);\n }\n \n void\ndiff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h\nindex 5af724ef9..eec0189c1 100644\n--- a/drivers/event/octeontx2/otx2_tim_evdev.h\n+++ b/drivers/event/octeontx2/otx2_tim_evdev.h\n@@ -111,6 +111,13 @@ struct otx2_tim_ent {\n \tuint64_t wqe;\n } __rte_packed;\n \n+struct otx2_tim_ctl {\n+\tuint16_t ring;\n+\tuint16_t chunk_slots;\n+\tuint16_t disable_npa;\n+\tuint16_t enable_stats;\n+};\n+\n struct otx2_tim_evdev {\n \tstruct rte_pci_device *pci_dev;\n \tstruct rte_eventdev *event_dev;\n@@ -123,6 +130,9 @@ struct otx2_tim_evdev {\n \tuint16_t chunk_slots;\n \tuint16_t min_ring_cnt;\n \tuint8_t enable_stats;\n+\tuint16_t ring_ctl_cnt;\n+\tstruct otx2_tim_ctl *ring_ctl_data;\n+\t/* HW const */\n \t/* MSIX offsets */\n \tuint16_t tim_msixoff[OTX2_MAX_TIM_RINGS];\n };\n",
    "prefixes": [
        "v3",
        "42/42"
    ]
}