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GET /api/patches/55638/?format=api
{ "id": 55638, "url": "http://patches.dpdk.org/api/patches/55638/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-34-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190628182354.228-34-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190628182354.228-34-pbhagavatula@marvell.com", "date": "2019-06-28T18:23:44", "name": "[v3,33/42] event/octeontx2: allow adapters to resize inflight buffers", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "93f9aac8241d28ac415d24406ba765e5061cecaa", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-34-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 5227, "url": "http://patches.dpdk.org/api/series/5227/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5227", "date": "2019-06-28T18:23:11", "name": "OCTEONTX2 event device driver", "version": 3, "mbox": "http://patches.dpdk.org/series/5227/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55638/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/55638/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 75E741BB3E;\n\tFri, 28 Jun 2019 20:25:40 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 4635C1BA59\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 20:25:19 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5SIPII8014547 for <dev@dpdk.org>; Fri, 28 Jun 2019 11:25:18 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2tdkg191mk-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 11:25:18 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 11:25:16 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 11:25:16 -0700", "from BG-LT7430.marvell.com (unknown [10.28.17.12])\n\tby maili.marvell.com (Postfix) with ESMTP id E16A43F7040;\n\tFri, 28 Jun 2019 11:25:14 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=Iswh/8zCaBwxGy0V0py+xjrGnSZFncti8IMsdOyM1AU=;\n\tb=kAheqx62pkzIMLcs427KEhDjzcRdtl6Ep3ONKvR+HBtFNgIxQ2J6Tfg54gOXAre5Pr60\n\tHjgHZG1ZPYXTpIVUx9LCG/Ew4bNFRcyxfSV9yBR2tzXN32C179jED44nn757y7QZ+8BP\n\txBe1JnPQvtT57axwNi32EtO3tfViPBhSarnlw95DZaV6APRi3C0RsVFCUb2JiY8fjtYM\n\tZFkV9jwqTTIJ0TuSVSZQ+SFqXfPooo6Btps66XPWhebbL6k0jlhcbuZjE5bhibtibZu1\n\tjEPelJCQ5xsmoZS6xTkSqyaZYyOq/kmSpX+06f6fFQOIy4lge6o9yz1vqzm+C/UxMXh5\n\tvQ== ", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Fri, 28 Jun 2019 23:53:44 +0530", "Message-ID": "<20190628182354.228-34-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190628182354.228-1-pbhagavatula@marvell.com>", "References": "<20190628182354.228-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_08:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v3 33/42] event/octeontx2: allow adapters to\n\tresize inflight buffers", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd internal SSO functions to allow event adapters to resize SSO buffers\nthat are used to hold in-flight events in DRAM.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/octeontx2/Makefile | 1 +\n drivers/event/octeontx2/meson.build | 1 +\n drivers/event/octeontx2/otx2_evdev.c | 31 ++++++++++++++++++++++\n drivers/event/octeontx2/otx2_evdev.h | 5 ++++\n drivers/event/octeontx2/otx2_evdev_adptr.c | 19 +++++++++++++\n drivers/event/octeontx2/otx2_tim_evdev.c | 5 ++++\n 6 files changed, 62 insertions(+)\n create mode 100644 drivers/event/octeontx2/otx2_evdev_adptr.c", "diff": "diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile\nindex 2290622dd..6f8d9fe2f 100644\n--- a/drivers/event/octeontx2/Makefile\n+++ b/drivers/event/octeontx2/Makefile\n@@ -33,6 +33,7 @@ LIBABIVER := 1\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker_dual.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_adptr.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_tim_evdev.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_selftest.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_irq.c\ndiff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build\nindex ad7f2e084..c709b5e69 100644\n--- a/drivers/event/octeontx2/meson.build\n+++ b/drivers/event/octeontx2/meson.build\n@@ -5,6 +5,7 @@\n sources = files('otx2_worker.c',\n \t\t'otx2_worker_dual.c',\n \t\t'otx2_evdev.c',\n+\t\t'otx2_evdev_adptr.c',\n \t\t'otx2_evdev_irq.c',\n \t\t'otx2_evdev_selftest.c',\n \t\t'otx2_tim_evdev.c',\ndiff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex a1222b3cf..914869b6c 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -529,6 +529,9 @@ sso_xaq_allocate(struct otx2_sso_evdev *dev)\n \txaq_cnt = dev->nb_event_queues * OTX2_SSO_XAQ_CACHE_CNT;\n \tif (dev->xae_cnt)\n \t\txaq_cnt += dev->xae_cnt / dev->xae_waes;\n+\telse if (dev->adptr_xae_cnt)\n+\t\txaq_cnt += (dev->adptr_xae_cnt / dev->xae_waes) +\n+\t\t\t(OTX2_SSO_XAQ_SLACK * dev->nb_event_queues);\n \telse\n \t\txaq_cnt += (dev->iue / dev->xae_waes) +\n \t\t\t(OTX2_SSO_XAQ_SLACK * dev->nb_event_queues);\n@@ -1030,6 +1033,34 @@ sso_cleanup(struct rte_eventdev *event_dev, uint8_t enable)\n \totx2_mbox_process(dev->mbox);\n }\n \n+int\n+sso_xae_reconfigure(struct rte_eventdev *event_dev)\n+{\n+\tstruct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);\n+\tstruct rte_mempool *prev_xaq_pool;\n+\tint rc = 0;\n+\n+\tif (event_dev->data->dev_started)\n+\t\tsso_cleanup(event_dev, 0);\n+\n+\tprev_xaq_pool = dev->xaq_pool;\n+\tdev->xaq_pool = NULL;\n+\tsso_xaq_allocate(dev);\n+\trc = sso_ggrp_alloc_xaq(dev);\n+\tif (rc < 0) {\n+\t\totx2_err(\"Failed to alloc xaq to ggrp %d\", rc);\n+\t\trte_mempool_free(prev_xaq_pool);\n+\t\treturn rc;\n+\t}\n+\n+\trte_mempool_free(prev_xaq_pool);\n+\trte_mb();\n+\tif (event_dev->data->dev_started)\n+\t\tsso_cleanup(event_dev, 1);\n+\n+\treturn 0;\n+}\n+\n static int\n otx2_sso_start(struct rte_eventdev *event_dev)\n {\ndiff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h\nindex 1e15b7e1c..ba3aae5ba 100644\n--- a/drivers/event/octeontx2/otx2_evdev.h\n+++ b/drivers/event/octeontx2/otx2_evdev.h\n@@ -129,6 +129,7 @@ struct otx2_sso_evdev {\n \tuint64_t nb_xaq_cfg;\n \trte_iova_t fc_iova;\n \tstruct rte_mempool *xaq_pool;\n+\tuint32_t adptr_xae_cnt;\n \t/* Dev args */\n \tuint8_t dual_ws;\n \tuint8_t selftest;\n@@ -243,6 +244,10 @@ uint16_t otx2_ssogws_dual_deq_timeout(void *port, struct rte_event *ev,\n uint16_t otx2_ssogws_dual_deq_timeout_burst(void *port, struct rte_event ev[],\n \t\t\t\t\t uint16_t nb_events,\n \t\t\t\t\t uint64_t timeout_ticks);\n+\n+void sso_updt_xae_cnt(struct otx2_sso_evdev *dev, void *data,\n+\t\t uint32_t event_type);\n+int sso_xae_reconfigure(struct rte_eventdev *event_dev);\n void sso_fastpath_fns_set(struct rte_eventdev *event_dev);\n /* Clean up API's */\n typedef void (*otx2_handle_event_t)(void *arg, struct rte_event ev);\ndiff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c b/drivers/event/octeontx2/otx2_evdev_adptr.c\nnew file mode 100644\nindex 000000000..810722f89\n--- /dev/null\n+++ b/drivers/event/octeontx2/otx2_evdev_adptr.c\n@@ -0,0 +1,19 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#include \"otx2_evdev.h\"\n+\n+void\n+sso_updt_xae_cnt(struct otx2_sso_evdev *dev, void *data, uint32_t event_type)\n+{\n+\tswitch (event_type) {\n+\tcase RTE_EVENT_TYPE_TIMER:\n+\t{\n+\t\tdev->adptr_xae_cnt += (*(uint64_t *)data);\n+\t\tbreak;\n+\t}\n+\tdefault:\n+\t\tbreak;\n+\t}\n+}\ndiff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c\nindex 8324ded51..186c5d483 100644\n--- a/drivers/event/octeontx2/otx2_tim_evdev.c\n+++ b/drivers/event/octeontx2/otx2_tim_evdev.c\n@@ -314,6 +314,11 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr)\n \t\t tim_ring->base + TIM_LF_RING_BASE);\n \totx2_write64(tim_ring->aura, tim_ring->base + TIM_LF_RING_AURA);\n \n+\t/* Update SSO xae count. */\n+\tsso_updt_xae_cnt(sso_pmd_priv(dev->event_dev), (void *)&nb_timers,\n+\t\t\t RTE_EVENT_TYPE_TIMER);\n+\tsso_xae_reconfigure(dev->event_dev);\n+\n \treturn rc;\n \n chnk_mem_err:\n", "prefixes": [ "v3", "33/42" ] }