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GET /api/patches/55620/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 55620,
    "url": "http://patches.dpdk.org/api/patches/55620/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-16-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190628182354.228-16-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190628182354.228-16-pbhagavatula@marvell.com",
    "date": "2019-06-28T18:23:26",
    "name": "[v3,15/42] event/octeontx2: add worker enqueue functions",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "8fdda6bea204e2c98d29828b4c9ee1f41dfc93e8",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerin.jacob@caviumnetworks.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-16-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 5227,
            "url": "http://patches.dpdk.org/api/series/5227/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5227",
            "date": "2019-06-28T18:23:11",
            "name": "OCTEONTX2 event device driver",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/5227/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/55620/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/55620/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "X-BeenThere": "dev@dpdk.org",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "MIME-Version": "1.0",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>",
        "CC": "<dev@dpdk.org>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_08:, , signatures=0",
        "In-Reply-To": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Delivered-To": "patchwork@dpdk.org",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "X-Mailer": "git-send-email 2.17.1",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=pAIiYTF3ogb6rrJBNNLflMPLkPydsQ6117vJzllago4=;\n\tb=spr+qUfrogTssJsekUQeD9jV0nHd44pAhSmjKwyxaX9N+aTzo5nRFLv//DoJdR43spyR\n\tgrECbzXY+Zs3aAhLGCTkp8kbABKvdyLxwhEU+S8ZvZc/lrUcUKKpPYch1uUACb+/Ka2N\n\toI23EpDF6y+FQhZWLuxGVfBw52/hJu4rr7QKE3n9Ah639zkRsSWt0v5PJEw8s+J96ROa\n\tKEdXiutLfAIq1K+QJSNerk9xE3EDa/uIs19dqvXtFOj2oHO0jcp+UZIrTDEAkNeynrNe\n\tk2A4tc5B8wVZIxt6T0hvb7eNT+Qhc2fVhNWKc0a6i6hjJUbaGqNmmk90A6EJJ5GmNwTB\n\tmg== ",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9C7291B9EB;\n\tFri, 28 Jun 2019 20:24:58 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 7D3831B9AA\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 20:24:35 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5SIKCvb010205 for <dev@dpdk.org>; Fri, 28 Jun 2019 11:24:35 -0700",
            "from sc-exch03.marvell.com ([199.233.58.183])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2tdkg191h5-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 11:24:35 -0700",
            "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 11:24:32 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 11:24:32 -0700",
            "from BG-LT7430.marvell.com (unknown [10.28.17.12])\n\tby maili.marvell.com (Postfix) with ESMTP id AA00D3F7040;\n\tFri, 28 Jun 2019 11:24:31 -0700 (PDT)"
        ],
        "X-Original-To": "patchwork@dpdk.org",
        "Content-Type": "text/plain",
        "Message-ID": "<20190628182354.228-16-pbhagavatula@marvell.com>",
        "Content-Transfer-Encoding": "8bit",
        "X-Mailman-Version": "2.1.15",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "References": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Subject": "[dpdk-dev] [PATCH v3 15/42] event/octeontx2: add worker enqueue\n\tfunctions",
        "Date": "Fri, 28 Jun 2019 23:53:26 +0530",
        "List-Post": "<mailto:dev@dpdk.org>",
        "Precedence": "list"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd worker event enqueue functions.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/octeontx2/otx2_evdev.h  |   8 ++\n drivers/event/octeontx2/otx2_worker.c | 136 ++++++++++++++++++++++++++\n 2 files changed, 144 insertions(+)",
    "diff": "diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h\nindex cccce1dea..4f2fd33df 100644\n--- a/drivers/event/octeontx2/otx2_evdev.h\n+++ b/drivers/event/octeontx2/otx2_evdev.h\n@@ -170,6 +170,14 @@ parse_kvargs_value(const char *key, const char *value, void *opaque)\n \treturn 0;\n }\n \n+uint16_t otx2_ssogws_enq(void *port, const struct rte_event *ev);\n+uint16_t otx2_ssogws_enq_burst(void *port, const struct rte_event ev[],\n+\t\t\t       uint16_t nb_events);\n+uint16_t otx2_ssogws_enq_new_burst(void *port, const struct rte_event ev[],\n+\t\t\t\t   uint16_t nb_events);\n+uint16_t otx2_ssogws_enq_fwd_burst(void *port, const struct rte_event ev[],\n+\t\t\t\t   uint16_t nb_events);\n+\n /* Init and Fini API's */\n int otx2_sso_init(struct rte_eventdev *event_dev);\n int otx2_sso_fini(struct rte_eventdev *event_dev);\ndiff --git a/drivers/event/octeontx2/otx2_worker.c b/drivers/event/octeontx2/otx2_worker.c\nindex 83f535d05..044c5f132 100644\n--- a/drivers/event/octeontx2/otx2_worker.c\n+++ b/drivers/event/octeontx2/otx2_worker.c\n@@ -3,3 +3,139 @@\n  */\n \n #include \"otx2_worker.h\"\n+\n+static __rte_noinline uint8_t\n+otx2_ssogws_new_event(struct otx2_ssogws *ws, const struct rte_event *ev)\n+{\n+\tconst uint32_t tag = (uint32_t)ev->event;\n+\tconst uint8_t new_tt = ev->sched_type;\n+\tconst uint64_t event_ptr = ev->u64;\n+\tconst uint16_t grp = ev->queue_id;\n+\n+\tif (ws->xaq_lmt <= *ws->fc_mem)\n+\t\treturn 0;\n+\n+\totx2_ssogws_add_work(ws, event_ptr, tag, new_tt, grp);\n+\n+\treturn 1;\n+}\n+\n+static __rte_always_inline void\n+otx2_ssogws_fwd_swtag(struct otx2_ssogws *ws, const struct rte_event *ev)\n+{\n+\tconst uint32_t tag = (uint32_t)ev->event;\n+\tconst uint8_t new_tt = ev->sched_type;\n+\tconst uint8_t cur_tt = ws->cur_tt;\n+\n+\t/* 96XX model\n+\t * cur_tt/new_tt     SSO_SYNC_ORDERED SSO_SYNC_ATOMIC SSO_SYNC_UNTAGGED\n+\t *\n+\t * SSO_SYNC_ORDERED        norm           norm             untag\n+\t * SSO_SYNC_ATOMIC         norm           norm\t\t   untag\n+\t * SSO_SYNC_UNTAGGED       norm           norm             NOOP\n+\t */\n+\n+\tif (new_tt == SSO_SYNC_UNTAGGED) {\n+\t\tif (cur_tt != SSO_SYNC_UNTAGGED)\n+\t\t\totx2_ssogws_swtag_untag(ws);\n+\t} else {\n+\t\totx2_ssogws_swtag_norm(ws, tag, new_tt);\n+\t}\n+\n+\tws->swtag_req = 1;\n+}\n+\n+static __rte_always_inline void\n+otx2_ssogws_fwd_group(struct otx2_ssogws *ws, const struct rte_event *ev,\n+\t\t      const uint16_t grp)\n+{\n+\tconst uint32_t tag = (uint32_t)ev->event;\n+\tconst uint8_t new_tt = ev->sched_type;\n+\n+\totx2_write64(ev->u64, OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op) +\n+\t\t     SSOW_LF_GWS_OP_UPD_WQP_GRP1);\n+\trte_smp_wmb();\n+\totx2_ssogws_swtag_desched(ws, tag, new_tt, grp);\n+}\n+\n+static __rte_always_inline void\n+otx2_ssogws_forward_event(struct otx2_ssogws *ws, const struct rte_event *ev)\n+{\n+\tconst uint8_t grp = ev->queue_id;\n+\n+\t/* Group hasn't changed, Use SWTAG to forward the event */\n+\tif (ws->cur_grp == grp)\n+\t\totx2_ssogws_fwd_swtag(ws, ev);\n+\telse\n+\t/*\n+\t * Group has been changed for group based work pipelining,\n+\t * Use deschedule/add_work operation to transfer the event to\n+\t * new group/core\n+\t */\n+\t\totx2_ssogws_fwd_group(ws, ev, grp);\n+}\n+\n+static __rte_always_inline void\n+otx2_ssogws_release_event(struct otx2_ssogws *ws)\n+{\n+\totx2_ssogws_swtag_flush(ws);\n+}\n+\n+uint16_t __hot\n+otx2_ssogws_enq(void *port, const struct rte_event *ev)\n+{\n+\tstruct otx2_ssogws *ws = port;\n+\n+\tswitch (ev->op) {\n+\tcase RTE_EVENT_OP_NEW:\n+\t\trte_smp_mb();\n+\t\treturn otx2_ssogws_new_event(ws, ev);\n+\tcase RTE_EVENT_OP_FORWARD:\n+\t\totx2_ssogws_forward_event(ws, ev);\n+\t\tbreak;\n+\tcase RTE_EVENT_OP_RELEASE:\n+\t\totx2_ssogws_release_event(ws);\n+\t\tbreak;\n+\tdefault:\n+\t\treturn 0;\n+\t}\n+\n+\treturn 1;\n+}\n+\n+uint16_t __hot\n+otx2_ssogws_enq_burst(void *port, const struct rte_event ev[],\n+\t\t      uint16_t nb_events)\n+{\n+\tRTE_SET_USED(nb_events);\n+\treturn otx2_ssogws_enq(port, ev);\n+}\n+\n+uint16_t __hot\n+otx2_ssogws_enq_new_burst(void *port, const struct rte_event ev[],\n+\t\t\t  uint16_t nb_events)\n+{\n+\tstruct otx2_ssogws *ws = port;\n+\tuint16_t i, rc = 1;\n+\n+\trte_smp_mb();\n+\tif (ws->xaq_lmt <= *ws->fc_mem)\n+\t\treturn 0;\n+\n+\tfor (i = 0; i < nb_events && rc; i++)\n+\t\trc = otx2_ssogws_new_event(ws,  &ev[i]);\n+\n+\treturn nb_events;\n+}\n+\n+uint16_t __hot\n+otx2_ssogws_enq_fwd_burst(void *port, const struct rte_event ev[],\n+\t\t\t  uint16_t nb_events)\n+{\n+\tstruct otx2_ssogws *ws = port;\n+\n+\tRTE_SET_USED(nb_events);\n+\totx2_ssogws_forward_event(ws,  ev);\n+\n+\treturn 1;\n+}\n",
    "prefixes": [
        "v3",
        "15/42"
    ]
}