get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/55614/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 55614,
    "url": "http://patches.dpdk.org/api/patches/55614/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-10-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190628182354.228-10-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190628182354.228-10-pbhagavatula@marvell.com",
    "date": "2019-06-28T18:23:20",
    "name": "[v3,09/42] event/octeontx2: support linking queues to ports",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "e183db105b70b63468cb03212d6f74ab51935ef9",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerin.jacob@caviumnetworks.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-10-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 5227,
            "url": "http://patches.dpdk.org/api/series/5227/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5227",
            "date": "2019-06-28T18:23:11",
            "name": "OCTEONTX2 event device driver",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/5227/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/55614/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/55614/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "X-BeenThere": "dev@dpdk.org",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "MIME-Version": "1.0",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>",
        "CC": "<dev@dpdk.org>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_08:, , signatures=0",
        "In-Reply-To": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Delivered-To": "patchwork@dpdk.org",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "X-Mailer": "git-send-email 2.17.1",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=ZoSLcc9zIitQGS/1B1rMShfsy044h9up2LKYtmenP/s=;\n\tb=yQVlQC+keTMr6Gs4Aiyif6Cs96ZMfVaT/KWJX0HZ2wSivb6lX54Q4Cf9xBL5sdJmIgvE\n\tJDXOM6nToKXM/EbKgAbMH7RzgP1BGWyqH34YlpPoCMrdgVkPngGX8e+W9mitdu8NTESr\n\t+sWqQD5hAH5k8NDzLnu77Yb4zqo7rUOK3nlmMzKmvbVLkf3cuE2C1NyqfKAuH+Y1fytJ\n\tDdhoPaTqLy+wbpgLIzFSW3hfcWwP0LcnkRFuFh7+8sePkTDxMM8/P8/rtaCjzB0jHcBe\n\t/m8rNcLZgzLavWwgOWDcN+08bWHr9F7B+gtoAKnKsa/Wiy43BLp8U6dtIqyUet4SeT1t\n\tTQ== ",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4B4665B34;\n\tFri, 28 Jun 2019 20:24:31 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 59C4B1B952\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 20:24:20 +0200 (CEST)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5SILBYl011342 for <dev@dpdk.org>; Fri, 28 Jun 2019 11:24:19 -0700",
            "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2tdd77agjg-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 11:24:19 -0700",
            "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 11:24:18 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 11:24:18 -0700",
            "from BG-LT7430.marvell.com (unknown [10.28.17.12])\n\tby maili.marvell.com (Postfix) with ESMTP id 3643E3F7041;\n\tFri, 28 Jun 2019 11:24:16 -0700 (PDT)"
        ],
        "X-Original-To": "patchwork@dpdk.org",
        "Content-Type": "text/plain",
        "Message-ID": "<20190628182354.228-10-pbhagavatula@marvell.com>",
        "Content-Transfer-Encoding": "8bit",
        "X-Mailman-Version": "2.1.15",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "References": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Subject": "[dpdk-dev] [PATCH v3 09/42] event/octeontx2: support linking queues\n\tto ports",
        "Date": "Fri, 28 Jun 2019 23:53:20 +0530",
        "List-Post": "<mailto:dev@dpdk.org>",
        "Precedence": "list"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nLinks between queues and ports are controlled by setting/clearing GGRP\nmembership in SSOW_LF_GWS_GRPMSK_CHG.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/octeontx2/otx2_evdev.c | 73 ++++++++++++++++++++++++++++\n 1 file changed, 73 insertions(+)",
    "diff": "diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex a6bf861fb..53e68902a 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -39,6 +39,60 @@ otx2_sso_info_get(struct rte_eventdev *event_dev,\n \t\t\t\t\tRTE_EVENT_DEV_CAP_NONSEQ_MODE;\n }\n \n+static void\n+sso_port_link_modify(struct otx2_ssogws *ws, uint8_t queue, uint8_t enable)\n+{\n+\tuintptr_t base = OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op);\n+\tuint64_t val;\n+\n+\tval = queue;\n+\tval |= 0ULL << 12; /* SET 0 */\n+\tval |= 0x8000800080000000; /* Dont modify rest of the masks */\n+\tval |= (uint64_t)enable << 14;   /* Enable/Disable Membership. */\n+\n+\totx2_write64(val, base + SSOW_LF_GWS_GRPMSK_CHG);\n+}\n+\n+static int\n+otx2_sso_port_link(struct rte_eventdev *event_dev, void *port,\n+\t\t   const uint8_t queues[], const uint8_t priorities[],\n+\t\t   uint16_t nb_links)\n+{\n+\tuint8_t port_id = 0;\n+\tuint16_t link;\n+\n+\tRTE_SET_USED(event_dev);\n+\tRTE_SET_USED(priorities);\n+\tfor (link = 0; link < nb_links; link++) {\n+\t\tstruct otx2_ssogws *ws = port;\n+\n+\t\tport_id = ws->port;\n+\t\tsso_port_link_modify(ws, queues[link], true);\n+\t}\n+\tsso_func_trace(\"Port=%d nb_links=%d\", port_id, nb_links);\n+\n+\treturn (int)nb_links;\n+}\n+\n+static int\n+otx2_sso_port_unlink(struct rte_eventdev *event_dev, void *port,\n+\t\t     uint8_t queues[], uint16_t nb_unlinks)\n+{\n+\tuint8_t port_id = 0;\n+\tuint16_t unlink;\n+\n+\tRTE_SET_USED(event_dev);\n+\tfor (unlink = 0; unlink < nb_unlinks; unlink++) {\n+\t\tstruct otx2_ssogws *ws = port;\n+\n+\t\tport_id = ws->port;\n+\t\tsso_port_link_modify(ws, queues[unlink], false);\n+\t}\n+\tsso_func_trace(\"Port=%d nb_unlinks=%d\", port_id, nb_unlinks);\n+\n+\treturn (int)nb_unlinks;\n+}\n+\n static int\n sso_hw_lf_cfg(struct otx2_mbox *mbox, enum otx2_sso_lf_type type,\n \t      uint16_t nb_lf, uint8_t attach)\n@@ -157,6 +211,21 @@ otx2_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id)\n \tRTE_SET_USED(queue_id);\n }\n \n+static void\n+sso_clr_links(const struct rte_eventdev *event_dev)\n+{\n+\tstruct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);\n+\tint i, j;\n+\n+\tfor (i = 0; i < dev->nb_event_ports; i++) {\n+\t\tstruct otx2_ssogws *ws;\n+\n+\t\tws = event_dev->data->ports[i];\n+\t\tfor (j = 0; j < dev->nb_event_queues; j++)\n+\t\t\tsso_port_link_modify(ws, j, false);\n+\t}\n+}\n+\n static void\n sso_set_port_ops(struct otx2_ssogws *ws, uintptr_t base)\n {\n@@ -450,6 +519,8 @@ otx2_sso_configure(const struct rte_eventdev *event_dev)\n \t\tgoto teardown_hwggrp;\n \t}\n \n+\t/* Clear any prior port-queue mapping. */\n+\tsso_clr_links(event_dev);\n \trc = sso_ggrp_alloc_xaq(dev);\n \tif (rc < 0) {\n \t\totx2_err(\"Failed to alloc xaq to ggrp %d\", rc);\n@@ -574,6 +645,8 @@ static struct rte_eventdev_ops otx2_sso_ops = {\n \t.port_def_conf    = otx2_sso_port_def_conf,\n \t.port_setup       = otx2_sso_port_setup,\n \t.port_release     = otx2_sso_port_release,\n+\t.port_link        = otx2_sso_port_link,\n+\t.port_unlink      = otx2_sso_port_unlink,\n };\n \n #define OTX2_SSO_XAE_CNT\t\"xae_cnt\"\n",
    "prefixes": [
        "v3",
        "09/42"
    ]
}