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GET /api/patches/55612/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 55612,
    "url": "http://patches.dpdk.org/api/patches/55612/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-8-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190628182354.228-8-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190628182354.228-8-pbhagavatula@marvell.com",
    "date": "2019-06-28T18:23:18",
    "name": "[v3,07/42] event/octeontx2: add devargs for inflight buffer count",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "a2cfb0da82ac5d08db0b03c973ab0796b89cbd05",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerin.jacob@caviumnetworks.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-8-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 5227,
            "url": "http://patches.dpdk.org/api/series/5227/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5227",
            "date": "2019-06-28T18:23:11",
            "name": "OCTEONTX2 event device driver",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/5227/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/55612/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/55612/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "X-BeenThere": "dev@dpdk.org",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "MIME-Version": "1.0",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"John\n\tMcNamara\" <john.mcnamara@intel.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>",
        "CC": "<dev@dpdk.org>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_08:, , signatures=0",
        "In-Reply-To": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Delivered-To": "patchwork@dpdk.org",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "X-Mailer": "git-send-email 2.17.1",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=8oEf/C/4SuAfjbvCHSz+1XITJSqJN/oovviYwip9lL4=;\n\tb=axzZqrj2yOaJGkH48JrUrVqAjBepAshfUxyhf3U1e3SOAOmIKEdMzFxuusW5GUZ+qy3b\n\tQ/FJTcvwMKXL9cWvrzI0mncKsk0undVxhZXLuLzKDXcG7P3XAtz2/5uVNd98ID0NU6UQ\n\tims4BcroBR5Tl7idIwocfNmPLrXFBSAkTfVVKDkjM8Fjhe/UcI9TffkE0bWXLCpXZrS7\n\tsuRdd8EvR5C4AefFLt8CT1gpQ8SZ+8C0miO68AOee+gVPR7bTCurzuBCcy8dzweZ7Rbt\n\tapR7RL+HYodFkFTapWR3XTSWhjGvuQN0uah77ztHopi2zPauGY8qxKDdxhpWNAEeiqnQ\n\tXA== ",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D00531B996;\n\tFri, 28 Jun 2019 20:24:22 +0200 (CEST)",
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            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5SIMM3m012139; Fri, 28 Jun 2019 11:24:14 -0700",
            "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2tdd77agj0-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tFri, 28 Jun 2019 11:24:14 -0700",
            "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 11:24:13 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 11:24:13 -0700",
            "from BG-LT7430.marvell.com (unknown [10.28.17.12])\n\tby maili.marvell.com (Postfix) with ESMTP id 18B983F7041;\n\tFri, 28 Jun 2019 11:24:11 -0700 (PDT)"
        ],
        "X-Original-To": "patchwork@dpdk.org",
        "Content-Type": "text/plain",
        "Message-ID": "<20190628182354.228-8-pbhagavatula@marvell.com>",
        "Content-Transfer-Encoding": "8bit",
        "X-Mailman-Version": "2.1.15",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "References": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Subject": "[dpdk-dev] [PATCH v3 07/42] event/octeontx2: add devargs for\n\tinflight buffer count",
        "Date": "Fri, 28 Jun 2019 23:53:18 +0530",
        "List-Post": "<mailto:dev@dpdk.org>",
        "Precedence": "list"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nThe number of events for a *open system* event device is specified\nas -1 as per the eventdev specification.\nSince, Octeontx2 SSO inflight events are only limited by DRAM size, the\nxae_cnt devargs parameter is introduced to provide upper limit for\nin-flight events.\n\nExample:\n\t--dev \"0002:0e:00.0,xae_cnt=8192\"\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nAcked-by: Jerin Jacob <jerinj@marvell.com>\n---\n doc/guides/eventdevs/octeontx2.rst   | 12 ++++++++++++\n drivers/event/octeontx2/Makefile     |  2 +-\n drivers/event/octeontx2/otx2_evdev.c | 28 +++++++++++++++++++++++++++-\n drivers/event/octeontx2/otx2_evdev.h | 11 +++++++++++\n 4 files changed, 51 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst\nindex 341c5b21d..f83cf1e9d 100644\n--- a/doc/guides/eventdevs/octeontx2.rst\n+++ b/doc/guides/eventdevs/octeontx2.rst\n@@ -46,6 +46,18 @@ The following option can be modified in the ``config`` file.\n \n   Toggle compilation of the ``librte_pmd_octeontx2_event`` driver.\n \n+Runtime Config Options\n+~~~~~~~~~~~~~~~~~~~~~~\n+\n+- ``Maximum number of in-flight events`` (default ``8192``)\n+\n+  In **Marvell OCTEON TX2** the max number of in-flight events are only limited\n+  by DRAM size, the ``xae_cnt`` devargs parameter is introduced to provide\n+  upper limit for in-flight events.\n+  For example::\n+\n+    --dev \"0002:0e:00.0,xae_cnt=16384\"\n+\n Debugging Options\n ~~~~~~~~~~~~~~~~~\n \ndiff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile\nindex b3c3beccb..58853e1b9 100644\n--- a/drivers/event/octeontx2/Makefile\n+++ b/drivers/event/octeontx2/Makefile\n@@ -32,7 +32,7 @@ LIBABIVER := 1\n \n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c\n \n-LDLIBS += -lrte_eal -lrte_bus_pci -lrte_pci\n+LDLIBS += -lrte_eal -lrte_bus_pci -lrte_pci -lrte_kvargs\n LDLIBS += -lrte_mempool -lrte_eventdev -lrte_mbuf\n LDLIBS += -lrte_common_octeontx2 -lrte_mempool_octeontx2\n \ndiff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex fc4dbda0a..94c97fc9e 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -8,6 +8,7 @@\n #include <rte_common.h>\n #include <rte_eal.h>\n #include <rte_eventdev_pmd_pci.h>\n+#include <rte_kvargs.h>\n #include <rte_mbuf_pool_ops.h>\n #include <rte_pci.h>\n \n@@ -245,7 +246,10 @@ sso_xaq_allocate(struct otx2_sso_evdev *dev)\n \n \t/* Taken from HRM 14.3.3(4) */\n \txaq_cnt = dev->nb_event_queues * OTX2_SSO_XAQ_CACHE_CNT;\n-\txaq_cnt += (dev->iue / dev->xae_waes) +\n+\tif (dev->xae_cnt)\n+\t\txaq_cnt += dev->xae_cnt / dev->xae_waes;\n+\telse\n+\t\txaq_cnt += (dev->iue / dev->xae_waes) +\n \t\t\t(OTX2_SSO_XAQ_SLACK * dev->nb_event_queues);\n \n \totx2_sso_dbg(\"Configuring %d xaq buffers\", xaq_cnt);\n@@ -464,6 +468,25 @@ static struct rte_eventdev_ops otx2_sso_ops = {\n \t.queue_release    = otx2_sso_queue_release,\n };\n \n+#define OTX2_SSO_XAE_CNT\t\"xae_cnt\"\n+\n+static void\n+sso_parse_devargs(struct otx2_sso_evdev *dev, struct rte_devargs *devargs)\n+{\n+\tstruct rte_kvargs *kvlist;\n+\n+\tif (devargs == NULL)\n+\t\treturn;\n+\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n+\tif (kvlist == NULL)\n+\t\treturn;\n+\n+\trte_kvargs_process(kvlist, OTX2_SSO_XAE_CNT, &parse_kvargs_value,\n+\t\t\t   &dev->xae_cnt);\n+\n+\trte_kvargs_free(kvlist);\n+}\n+\n static int\n otx2_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n {\n@@ -553,6 +576,8 @@ otx2_sso_init(struct rte_eventdev *event_dev)\n \t\tgoto otx2_npa_lf_uninit;\n \t}\n \n+\tsso_parse_devargs(dev, pci_dev->device.devargs);\n+\n \totx2_sso_pf_func_set(dev->pf_func);\n \totx2_sso_dbg(\"Initializing %s max_queues=%d max_ports=%d\",\n \t\t     event_dev->data->name, dev->max_event_queues,\n@@ -601,3 +626,4 @@ otx2_sso_fini(struct rte_eventdev *event_dev)\n RTE_PMD_REGISTER_PCI(event_octeontx2, pci_sso);\n RTE_PMD_REGISTER_PCI_TABLE(event_octeontx2, pci_sso_map);\n RTE_PMD_REGISTER_KMOD_DEP(event_octeontx2, \"vfio-pci\");\n+RTE_PMD_REGISTER_PARAM_STRING(event_octeontx2, OTX2_SSO_XAE_CNT \"=<int>\");\ndiff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h\nindex 375640bca..acc8b6b3e 100644\n--- a/drivers/event/octeontx2/otx2_evdev.h\n+++ b/drivers/event/octeontx2/otx2_evdev.h\n@@ -62,6 +62,8 @@ struct otx2_sso_evdev {\n \tuint64_t nb_xaq_cfg;\n \trte_iova_t fc_iova;\n \tstruct rte_mempool *xaq_pool;\n+\t/* Dev args */\n+\tuint32_t xae_cnt;\n \t/* HW const */\n \tuint32_t xae_waes;\n \tuint32_t xaq_buf_size;\n@@ -74,6 +76,15 @@ sso_pmd_priv(const struct rte_eventdev *event_dev)\n \treturn event_dev->data->dev_private;\n }\n \n+static inline int\n+parse_kvargs_value(const char *key, const char *value, void *opaque)\n+{\n+\tRTE_SET_USED(key);\n+\n+\t*(uint32_t *)opaque = (uint32_t)atoi(value);\n+\treturn 0;\n+}\n+\n /* Init and Fini API's */\n int otx2_sso_init(struct rte_eventdev *event_dev);\n int otx2_sso_fini(struct rte_eventdev *event_dev);\n",
    "prefixes": [
        "v3",
        "07/42"
    ]
}