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GET /api/patches/55610/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 55610,
    "url": "http://patches.dpdk.org/api/patches/55610/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-6-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190628182354.228-6-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190628182354.228-6-pbhagavatula@marvell.com",
    "date": "2019-06-28T18:23:16",
    "name": "[v3,05/42] event/octeontx2: add event queue config functions",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "d7a9eee184d7dc0359d9508f4221b5ed767f38e7",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerin.jacob@caviumnetworks.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190628182354.228-6-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 5227,
            "url": "http://patches.dpdk.org/api/series/5227/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5227",
            "date": "2019-06-28T18:23:11",
            "name": "OCTEONTX2 event device driver",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/5227/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/55610/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/55610/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "X-BeenThere": "dev@dpdk.org",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "MIME-Version": "1.0",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>",
        "CC": "<dev@dpdk.org>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_08:, , signatures=0",
        "In-Reply-To": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Delivered-To": "patchwork@dpdk.org",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "X-Mailer": "git-send-email 2.17.1",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=du1sAyKweZ7041tayY4hxO01V8utLvVR0D5QGBbEgTs=;\n\tb=sZZ8sMpXE7HBNtogySWJpwQSr2ClMawJL/efzt57T2KfaumadLUrvpFpYM1UK/Y2N40q\n\trUxBFHioB4FwicD78BlFlrHfPmBbJEwTRa6O6JBrgqW50KXl0FYbBjQ3ibIRdSzYRvg7\n\tRe60QyacI9Pr34lTpYh0ZNZHQ/E/X3qERUhKraXg2Vqot7GZsAfZ4QKQfoIpTHygqtlX\n\tPh95rHFAqkTGCu3Xr0RJN7G7UiindJuvoH3XWkadnY+yofmhwvDRf//7oefwXF+imyRH\n\tFl9ty8JQl4REcIIiuFJnlSXs9M2tA7egDOby1hP9fLUYeIwxBpxN/qn987vGzMbH4o+l\n\tiw== ",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E87391B965;\n\tFri, 28 Jun 2019 20:24:15 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 1BA5E58C6\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 20:24:10 +0200 (CEST)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5SIKhoN010889 for <dev@dpdk.org>; Fri, 28 Jun 2019 11:24:10 -0700",
            "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2tdd77aghn-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 11:24:10 -0700",
            "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 11:24:08 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 11:24:08 -0700",
            "from BG-LT7430.marvell.com (unknown [10.28.17.12])\n\tby maili.marvell.com (Postfix) with ESMTP id BE0703F7040;\n\tFri, 28 Jun 2019 11:24:07 -0700 (PDT)"
        ],
        "X-Original-To": "patchwork@dpdk.org",
        "Content-Type": "text/plain",
        "Message-ID": "<20190628182354.228-6-pbhagavatula@marvell.com>",
        "Content-Transfer-Encoding": "8bit",
        "X-Mailman-Version": "2.1.15",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "References": "<20190628182354.228-1-pbhagavatula@marvell.com>",
        "Subject": "[dpdk-dev] [PATCH v3 05/42] event/octeontx2: add event queue config\n\tfunctions",
        "Date": "Fri, 28 Jun 2019 23:53:16 +0530",
        "List-Post": "<mailto:dev@dpdk.org>",
        "Precedence": "list"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd default config, setup and release functions for event queues i.e.\nSSO GGRPS.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/octeontx2/otx2_evdev.c | 50 ++++++++++++++++++++++++++++\n drivers/event/octeontx2/otx2_evdev.h | 17 ++++++++++\n 2 files changed, 67 insertions(+)",
    "diff": "diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex 00996578a..2290598d0 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -142,6 +142,13 @@ sso_lf_cfg(struct otx2_sso_evdev *dev, struct otx2_mbox *mbox,\n \treturn 0;\n }\n \n+static void\n+otx2_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id)\n+{\n+\tRTE_SET_USED(event_dev);\n+\tRTE_SET_USED(queue_id);\n+}\n+\n static int\n sso_configure_ports(const struct rte_eventdev *event_dev)\n {\n@@ -294,10 +301,53 @@ otx2_sso_configure(const struct rte_eventdev *event_dev)\n \treturn rc;\n }\n \n+static void\n+otx2_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,\n+\t\t\tstruct rte_event_queue_conf *queue_conf)\n+{\n+\tRTE_SET_USED(event_dev);\n+\tRTE_SET_USED(queue_id);\n+\n+\tqueue_conf->nb_atomic_flows = (1ULL << 20);\n+\tqueue_conf->nb_atomic_order_sequences = (1ULL << 20);\n+\tqueue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES;\n+\tqueue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;\n+}\n+\n+static int\n+otx2_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,\n+\t\t     const struct rte_event_queue_conf *queue_conf)\n+{\n+\tstruct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tstruct sso_grp_priority *req;\n+\tint rc;\n+\n+\tsso_func_trace(\"Queue=%d prio=%d\", queue_id, queue_conf->priority);\n+\n+\treq = otx2_mbox_alloc_msg_sso_grp_set_priority(dev->mbox);\n+\treq->grp = queue_id;\n+\treq->weight = 0xFF;\n+\treq->affinity = 0xFF;\n+\t/* Normalize <0-255> to <0-7> */\n+\treq->priority = queue_conf->priority / 32;\n+\n+\trc = otx2_mbox_process(mbox);\n+\tif (rc < 0) {\n+\t\totx2_err(\"Failed to set priority queue=%d\", queue_id);\n+\t\treturn rc;\n+\t}\n+\n+\treturn 0;\n+}\n+\n /* Initialize and register event driver with DPDK Application */\n static struct rte_eventdev_ops otx2_sso_ops = {\n \t.dev_infos_get    = otx2_sso_info_get,\n \t.dev_configure    = otx2_sso_configure,\n+\t.queue_def_conf   = otx2_sso_queue_def_conf,\n+\t.queue_setup      = otx2_sso_queue_setup,\n+\t.queue_release    = otx2_sso_queue_release,\n };\n \n static int\ndiff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h\nindex feb4ed6f4..b46402771 100644\n--- a/drivers/event/octeontx2/otx2_evdev.h\n+++ b/drivers/event/octeontx2/otx2_evdev.h\n@@ -18,6 +18,23 @@\n #define OTX2_SSO_MAX_VHGRP                  RTE_EVENT_MAX_QUEUES_PER_DEV\n #define OTX2_SSO_MAX_VHWS                   (UINT8_MAX)\n \n+/* SSO LF register offsets (BAR2) */\n+#define SSO_LF_GGRP_OP_ADD_WORK0            (0x0ull)\n+#define SSO_LF_GGRP_OP_ADD_WORK1            (0x8ull)\n+\n+#define SSO_LF_GGRP_QCTL                    (0x20ull)\n+#define SSO_LF_GGRP_EXE_DIS                 (0x80ull)\n+#define SSO_LF_GGRP_INT                     (0x100ull)\n+#define SSO_LF_GGRP_INT_W1S                 (0x108ull)\n+#define SSO_LF_GGRP_INT_ENA_W1S             (0x110ull)\n+#define SSO_LF_GGRP_INT_ENA_W1C             (0x118ull)\n+#define SSO_LF_GGRP_INT_THR                 (0x140ull)\n+#define SSO_LF_GGRP_INT_CNT                 (0x180ull)\n+#define SSO_LF_GGRP_XAQ_CNT                 (0x1b0ull)\n+#define SSO_LF_GGRP_AQ_CNT                  (0x1c0ull)\n+#define SSO_LF_GGRP_AQ_THR                  (0x1e0ull)\n+#define SSO_LF_GGRP_MISC_CNT                (0x200ull)\n+\n #define USEC2NSEC(__us)                 ((__us) * 1E3)\n \n enum otx2_sso_lf_type {\n",
    "prefixes": [
        "v3",
        "05/42"
    ]
}