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GET /api/patches/55575/?format=api
{ "id": 55575, "url": "http://patches.dpdk.org/api/patches/55575/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190628075024.404-41-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190628075024.404-41-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190628075024.404-41-pbhagavatula@marvell.com", "date": "2019-06-28T07:50:19", "name": "[v2,40/44] event/octeontx2: add event timer stats get and reset", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c4df81cda8531f1cce32ef4f9be7fd5cbc1a10fa", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190628075024.404-41-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 5217, "url": "http://patches.dpdk.org/api/series/5217/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5217", "date": "2019-06-28T07:49:39", "name": "OCTEONTX2 event device driver", "version": 2, "mbox": "http://patches.dpdk.org/series/5217/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55575/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/55575/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A58361BB4D;\n\tFri, 28 Jun 2019 09:52:54 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id B178D1B9CB\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 09:51:53 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5S7oS6N025270 for <dev@dpdk.org>; Fri, 28 Jun 2019 00:51:53 -0700", "from sc-exch03.marvell.com ([199.233.58.183])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2tcvnhc6ma-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 00:51:53 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 00:51:50 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 00:51:50 -0700", "from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255])\n\tby maili.marvell.com (Postfix) with ESMTP id D95B13F7040;\n\tFri, 28 Jun 2019 00:51:49 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=vLEXLgaaN56MYIANvsebG0tlEjW7CukNTvdJxnr29iE=;\n\tb=ws2QvxcDOsGgnuBsx+5pqWFeS4xhv879ZXUcICTI8BKDSZBlpbQA+1YSqMN5wXQj1GAl\n\tadWtPGdVLFKfHIgbqwitDmtiTrurJ5vHCPV85vhR1Ln+OL4kMUAICD6FRCfQE7Xqtnvv\n\t0GFEOCp0PbIjgL3ZU4jzwkUYgVDHAKLPW/cQZ1OscppCY/R7RJYKNY76EIPJCFVf1COj\n\tOcPjuVRIXLyVsDkuycIFmpHqfmsW4urYFGw4lDEerwWKNPYLc+/WGRN2JEPxYF+pOmOf\n\txEFbmF23e6XjT2zAacwv3DQrWS1WGxgXFo16vAuudF/AQdAgv6Q0bOlyyyr31ZoT4lRb\n\tkA== ", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>", "CC": "<dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "Date": "Fri, 28 Jun 2019 13:20:19 +0530", "Message-ID": "<20190628075024.404-41-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190628075024.404-1-pbhagavatula@marvell.com>", "References": "<20190628075024.404-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_02:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v2 40/44] event/octeontx2: add event timer stats\n\tget and reset", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd event timer adapter statistics get and reset functions.\nStats are disabled by default and can be enabled through devargs.\nExample:\n\n\t--dev \"0002:0e:00.0,tim_stats_ena=1\"\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/octeontx2/otx2_tim_evdev.c | 55 ++++++++++++++---\n drivers/event/octeontx2/otx2_tim_evdev.h | 75 ++++++++++++++++-------\n drivers/event/octeontx2/otx2_tim_worker.c | 9 ++-\n 3 files changed, 104 insertions(+), 35 deletions(-)", "diff": "diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c\nindex d95be66c6..af68254f5 100644\n--- a/drivers/event/octeontx2/otx2_tim_evdev.c\n+++ b/drivers/event/octeontx2/otx2_tim_evdev.c\n@@ -35,24 +35,26 @@ tim_set_fp_ops(struct otx2_tim_ring *tim_ring)\n \tuint8_t prod_flag = !tim_ring->prod_type_sp;\n \n \t/* [MOD/AND] [DFB/FB] [SP][MP]*/\n-\tconst rte_event_timer_arm_burst_t arm_burst[2][2][2] = {\n-#define FP(_name, _f3, _f2, _f1, flags) \\\n-\t\t[_f3][_f2][_f1] = otx2_tim_arm_burst_ ## _name,\n+\tconst rte_event_timer_arm_burst_t arm_burst[2][2][2][2] = {\n+#define FP(_name, _f4, _f3, _f2, _f1, flags) \\\n+\t\t[_f4][_f3][_f2][_f1] = otx2_tim_arm_burst_ ## _name,\n TIM_ARM_FASTPATH_MODES\n #undef FP\n \t};\n \n-\tconst rte_event_timer_arm_tmo_tick_burst_t arm_tmo_burst[2][2] = {\n-#define FP(_name, _f2, _f1, flags) \\\n-\t\t[_f2][_f1] = otx2_tim_arm_tmo_tick_burst_ ## _name,\n+\tconst rte_event_timer_arm_tmo_tick_burst_t arm_tmo_burst[2][2][2] = {\n+#define FP(_name, _f3, _f2, _f1, flags) \\\n+\t\t[_f3][_f2][_f1] = otx2_tim_arm_tmo_tick_burst_ ## _name,\n TIM_ARM_TMO_FASTPATH_MODES\n #undef FP\n \t};\n \n-\totx2_tim_ops.arm_burst = arm_burst[tim_ring->optimized]\n-\t\t\t\t[tim_ring->ena_dfb][prod_flag];\n-\totx2_tim_ops.arm_tmo_tick_burst = arm_tmo_burst[tim_ring->optimized]\n-\t\t\t\t[tim_ring->ena_dfb];\n+\totx2_tim_ops.arm_burst =\n+\t\tarm_burst[tim_ring->enable_stats][tim_ring->optimized]\n+\t\t\t[tim_ring->ena_dfb][prod_flag];\n+\totx2_tim_ops.arm_tmo_tick_burst =\n+\t\tarm_tmo_burst[tim_ring->enable_stats][tim_ring->optimized]\n+\t\t\t[tim_ring->ena_dfb];\n \totx2_tim_ops.cancel_burst = otx2_tim_timer_cancel_burst;\n }\n \n@@ -300,6 +302,7 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr)\n \ttim_ring->chunk_sz = dev->chunk_sz;\n \tnb_timers = rcfg->nb_timers;\n \ttim_ring->disable_npa = dev->disable_npa;\n+\ttim_ring->enable_stats = dev->enable_stats;\n \n \ttim_ring->nb_chunks = nb_timers / OTX2_TIM_NB_CHUNK_SLOTS(\n \t\t\t\t\t\t\ttim_ring->chunk_sz);\n@@ -403,6 +406,30 @@ otx2_tim_ring_free(struct rte_event_timer_adapter *adptr)\n \treturn 0;\n }\n \n+static int\n+otx2_tim_stats_get(const struct rte_event_timer_adapter *adapter,\n+\t\t struct rte_event_timer_adapter_stats *stats)\n+{\n+\tstruct otx2_tim_ring *tim_ring = adapter->data->adapter_priv;\n+\tuint64_t bkt_cyc = rte_rdtsc() - tim_ring->ring_start_cyc;\n+\n+\n+\tstats->evtim_exp_count = rte_atomic64_read(&tim_ring->arm_cnt);\n+\tstats->ev_enq_count = stats->evtim_exp_count;\n+\tstats->adapter_tick_count = rte_reciprocal_divide_u64(bkt_cyc,\n+\t\t\t\t&tim_ring->fast_div);\n+\treturn 0;\n+}\n+\n+static int\n+otx2_tim_stats_reset(const struct rte_event_timer_adapter *adapter)\n+{\n+\tstruct otx2_tim_ring *tim_ring = adapter->data->adapter_priv;\n+\n+\trte_atomic64_clear(&tim_ring->arm_cnt);\n+\treturn 0;\n+}\n+\n int\n otx2_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n \t\t uint32_t *caps,\n@@ -418,6 +445,11 @@ otx2_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n \totx2_tim_ops.uninit = otx2_tim_ring_free;\n \totx2_tim_ops.get_info\t= otx2_tim_ring_info_get;\n \n+\tif (dev->enable_stats) {\n+\t\totx2_tim_ops.stats_get = otx2_tim_stats_get;\n+\t\totx2_tim_ops.stats_reset = otx2_tim_stats_reset;\n+\t}\n+\n \t/* Store evdev pointer for later use. */\n \tdev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev;\n \t*caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;\n@@ -428,6 +460,7 @@ otx2_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n \n #define OTX2_TIM_DISABLE_NPA\t\"tim_disable_npa\"\n #define OTX2_TIM_CHNK_SLOTS\t\"tim_chnk_slots\"\n+#define OTX2_TIM_STATS_ENA\t\"tim_stats_ena\"\n \n static void\n tim_parse_devargs(struct rte_devargs *devargs, struct otx2_tim_evdev *dev)\n@@ -445,6 +478,8 @@ tim_parse_devargs(struct rte_devargs *devargs, struct otx2_tim_evdev *dev)\n \t\t\t &parse_kvargs_flag, &dev->disable_npa);\n \trte_kvargs_process(kvlist, OTX2_TIM_CHNK_SLOTS,\n \t\t\t &parse_kvargs_value, &dev->chunk_slots);\n+\trte_kvargs_process(kvlist, OTX2_TIM_STATS_ENA, &parse_kvargs_flag,\n+\t\t\t &dev->enable_stats);\n }\n \n void\ndiff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h\nindex 7bdd5c8db..c8d16b03f 100644\n--- a/drivers/event/octeontx2/otx2_tim_evdev.h\n+++ b/drivers/event/octeontx2/otx2_tim_evdev.h\n@@ -79,6 +79,7 @@\n #define OTX2_TIM_BKT_MOD 0x8\n #define OTX2_TIM_ENA_FB 0x10\n #define OTX2_TIM_ENA_DFB 0x20\n+#define OTX2_TIM_ENA_STATS 0x40\n \n enum otx2_tim_clk_src {\n \tOTX2_TIM_CLK_SRC_10NS = RTE_EVENT_TIMER_ADAPTER_CPU_CLK,\n@@ -120,6 +121,7 @@ struct otx2_tim_evdev {\n \t/* Dev args */\n \tuint8_t disable_npa;\n \tuint16_t chunk_slots;\n+\tuint8_t enable_stats;\n \t/* MSIX offsets */\n \tuint16_t tim_msixoff[OTX2_MAX_TIM_RINGS];\n };\n@@ -133,7 +135,9 @@ struct otx2_tim_ring {\n \tstruct otx2_tim_bkt *bkt;\n \tstruct rte_mempool *chunk_pool;\n \tuint64_t tck_int;\n+\trte_atomic64_t arm_cnt;\n \tuint8_t prod_type_sp;\n+\tuint8_t enable_stats;\n \tuint8_t disable_npa;\n \tuint8_t optimized;\n \tuint8_t ena_dfb;\n@@ -159,32 +163,57 @@ tim_priv_get(void)\n \treturn mz->addr;\n }\n \n-#define TIM_ARM_FASTPATH_MODES\t\t\t\t\t\t \\\n-FP(mod_sp, 0, 0, 0, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_DFB | OTX2_TIM_SP) \\\n-FP(mod_mp, 0, 0, 1, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_DFB | OTX2_TIM_MP) \\\n-FP(mod_fb_sp, 0, 1, 0, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_FB | OTX2_TIM_SP) \\\n-FP(mod_fb_mp, 0, 1, 1, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_FB | OTX2_TIM_MP) \\\n-FP(and_sp, 1, 0, 0, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_DFB | OTX2_TIM_SP) \\\n-FP(and_mp, 1, 0, 1, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_DFB | OTX2_TIM_MP) \\\n-FP(and_fb_sp, 1, 1, 0, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_FB | OTX2_TIM_SP) \\\n-FP(and_fb_mp, 1, 1, 1, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_FB | OTX2_TIM_MP) \\\n-\n-#define FP(_name, _f3, _f2, _f1, flags)\t\t\t\t\t \\\n-uint16_t otx2_tim_arm_burst_ ## _name(\t\t\t\t\t \\\n-\t\t\tconst struct rte_event_timer_adapter *adptr,\t \\\n-\t\t\t\t struct rte_event_timer **tim,\t \\\n-\t\t\t\t const uint16_t nb_timers);\n+#define TIM_ARM_FASTPATH_MODES\t\t\t\t\t\t \\\n+FP(mod_sp, 0, 0, 0, 0, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_DFB | OTX2_TIM_SP) \\\n+FP(mod_mp, 0, 0, 0, 1, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_DFB | OTX2_TIM_MP) \\\n+FP(mod_fb_sp, 0, 0, 1, 0, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_FB | OTX2_TIM_SP) \\\n+FP(mod_fb_mp, 0, 0, 1, 1, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_FB | OTX2_TIM_MP) \\\n+FP(and_sp, 0, 1, 0, 0, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_DFB | OTX2_TIM_SP) \\\n+FP(and_mp, 0, 1, 0, 1, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_DFB | OTX2_TIM_MP) \\\n+FP(and_fb_sp, 0, 1, 1, 0, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_FB | OTX2_TIM_SP) \\\n+FP(and_fb_mp, 0, 1, 1, 1, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_FB | OTX2_TIM_MP) \\\n+FP(stats_mod_sp, 1, 0, 0, 0, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_MOD |\t \\\n+\tOTX2_TIM_ENA_DFB | OTX2_TIM_SP)\t\t\t\t\t \\\n+FP(stats_mod_mp, 1, 0, 0, 1, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_MOD |\t \\\n+\tOTX2_TIM_ENA_DFB | OTX2_TIM_MP)\t\t\t\t\t \\\n+FP(stats_mod_fb_sp, 1, 0, 1, 0, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_MOD |\t \\\n+\tOTX2_TIM_ENA_FB | OTX2_TIM_SP)\t\t\t\t\t \\\n+FP(stats_mod_fb_mp, 1, 0, 1, 1, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_MOD |\t \\\n+\tOTX2_TIM_ENA_FB | OTX2_TIM_MP)\t\t\t\t\t \\\n+FP(stats_and_sp, 1, 1, 0, 0, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_AND |\t \\\n+\tOTX2_TIM_ENA_DFB | OTX2_TIM_SP)\t\t\t\t\t \\\n+FP(stats_and_mp, 1, 1, 0, 1, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_AND |\t \\\n+\tOTX2_TIM_ENA_DFB | OTX2_TIM_MP)\t\t\t\t\t \\\n+FP(stats_and_fb_sp, 1, 1, 1, 0, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_AND |\t \\\n+\tOTX2_TIM_ENA_FB | OTX2_TIM_SP)\t\t\t\t\t \\\n+FP(stats_and_fb_mp, 1, 1, 1, 1, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_AND |\t \\\n+\tOTX2_TIM_ENA_FB | OTX2_TIM_MP)\n+\n+#define TIM_ARM_TMO_FASTPATH_MODES\t\t\t\t\t\\\n+FP(mod,\t\t 0, 0, 0, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_DFB)\t\t\\\n+FP(mod_fb,\t 0, 0, 1, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_FB)\t\t\\\n+FP(and,\t\t 0, 1, 0, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_DFB)\t\t\\\n+FP(and_fb,\t 0, 1, 1, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_FB)\t\t\\\n+FP(stats_mod,\t 1, 0, 0, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_MOD |\t\\\n+\tOTX2_TIM_ENA_DFB)\t\t\t\t\t\t\\\n+FP(stats_mod_fb, 1, 0, 1, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_MOD |\t\\\n+\tOTX2_TIM_ENA_FB)\t\t\t\t\t\t\\\n+FP(stats_and,\t 1, 1, 0, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_AND |\t\\\n+\tOTX2_TIM_ENA_DFB)\t\t\t\t\t\t\\\n+FP(stats_and_fb, 1, 1, 1, OTX2_TIM_ENA_STATS | OTX2_TIM_BKT_AND |\t\\\n+\tOTX2_TIM_ENA_FB)\n+\n+#define FP(_name, _f4, _f3, _f2, _f1, flags)\t\t\t\t \\\n+uint16_t\t\t\t\t\t\t\t\t \\\n+otx2_tim_arm_burst_ ## _name(const struct rte_event_timer_adapter *adptr, \\\n+\t\t\t struct rte_event_timer **tim,\t\t \\\n+\t\t\t const uint16_t nb_timers);\n TIM_ARM_FASTPATH_MODES\n #undef FP\n \n-#define TIM_ARM_TMO_FASTPATH_MODES\t\t\t\t\\\n-FP(mod, 0, 0, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_DFB)\t\\\n-FP(mod_fb, 0, 1, OTX2_TIM_BKT_MOD | OTX2_TIM_ENA_FB)\t\t\\\n-FP(and, 1, 0, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_DFB)\t\\\n-FP(and_fb, 1, 1, OTX2_TIM_BKT_AND | OTX2_TIM_ENA_FB)\t\t\\\n-\n-#define FP(_name, _f2, _f1, flags)\t\t\t\t\t\\\n-uint16_t otx2_tim_arm_tmo_tick_burst_ ## _name(\t\t\t\t\\\n+#define FP(_name, _f3, _f2, _f1, flags)\t\t\t\t\t\\\n+uint16_t\t\t\t\t\t\t\t\t\\\n+otx2_tim_arm_tmo_tick_burst_ ## _name(\t\t\t\t\t\\\n \t\tconst struct rte_event_timer_adapter *adptr,\t\t\\\n \t\tstruct rte_event_timer **tim,\t\t\t\t\\\n \t\tconst uint64_t timeout_tick, const uint16_t nb_timers);\ndiff --git a/drivers/event/octeontx2/otx2_tim_worker.c b/drivers/event/octeontx2/otx2_tim_worker.c\nindex fd1f02630..feba61cd4 100644\n--- a/drivers/event/octeontx2/otx2_tim_worker.c\n+++ b/drivers/event/octeontx2/otx2_tim_worker.c\n@@ -69,6 +69,9 @@ tim_timer_arm_burst(const struct rte_event_timer_adapter *adptr,\n \t\t}\n \t}\n \n+\tif (flags & OTX2_TIM_ENA_STATS)\n+\t\trte_atomic64_add(&tim_ring->arm_cnt, index);\n+\n \treturn index;\n }\n \n@@ -107,11 +110,13 @@ tim_timer_arm_tmo_brst(const struct rte_event_timer_adapter *adptr,\n \t\tif (ret != idx)\n \t\t\tbreak;\n \t}\n+\tif (flags & OTX2_TIM_ENA_STATS)\n+\t\trte_atomic64_add(&tim_ring->arm_cnt, set_timers);\n \n \treturn set_timers;\n }\n \n-#define FP(_name, _f3, _f2, _f1, _flags)\t\t\t\t \\\n+#define FP(_name, _f4, _f3, _f2, _f1, _flags)\t\t\t\t\\\n uint16_t __rte_noinline\t\t\t\t\t\t\t \\\n otx2_tim_arm_burst_ ## _name(const struct rte_event_timer_adapter *adptr, \\\n \t\t\t struct rte_event_timer **tim,\t\t \\\n@@ -122,7 +127,7 @@ otx2_tim_arm_burst_ ## _name(const struct rte_event_timer_adapter *adptr, \\\n TIM_ARM_FASTPATH_MODES\n #undef FP\n \n-#define FP(_name, _f2, _f1, _flags)\t\t\t\t\t\\\n+#define FP(_name, _f3, _f2, _f1, _flags)\t\t\t\t\\\n uint16_t __rte_noinline\t\t\t\t\t\t\t\\\n otx2_tim_arm_tmo_tick_burst_ ## _name(\t\t\t\t\t\\\n \t\t\tconst struct rte_event_timer_adapter *adptr,\t\\\n", "prefixes": [ "v2", "40/44" ] }