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GET /api/patches/55573/?format=api
{ "id": 55573, "url": "http://patches.dpdk.org/api/patches/55573/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190628075024.404-37-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190628075024.404-37-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190628075024.404-37-pbhagavatula@marvell.com", "date": "2019-06-28T07:50:15", "name": "[v2,36/44] event/octeontx2: add TIM bucket operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "2a395f16ab3ce9264624e5502d0e66d61b0b2c71", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190628075024.404-37-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 5217, "url": "http://patches.dpdk.org/api/series/5217/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5217", "date": "2019-06-28T07:49:39", "name": "OCTEONTX2 event device driver", "version": 2, "mbox": "http://patches.dpdk.org/series/5217/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55573/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/55573/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6B4A31BB3B;\n\tFri, 28 Jun 2019 09:52:50 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 208DC1B99D\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 09:51:48 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5S7o7c5001145 for <dev@dpdk.org>; Fri, 28 Jun 2019 00:51:48 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2tdd778au0-2\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 00:51:48 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 00:51:43 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 00:51:42 -0700", "from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255])\n\tby maili.marvell.com (Postfix) with ESMTP id C33CC3F7040;\n\tFri, 28 Jun 2019 00:51:41 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=TU8OO9nvcHieTV75oZUhs6cuZcdZMO5BEVtNzxHfXd4=;\n\tb=yv+jyXG+vFfuWel1uGRAnsulnrdlDUCX57Zfna4ZosWBvIneeTXb97758lm02H0S8IRA\n\tmW3cPTV2zlycxZU2243HJMRTY0pBnDcDp78JqZgmOuwrEmQuMXpBjaOYCJfgo+La9vUP\n\tzvKf70ZVHy3WuGJxiXSRtUqoD5j/PlkBGURAgP/8ZmfiDCZNLTxN+xFjuRVdB64yamwi\n\tQKDyZR3r0OBqr0Q6Xs+gNcgN/aZPJKmN/nJHTGevKDFcfaAapMhsUWZhCBdfZX7t1/mt\n\ttwtnCfMGFRddWp+/DxjNIe2+1t9LcpkEU/Rt5HA9MC18eZa7tRuWHEHfShhfq4uDBomQ\n\t1g== ", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>", "CC": "<dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "Date": "Fri, 28 Jun 2019 13:20:15 +0530", "Message-ID": "<20190628075024.404-37-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190628075024.404-1-pbhagavatula@marvell.com>", "References": "<20190628075024.404-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_02:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v2 36/44] event/octeontx2: add TIM bucket\n\toperations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd TIM bucket operations used for event timer arm and cancel.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/octeontx2/Makefile | 1 +\n drivers/event/octeontx2/meson.build | 1 +\n drivers/event/octeontx2/otx2_tim_evdev.h | 36 +++++++\n drivers/event/octeontx2/otx2_tim_worker.c | 7 ++\n drivers/event/octeontx2/otx2_tim_worker.h | 111 ++++++++++++++++++++++\n 5 files changed, 156 insertions(+)\n create mode 100644 drivers/event/octeontx2/otx2_tim_worker.c\n create mode 100644 drivers/event/octeontx2/otx2_tim_worker.h", "diff": "diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile\nindex 6f8d9fe2f..d01da6b11 100644\n--- a/drivers/event/octeontx2/Makefile\n+++ b/drivers/event/octeontx2/Makefile\n@@ -32,6 +32,7 @@ LIBABIVER := 1\n \n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker_dual.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_tim_worker.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_adptr.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_tim_evdev.c\ndiff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build\nindex c709b5e69..bdb5beed6 100644\n--- a/drivers/event/octeontx2/meson.build\n+++ b/drivers/event/octeontx2/meson.build\n@@ -9,6 +9,7 @@ sources = files('otx2_worker.c',\n \t\t'otx2_evdev_irq.c',\n \t\t'otx2_evdev_selftest.c',\n \t\t'otx2_tim_evdev.c',\n+\t\t'otx2_tim_worker.c'\n \t\t)\n \n allow_experimental_apis = true\ndiff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h\nindex aac7dc711..2be5d5f07 100644\n--- a/drivers/event/octeontx2/otx2_tim_evdev.h\n+++ b/drivers/event/octeontx2/otx2_tim_evdev.h\n@@ -25,6 +25,42 @@\n #define TIM_LF_RAS_INT_ENA_W1S\t\t(0x310)\n #define TIM_LF_RAS_INT_ENA_W1C\t\t(0x318)\n \n+#define TIM_BUCKET_W1_S_CHUNK_REMAINDER\t(48)\n+#define TIM_BUCKET_W1_M_CHUNK_REMAINDER\t((1ULL << (64 - \\\n+\t\t\t\t\t TIM_BUCKET_W1_S_CHUNK_REMAINDER)) - 1)\n+#define TIM_BUCKET_W1_S_LOCK\t\t(40)\n+#define TIM_BUCKET_W1_M_LOCK\t\t((1ULL <<\t\\\n+\t\t\t\t\t (TIM_BUCKET_W1_S_CHUNK_REMAINDER - \\\n+\t\t\t\t\t TIM_BUCKET_W1_S_LOCK)) - 1)\n+#define TIM_BUCKET_W1_S_RSVD\t\t(35)\n+#define TIM_BUCKET_W1_S_BSK\t\t(34)\n+#define TIM_BUCKET_W1_M_BSK\t\t((1ULL <<\t\\\n+\t\t\t\t\t (TIM_BUCKET_W1_S_RSVD -\t \\\n+\t\t\t\t\t TIM_BUCKET_W1_S_BSK)) - 1)\n+#define TIM_BUCKET_W1_S_HBT\t\t(33)\n+#define TIM_BUCKET_W1_M_HBT\t\t((1ULL <<\t\\\n+\t\t\t\t\t (TIM_BUCKET_W1_S_BSK -\t\t \\\n+\t\t\t\t\t TIM_BUCKET_W1_S_HBT)) - 1)\n+#define TIM_BUCKET_W1_S_SBT\t\t(32)\n+#define TIM_BUCKET_W1_M_SBT\t\t((1ULL <<\t\\\n+\t\t\t\t\t (TIM_BUCKET_W1_S_HBT -\t\t \\\n+\t\t\t\t\t TIM_BUCKET_W1_S_SBT)) - 1)\n+#define TIM_BUCKET_W1_S_NUM_ENTRIES\t(0)\n+#define TIM_BUCKET_W1_M_NUM_ENTRIES\t((1ULL <<\t\\\n+\t\t\t\t\t (TIM_BUCKET_W1_S_SBT -\t\t \\\n+\t\t\t\t\t TIM_BUCKET_W1_S_NUM_ENTRIES)) - 1)\n+\n+#define TIM_BUCKET_SEMA\t\t\t(TIM_BUCKET_CHUNK_REMAIN)\n+\n+#define TIM_BUCKET_CHUNK_REMAIN \\\n+\t(TIM_BUCKET_W1_M_CHUNK_REMAINDER << TIM_BUCKET_W1_S_CHUNK_REMAINDER)\n+\n+#define TIM_BUCKET_LOCK \\\n+\t(TIM_BUCKET_W1_M_LOCK << TIM_BUCKET_W1_S_LOCK)\n+\n+#define TIM_BUCKET_SEMA_WLOCK \\\n+\t(TIM_BUCKET_CHUNK_REMAIN | (1ull << TIM_BUCKET_W1_S_LOCK))\n+\n #define OTX2_MAX_TIM_RINGS\t\t(256)\n #define OTX2_TIM_MAX_BUCKETS\t\t(0xFFFFF)\n #define OTX2_TIM_RING_DEF_CHUNK_SZ\t(4096)\ndiff --git a/drivers/event/octeontx2/otx2_tim_worker.c b/drivers/event/octeontx2/otx2_tim_worker.c\nnew file mode 100644\nindex 000000000..29ed1fd5a\n--- /dev/null\n+++ b/drivers/event/octeontx2/otx2_tim_worker.c\n@@ -0,0 +1,7 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#include \"otx2_tim_evdev.h\"\n+#include \"otx2_tim_worker.h\"\n+\ndiff --git a/drivers/event/octeontx2/otx2_tim_worker.h b/drivers/event/octeontx2/otx2_tim_worker.h\nnew file mode 100644\nindex 000000000..ccb137d13\n--- /dev/null\n+++ b/drivers/event/octeontx2/otx2_tim_worker.h\n@@ -0,0 +1,111 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef __OTX2_TIM_WORKER_H__\n+#define __OTX2_TIM_WORKER_H__\n+\n+#include \"otx2_tim_evdev.h\"\n+\n+static inline int16_t\n+tim_bkt_fetch_rem(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_CHUNK_REMAINDER) &\n+\t\tTIM_BUCKET_W1_M_CHUNK_REMAINDER;\n+}\n+\n+static inline int16_t\n+tim_bkt_get_rem(struct otx2_tim_bkt *bktp)\n+{\n+\treturn __atomic_load_n(&bktp->chunk_remainder, __ATOMIC_ACQUIRE);\n+}\n+\n+static inline void\n+tim_bkt_set_rem(struct otx2_tim_bkt *bktp, uint16_t v)\n+{\n+\t__atomic_store_n(&bktp->chunk_remainder, v, __ATOMIC_RELAXED);\n+}\n+\n+static inline void\n+tim_bkt_sub_rem(struct otx2_tim_bkt *bktp, uint16_t v)\n+{\n+\t__atomic_fetch_sub(&bktp->chunk_remainder, v, __ATOMIC_RELAXED);\n+}\n+\n+static inline uint8_t\n+tim_bkt_get_hbt(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_HBT) & TIM_BUCKET_W1_M_HBT;\n+}\n+\n+static inline uint8_t\n+tim_bkt_get_bsk(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_BSK) & TIM_BUCKET_W1_M_BSK;\n+}\n+\n+static inline uint64_t\n+tim_bkt_clr_bsk(struct otx2_tim_bkt *bktp)\n+{\n+\t/* Clear everything except lock. */\n+\tconst uint64_t v = TIM_BUCKET_W1_M_LOCK << TIM_BUCKET_W1_S_LOCK;\n+\n+\treturn __atomic_fetch_and(&bktp->w1, v, __ATOMIC_ACQ_REL);\n+}\n+\n+static inline uint64_t\n+tim_bkt_fetch_sema_lock(struct otx2_tim_bkt *bktp)\n+{\n+\treturn __atomic_fetch_add(&bktp->w1, TIM_BUCKET_SEMA_WLOCK,\n+\t\t\t__ATOMIC_ACQUIRE);\n+}\n+\n+static inline uint64_t\n+tim_bkt_fetch_sema(struct otx2_tim_bkt *bktp)\n+{\n+\treturn __atomic_fetch_add(&bktp->w1, TIM_BUCKET_SEMA, __ATOMIC_RELAXED);\n+}\n+\n+static inline uint64_t\n+tim_bkt_inc_lock(struct otx2_tim_bkt *bktp)\n+{\n+\tconst uint64_t v = 1ull << TIM_BUCKET_W1_S_LOCK;\n+\n+\treturn __atomic_fetch_add(&bktp->w1, v, __ATOMIC_ACQUIRE);\n+}\n+\n+static inline void\n+tim_bkt_dec_lock(struct otx2_tim_bkt *bktp)\n+{\n+\t__atomic_add_fetch(&bktp->lock, 0xff, __ATOMIC_RELEASE);\n+}\n+\n+static inline uint32_t\n+tim_bkt_get_nent(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_NUM_ENTRIES) &\n+\t\tTIM_BUCKET_W1_M_NUM_ENTRIES;\n+}\n+\n+static inline void\n+tim_bkt_inc_nent(struct otx2_tim_bkt *bktp)\n+{\n+\t__atomic_add_fetch(&bktp->nb_entry, 1, __ATOMIC_RELAXED);\n+}\n+\n+static inline void\n+tim_bkt_add_nent(struct otx2_tim_bkt *bktp, uint32_t v)\n+{\n+\t__atomic_add_fetch(&bktp->nb_entry, v, __ATOMIC_RELAXED);\n+}\n+\n+static inline uint64_t\n+tim_bkt_clr_nent(struct otx2_tim_bkt *bktp)\n+{\n+\tconst uint64_t v = ~(TIM_BUCKET_W1_M_NUM_ENTRIES <<\n+\t\t\tTIM_BUCKET_W1_S_NUM_ENTRIES);\n+\n+\treturn __atomic_and_fetch(&bktp->w1, v, __ATOMIC_ACQ_REL);\n+}\n+\n+#endif /* __OTX2_TIM_WORKER_H__ */\n", "prefixes": [ "v2", "36/44" ] }