get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/55453/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 55453,
    "url": "http://patches.dpdk.org/api/patches/55453/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/e30ecb668dcaa501954baf15b00ed16615e49cce.1561620219.git.xuanziyang2@huawei.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<e30ecb668dcaa501954baf15b00ed16615e49cce.1561620219.git.xuanziyang2@huawei.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/e30ecb668dcaa501954baf15b00ed16615e49cce.1561620219.git.xuanziyang2@huawei.com",
    "date": "2019-06-27T08:20:20",
    "name": "[v6,15/15] net/hinic: add RSS stats promiscuous ops",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "54881d8a7cbd63513eedd76c463084204a65708f",
    "submitter": {
        "id": 1321,
        "url": "http://patches.dpdk.org/api/people/1321/?format=api",
        "name": "Ziyang Xuan",
        "email": "xuanziyang2@huawei.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/e30ecb668dcaa501954baf15b00ed16615e49cce.1561620219.git.xuanziyang2@huawei.com/mbox/",
    "series": [
        {
            "id": 5191,
            "url": "http://patches.dpdk.org/api/series/5191/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5191",
            "date": "2019-06-27T08:10:12",
            "name": "A new net PMD - hinic",
            "version": 6,
            "mbox": "http://patches.dpdk.org/series/5191/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/55453/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/55453/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DB7443237;\n\tThu, 27 Jun 2019 10:09:10 +0200 (CEST)",
            "from huawei.com (szxga06-in.huawei.com [45.249.212.32])\n\tby dpdk.org (Postfix) with ESMTP id 2DCFD2B98\n\tfor <dev@dpdk.org>; Thu, 27 Jun 2019 10:09:08 +0200 (CEST)",
            "from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.58])\n\tby Forcepoint Email with ESMTP id 3857D5F2DEFACABE2CB1\n\tfor <dev@dpdk.org>; Thu, 27 Jun 2019 16:09:06 +0800 (CST)",
            "from tester_149.localdomain (10.175.119.39) by\n\tDGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP\n\tServer id 14.3.439.0; Thu, 27 Jun 2019 16:08:23 +0800"
        ],
        "From": "Ziyang Xuan <xuanziyang2@huawei.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<ferruh.yigit@intel.com>, <cloud.wangxiaoyun@huawei.com>,\n\t<shahar.belkar@huawei.com>, <luoxianjun@huawei.com>,\n\t<tanya.brokhman@huawei.com>, Ziyang Xuan <xuanziyang2@huawei.com>",
        "Date": "Thu, 27 Jun 2019 16:20:20 +0800",
        "Message-ID": "<e30ecb668dcaa501954baf15b00ed16615e49cce.1561620219.git.xuanziyang2@huawei.com>",
        "X-Mailer": "git-send-email 2.18.0",
        "In-Reply-To": "<cover.1561620219.git.xuanziyang2@huawei.com>",
        "References": "<cover.1561620219.git.xuanziyang2@huawei.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[10.175.119.39]",
        "X-CFilter-Loop": "Reflected",
        "Subject": "[dpdk-dev] [PATCH v6 15/15] net/hinic: add RSS stats promiscuous ops",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add RSS, stats, promiscuous ops related function codes.\n\nSigned-off-by: Ziyang Xuan <xuanziyang2@huawei.com>\n---\n drivers/net/hinic/hinic_pmd_ethdev.c | 735 +++++++++++++++++++++++++++\n 1 file changed, 735 insertions(+)",
    "diff": "diff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c\nindex 6bd35a227..044af9053 100644\n--- a/drivers/net/hinic/hinic_pmd_ethdev.c\n+++ b/drivers/net/hinic/hinic_pmd_ethdev.c\n@@ -46,6 +46,163 @@\n /** Driver-specific log messages type. */\n int hinic_logtype;\n \n+struct hinic_xstats_name_off {\n+\tchar name[RTE_ETH_XSTATS_NAME_SIZE];\n+\tu32  offset;\n+};\n+\n+#define HINIC_FUNC_STAT(_stat_item) {\t\\\n+\t.name = #_stat_item, \\\n+\t.offset = offsetof(struct hinic_vport_stats, _stat_item) \\\n+}\n+\n+#define HINIC_PORT_STAT(_stat_item) { \\\n+\t.name = #_stat_item, \\\n+\t.offset = offsetof(struct hinic_phy_port_stats, _stat_item) \\\n+}\n+\n+static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {\n+\tHINIC_FUNC_STAT(tx_unicast_pkts_vport),\n+\tHINIC_FUNC_STAT(tx_unicast_bytes_vport),\n+\tHINIC_FUNC_STAT(tx_multicast_pkts_vport),\n+\tHINIC_FUNC_STAT(tx_multicast_bytes_vport),\n+\tHINIC_FUNC_STAT(tx_broadcast_pkts_vport),\n+\tHINIC_FUNC_STAT(tx_broadcast_bytes_vport),\n+\n+\tHINIC_FUNC_STAT(rx_unicast_pkts_vport),\n+\tHINIC_FUNC_STAT(rx_unicast_bytes_vport),\n+\tHINIC_FUNC_STAT(rx_multicast_pkts_vport),\n+\tHINIC_FUNC_STAT(rx_multicast_bytes_vport),\n+\tHINIC_FUNC_STAT(rx_broadcast_pkts_vport),\n+\tHINIC_FUNC_STAT(rx_broadcast_bytes_vport),\n+\n+\tHINIC_FUNC_STAT(tx_discard_vport),\n+\tHINIC_FUNC_STAT(rx_discard_vport),\n+\tHINIC_FUNC_STAT(tx_err_vport),\n+\tHINIC_FUNC_STAT(rx_err_vport),\n+};\n+\n+#define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \\\n+\t\tsizeof(hinic_vport_stats_strings[0]))\n+\n+static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {\n+\tHINIC_PORT_STAT(mac_rx_total_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_total_oct_num),\n+\tHINIC_PORT_STAT(mac_rx_bad_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_bad_oct_num),\n+\tHINIC_PORT_STAT(mac_rx_good_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_good_oct_num),\n+\tHINIC_PORT_STAT(mac_rx_uni_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_multi_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_broad_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_total_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_total_oct_num),\n+\tHINIC_PORT_STAT(mac_tx_bad_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_bad_oct_num),\n+\tHINIC_PORT_STAT(mac_tx_good_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_good_oct_num),\n+\tHINIC_PORT_STAT(mac_tx_uni_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_multi_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_broad_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_fragment_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_undersize_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_undermin_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_64_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_oversize_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_jabber_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_mac_pause_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_mac_control_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_sym_err_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),\n+\tHINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_fragment_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_undersize_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_undermin_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_64_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_oversize_pkt_num),\n+\tHINIC_PORT_STAT(mac_trans_jabber_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_mac_pause_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_mac_control_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_err_all_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),\n+\tHINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),\n+};\n+\n+#define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \\\n+\t\tsizeof(hinic_phyport_stats_strings[0]))\n+\n+static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {\n+\t{\"rx_nombuf\", offsetof(struct hinic_rxq_stats, rx_nombuf)},\n+\t{\"burst_pkt\", offsetof(struct hinic_rxq_stats, burst_pkts)},\n+};\n+\n+#define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \\\n+\t\tsizeof(hinic_rxq_stats_strings[0]))\n+\n+static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {\n+\t{\"tx_busy\", offsetof(struct hinic_txq_stats, tx_busy)},\n+\t{\"offload_errors\", offsetof(struct hinic_txq_stats, off_errs)},\n+\t{\"copy_pkts\", offsetof(struct hinic_txq_stats, cpy_pkts)},\n+\t{\"rl_drop\", offsetof(struct hinic_txq_stats, rl_drop)},\n+\t{\"burst_pkts\", offsetof(struct hinic_txq_stats, burst_pkts)},\n+};\n+\n+#define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \\\n+\t\tsizeof(hinic_txq_stats_strings[0]))\n+\n+static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)\n+{\n+\treturn (HINIC_VPORT_XSTATS_NUM +\n+\t\tHINIC_PHYPORT_XSTATS_NUM +\n+\t\tHINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +\n+\t\tHINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);\n+}\n+\n static const struct rte_eth_desc_lim hinic_rx_desc_lim = {\n \t.nb_max = HINIC_MAX_QUEUE_DEPTH,\n \t.nb_min = HINIC_MIN_QUEUE_DEPTH,\n@@ -945,6 +1102,141 @@ static void hinic_disable_interrupt(struct rte_eth_dev *dev)\n \t\t\t    retries);\n }\n \n+static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)\n+{\n+\tu32 rx_mode_ctrl = nic_dev->rx_mode_status;\n+\n+\tif (enable)\n+\t\trx_mode_ctrl |= HINIC_RX_MODE_PROMISC;\n+\telse\n+\t\trx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);\n+\n+\treturn hinic_config_rx_mode(nic_dev, rx_mode_ctrl);\n+}\n+\n+/**\n+ * DPDK callback to get device statistics.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ * @param stats\n+ *   Stats structure output buffer.\n+ *\n+ * @return\n+ *   0 on success and stats is filled,\n+ *   negative error value otherwise.\n+ */\n+static int\n+hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)\n+{\n+\tint i, err, q_num;\n+\tu64 rx_discards_pmd = 0;\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\tstruct hinic_vport_stats vport_stats;\n+\tstruct hinic_rxq\t*rxq = NULL;\n+\tstruct hinic_rxq_stats rxq_stats;\n+\tstruct hinic_txq\t*txq = NULL;\n+\tstruct hinic_txq_stats txq_stats;\n+\n+\terr = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR, \"Get vport stats from fw failed, nic_dev: %s\",\n+\t\t\tnic_dev->proc_dev_name);\n+\t\treturn err;\n+\t}\n+\n+\t/* rx queue stats */\n+\tq_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?\n+\t\t\tnic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;\n+\tfor (i = 0; i < q_num; i++) {\n+\t\trxq = nic_dev->rxqs[i];\n+\t\thinic_rxq_get_stats(rxq, &rxq_stats);\n+\t\tstats->q_ipackets[i] = rxq_stats.packets;\n+\t\tstats->q_ibytes[i] = rxq_stats.bytes;\n+\t\tstats->q_errors[i] = rxq_stats.rx_discards;\n+\n+\t\tstats->ierrors += rxq_stats.errors;\n+\t\trx_discards_pmd += rxq_stats.rx_discards;\n+\t\tdev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;\n+\t}\n+\n+\t/* tx queue stats */\n+\tq_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?\n+\t\tnic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;\n+\tfor (i = 0; i < q_num; i++) {\n+\t\ttxq = nic_dev->txqs[i];\n+\t\thinic_txq_get_stats(txq, &txq_stats);\n+\t\tstats->q_opackets[i] = txq_stats.packets;\n+\t\tstats->q_obytes[i] = txq_stats.bytes;\n+\t\tstats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);\n+\t}\n+\n+\t/* vport stats */\n+\tstats->oerrors += vport_stats.tx_discard_vport;\n+\n+\tstats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;\n+\n+\tstats->ipackets = (vport_stats.rx_unicast_pkts_vport +\n+\t\t\tvport_stats.rx_multicast_pkts_vport +\n+\t\t\tvport_stats.rx_broadcast_pkts_vport -\n+\t\t\trx_discards_pmd);\n+\n+\tstats->opackets = (vport_stats.tx_unicast_pkts_vport +\n+\t\t\tvport_stats.tx_multicast_pkts_vport +\n+\t\t\tvport_stats.tx_broadcast_pkts_vport);\n+\n+\tstats->ibytes = (vport_stats.rx_unicast_bytes_vport +\n+\t\t\tvport_stats.rx_multicast_bytes_vport +\n+\t\t\tvport_stats.rx_broadcast_bytes_vport);\n+\n+\tstats->obytes = (vport_stats.tx_unicast_bytes_vport +\n+\t\t\tvport_stats.tx_multicast_bytes_vport +\n+\t\t\tvport_stats.tx_broadcast_bytes_vport);\n+\treturn 0;\n+}\n+\n+/**\n+ * DPDK callback to clear device statistics.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ */\n+static void hinic_dev_stats_reset(struct rte_eth_dev *dev)\n+{\n+\tint qid;\n+\tstruct hinic_rxq\t*rxq = NULL;\n+\tstruct hinic_txq\t*txq = NULL;\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\n+\thinic_clear_vport_stats(nic_dev->hwdev);\n+\n+\tfor (qid = 0; qid < nic_dev->num_rq; qid++) {\n+\t\trxq = nic_dev->rxqs[qid];\n+\t\thinic_rxq_stats_reset(rxq);\n+\t}\n+\n+\tfor (qid = 0; qid < nic_dev->num_sq; qid++) {\n+\t\ttxq = nic_dev->txqs[qid];\n+\t\thinic_txq_stats_reset(txq);\n+\t}\n+}\n+\n+/**\n+ * DPDK callback to clear device extended statistics.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ **/\n+static void hinic_dev_xstats_reset(struct rte_eth_dev *dev)\n+{\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\n+\thinic_dev_stats_reset(dev);\n+\n+\tif (hinic_func_type(nic_dev->hwdev) != TYPE_VF)\n+\t\thinic_clear_phy_port_stats(nic_dev->hwdev);\n+}\n+\n static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)\n {\n \tuint64_t random_value;\n@@ -1026,6 +1318,438 @@ static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)\n \t\t\t    eth_dev->data->name);\n }\n \n+/**\n+ * DPDK callback to enable promiscuous mode.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ */\n+static void hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)\n+{\n+\tint rc = HINIC_OK;\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\n+\tPMD_DRV_LOG(INFO, \"Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d\",\n+\t\t    nic_dev->proc_dev_name, dev->data->port_id,\n+\t\t    dev->data->promiscuous);\n+\n+\trc = hinic_set_dev_promiscuous(nic_dev, true);\n+\tif (rc)\n+\t\tPMD_DRV_LOG(ERR, \"Enable promiscuous failed\");\n+}\n+\n+/**\n+ * DPDK callback to disable promiscuous mode.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ */\n+static void hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)\n+{\n+\tint rc = HINIC_OK;\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\n+\tPMD_DRV_LOG(INFO, \"Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d\",\n+\t\t    nic_dev->proc_dev_name, dev->data->port_id,\n+\t\t    dev->data->promiscuous);\n+\n+\trc = hinic_set_dev_promiscuous(nic_dev, false);\n+\tif (rc)\n+\t\tPMD_DRV_LOG(ERR, \"Disable promiscuous failed\");\n+}\n+\n+/**\n+ * DPDK callback to update the RSS hash key and RSS hash type.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ * @param rss_conf\n+ *   RSS configuration data.\n+ *\n+ * @return\n+ *   0 on success, negative error value otherwise.\n+ */\n+static int hinic_rss_hash_update(struct rte_eth_dev *dev,\n+\t\t\t  struct rte_eth_rss_conf *rss_conf)\n+{\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\tu8 tmpl_idx = nic_dev->rss_tmpl_idx;\n+\tu8 hashkey[HINIC_RSS_KEY_SIZE] = {0};\n+\tu8 prio_tc[HINIC_DCB_UP_MAX] = {0};\n+\tu64 rss_hf = rss_conf->rss_hf;\n+\tstruct nic_rss_type rss_type = {0};\n+\tint err = 0;\n+\n+\tif (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {\n+\t\tPMD_DRV_LOG(WARNING, \"RSS is not enabled\");\n+\t\treturn HINIC_OK;\n+\t}\n+\n+\tif (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {\n+\t\tPMD_DRV_LOG(ERR, \"Invalid rss key, rss_key_len:%d\",\n+\t\t\t    rss_conf->rss_key_len);\n+\t\treturn HINIC_ERROR;\n+\t}\n+\n+\tif (rss_conf->rss_key) {\n+\t\tmemcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);\n+\t\terr = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,\n+\t\t\t\t\t\t hashkey);\n+\t\tif (err) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Set rss template table failed\");\n+\t\t\tgoto disable_rss;\n+\t\t}\n+\t}\n+\n+\trss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;\n+\trss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;\n+\trss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;\n+\trss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;\n+\trss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;\n+\trss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;\n+\trss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;\n+\trss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;\n+\n+\terr = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR, \"Set rss type table failed\");\n+\t\tgoto disable_rss;\n+\t}\n+\n+\treturn 0;\n+\n+disable_rss:\n+\tmemset(prio_tc, 0, sizeof(prio_tc));\n+\t(void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);\n+\treturn err;\n+}\n+\n+/**\n+ * DPDK callback to get the RSS hash configuration.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ * @param rss_conf\n+ *   RSS configuration data.\n+ *\n+ * @return\n+ *   0 on success, negative error value otherwise.\n+ */\n+static int hinic_rss_conf_get(struct rte_eth_dev *dev,\n+\t\t       struct rte_eth_rss_conf *rss_conf)\n+{\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\tu8 tmpl_idx = nic_dev->rss_tmpl_idx;\n+\tu8 hashkey[HINIC_RSS_KEY_SIZE] = {0};\n+\tstruct nic_rss_type rss_type = {0};\n+\tint err;\n+\n+\tif (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {\n+\t\tPMD_DRV_LOG(WARNING, \"RSS is not enabled\");\n+\t\treturn HINIC_ERROR;\n+\t}\n+\n+\terr = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);\n+\tif (err)\n+\t\treturn err;\n+\n+\tif (rss_conf->rss_key &&\n+\t    rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {\n+\t\tmemcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));\n+\t\trss_conf->rss_key_len = sizeof(hashkey);\n+\t}\n+\n+\terr = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);\n+\tif (err)\n+\t\treturn err;\n+\n+\trss_conf->rss_hf = 0;\n+\trss_conf->rss_hf |=  rss_type.ipv4 ?\n+\t\t(ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;\n+\trss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;\n+\trss_conf->rss_hf |=  rss_type.ipv6 ?\n+\t\t(ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;\n+\trss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;\n+\trss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;\n+\trss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;\n+\trss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;\n+\trss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;\n+\n+\treturn HINIC_OK;\n+}\n+\n+/**\n+ * DPDK callback to update the RETA indirection table.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ * @param reta_conf\n+ *   Pointer to RETA configuration structure array.\n+ * @param reta_size\n+ *   Size of the RETA table.\n+ *\n+ * @return\n+ *   0 on success, negative error value otherwise.\n+ */\n+static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,\n+\t\t\t      struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t      uint16_t reta_size)\n+{\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\tu8 tmpl_idx = nic_dev->rss_tmpl_idx;\n+\tu8 prio_tc[HINIC_DCB_UP_MAX] = {0};\n+\tu32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};\n+\tint err = 0;\n+\tu16 i = 0;\n+\tu16 idx, shift;\n+\n+\tif (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))\n+\t\treturn HINIC_OK;\n+\n+\tif (reta_size != NIC_RSS_INDIR_SIZE) {\n+\t\tPMD_DRV_LOG(ERR, \"Invalid reta size, reta_size:%d\", reta_size);\n+\t\treturn HINIC_ERROR;\n+\t}\n+\n+\terr = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);\n+\tif (err)\n+\t\treturn err;\n+\n+\t/* update rss indir_tbl */\n+\tfor (i = 0; i < reta_size; i++) {\n+\t\tidx = i / RTE_RETA_GROUP_SIZE;\n+\t\tshift = i % RTE_RETA_GROUP_SIZE;\n+\t\tif (reta_conf[idx].mask & (1ULL << shift))\n+\t\t\tindirtbl[i] = reta_conf[idx].reta[shift];\n+\t}\n+\n+\tfor (i = 0 ; i < reta_size; i++) {\n+\t\tif (indirtbl[i] >= nic_dev->num_rq) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Invalid reta entry, index:%d, num_rq:%d\",\n+\t\t\t\t    i, nic_dev->num_rq);\n+\t\t\tgoto disable_rss;\n+\t\t}\n+\t}\n+\n+\terr = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);\n+\tif (err)\n+\t\tgoto disable_rss;\n+\n+\tnic_dev->rss_indir_flag = true;\n+\n+\treturn 0;\n+\n+disable_rss:\n+\tmemset(prio_tc, 0, sizeof(prio_tc));\n+\t(void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);\n+\n+\treturn HINIC_ERROR;\n+}\n+\n+\n+/**\n+ * DPDK callback to get the RETA indirection table.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ * @param reta_conf\n+ *   Pointer to RETA configuration structure array.\n+ * @param reta_size\n+ *   Size of the RETA table.\n+ *\n+ * @return\n+ *   0 on success, negative error value otherwise.\n+ */\n+static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,\n+\t\t\t     struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t     uint16_t reta_size)\n+{\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\tu8 tmpl_idx = nic_dev->rss_tmpl_idx;\n+\tint err = 0;\n+\tu32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};\n+\tu16 idx, shift;\n+\tu16 i = 0;\n+\n+\tif (reta_size != NIC_RSS_INDIR_SIZE) {\n+\t\tPMD_DRV_LOG(ERR, \"Invalid reta size, reta_size:%d\", reta_size);\n+\t\treturn HINIC_ERROR;\n+\t}\n+\n+\terr = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR, \"Get rss indirect table failed, error:%d\",\n+\t\t\t    err);\n+\t\treturn err;\n+\t}\n+\n+\tfor (i = 0; i < reta_size; i++) {\n+\t\tidx = i / RTE_RETA_GROUP_SIZE;\n+\t\tshift = i % RTE_RETA_GROUP_SIZE;\n+\t\tif (reta_conf[idx].mask & (1ULL << shift))\n+\t\t\treta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];\n+\t}\n+\n+\treturn HINIC_OK;\n+}\n+\n+/**\n+ * DPDK callback to get extended device statistics.\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device.\n+ * @param xstats\n+ *   Pointer to rte extended stats table.\n+ * @param n\n+ *   The size of the stats table.\n+ *\n+ * @return\n+ *   Number of extended stats on success and stats is filled,\n+ *   negative error value otherwise.\n+ */\n+static int hinic_dev_xstats_get(struct rte_eth_dev *dev,\n+\t\t\t struct rte_eth_xstat *xstats,\n+\t\t\t unsigned int n)\n+{\n+\tu16 qid = 0;\n+\tu32 i;\n+\tint err, count;\n+\tstruct hinic_nic_dev *nic_dev;\n+\tstruct hinic_phy_port_stats port_stats;\n+\tstruct hinic_vport_stats vport_stats;\n+\tstruct hinic_rxq\t*rxq = NULL;\n+\tstruct hinic_rxq_stats rxq_stats;\n+\tstruct hinic_txq\t*txq = NULL;\n+\tstruct hinic_txq_stats txq_stats;\n+\n+\tnic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\tcount = hinic_xstats_calc_num(nic_dev);\n+\tif ((int)n < count)\n+\t\treturn count;\n+\n+\tcount = 0;\n+\n+\t/* Get stats from hinic_rxq_stats */\n+\tfor (qid = 0; qid < nic_dev->num_rq; qid++) {\n+\t\trxq = nic_dev->rxqs[qid];\n+\t\thinic_rxq_get_stats(rxq, &rxq_stats);\n+\n+\t\tfor (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {\n+\t\t\txstats[count].value =\n+\t\t\t\t*(uint64_t *)(((char *)&rxq_stats) +\n+\t\t\t\thinic_rxq_stats_strings[i].offset);\n+\t\t\txstats[count].id = count;\n+\t\t\tcount++;\n+\t\t}\n+\t}\n+\n+\t/* Get stats from hinic_txq_stats */\n+\tfor (qid = 0; qid < nic_dev->num_sq; qid++) {\n+\t\ttxq = nic_dev->txqs[qid];\n+\t\thinic_txq_get_stats(txq, &txq_stats);\n+\n+\t\tfor (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {\n+\t\t\txstats[count].value =\n+\t\t\t\t*(uint64_t *)(((char *)&txq_stats) +\n+\t\t\t\thinic_txq_stats_strings[i].offset);\n+\t\t\txstats[count].id = count;\n+\t\t\tcount++;\n+\t\t}\n+\t}\n+\n+\t/* Get stats from hinic_vport_stats */\n+\terr = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);\n+\tif (err)\n+\t\treturn err;\n+\n+\tfor (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {\n+\t\txstats[count].value =\n+\t\t\t*(uint64_t *)(((char *)&vport_stats) +\n+\t\t\thinic_vport_stats_strings[i].offset);\n+\t\txstats[count].id = count;\n+\t\tcount++;\n+\t}\n+\n+\t/* Get stats from hinic_phy_port_stats */\n+\terr = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);\n+\tif (err)\n+\t\treturn err;\n+\n+\tfor (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {\n+\t\txstats[count].value = *(uint64_t *)(((char *)&port_stats) +\n+\t\t\t\thinic_phyport_stats_strings[i].offset);\n+\t\txstats[count].id = count;\n+\t\tcount++;\n+\t}\n+\n+\treturn count;\n+}\n+\n+/**\n+ * DPDK callback to retrieve names of extended device statistics\n+ *\n+ * @param dev\n+ *   Pointer to Ethernet device structure.\n+ * @param xstats_names\n+ *   Buffer to insert names into.\n+ *\n+ * @return\n+ *   Number of xstats names.\n+ */\n+static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,\n+\t\t\t       struct rte_eth_xstat_name *xstats_names,\n+\t\t\t       __rte_unused unsigned int limit)\n+{\n+\tstruct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);\n+\tint count = 0;\n+\tu16 i = 0, q_num;\n+\n+\tif (xstats_names == NULL)\n+\t\treturn hinic_xstats_calc_num(nic_dev);\n+\n+\t/* get pmd rxq stats */\n+\tfor (q_num = 0; q_num < nic_dev->num_rq; q_num++) {\n+\t\tfor (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {\n+\t\t\tsnprintf(xstats_names[count].name,\n+\t\t\t\t sizeof(xstats_names[count].name),\n+\t\t\t\t \"rxq%d_%s_pmd\",\n+\t\t\t\t q_num, hinic_rxq_stats_strings[i].name);\n+\t\t\tcount++;\n+\t\t}\n+\t}\n+\n+\t/* get pmd txq stats */\n+\tfor (q_num = 0; q_num < nic_dev->num_sq; q_num++) {\n+\t\tfor (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {\n+\t\t\tsnprintf(xstats_names[count].name,\n+\t\t\t\t sizeof(xstats_names[count].name),\n+\t\t\t\t \"txq%d_%s_pmd\",\n+\t\t\t\t q_num, hinic_txq_stats_strings[i].name);\n+\t\t\tcount++;\n+\t\t}\n+\t}\n+\n+\t/* get vport stats */\n+\tfor (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {\n+\t\tsnprintf(xstats_names[count].name,\n+\t\t\t sizeof(xstats_names[count].name),\n+\t\t\t \"%s\",\n+\t\t\t hinic_vport_stats_strings[i].name);\n+\t\tcount++;\n+\t}\n+\n+\t/* get phy port stats */\n+\tfor (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {\n+\t\tsnprintf(xstats_names[count].name,\n+\t\t\t sizeof(xstats_names[count].name),\n+\t\t\t \"%s\",\n+\t\t\t hinic_phyport_stats_strings[i].name);\n+\t\tcount++;\n+\t}\n+\n+\treturn count;\n+}\n+\n static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)\n {\n \tstruct nic_pause_config pause_config = {0};\n@@ -1527,6 +2251,17 @@ static const struct eth_dev_ops hinic_pmd_ops = {\n \t.tx_queue_release              = hinic_tx_queue_release,\n \t.dev_stop                      = hinic_dev_stop,\n \t.dev_close                     = hinic_dev_close,\n+\t.promiscuous_enable            = hinic_dev_promiscuous_enable,\n+\t.promiscuous_disable           = hinic_dev_promiscuous_disable,\n+\t.rss_hash_update               = hinic_rss_hash_update,\n+\t.rss_hash_conf_get             = hinic_rss_conf_get,\n+\t.reta_update                   = hinic_rss_indirtbl_update,\n+\t.reta_query                    = hinic_rss_indirtbl_query,\n+\t.stats_get                     = hinic_dev_stats_get,\n+\t.stats_reset                   = hinic_dev_stats_reset,\n+\t.xstats_get                    = hinic_dev_xstats_get,\n+\t.xstats_reset                  = hinic_dev_xstats_reset,\n+\t.xstats_get_names              = hinic_dev_xstats_get_names,\n };\n \n static int hinic_dev_init(struct rte_eth_dev *eth_dev)\n",
    "prefixes": [
        "v6",
        "15/15"
    ]
}