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GET /api/patches/55351/?format=api
{ "id": 55351, "url": "http://patches.dpdk.org/api/patches/55351/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190625153217.24301-28-jasvinder.singh@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190625153217.24301-28-jasvinder.singh@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190625153217.24301-28-jasvinder.singh@intel.com", "date": "2019-06-25T15:32:16", "name": "[v2,27/28] sched: code cleanup", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "4ddd80ad6fbc908acd2a960f8fed8095ffb57866", "submitter": { "id": 285, "url": "http://patches.dpdk.org/api/people/285/?format=api", "name": "Jasvinder Singh", "email": "jasvinder.singh@intel.com" }, "delegate": { "id": 10018, "url": "http://patches.dpdk.org/api/users/10018/?format=api", "username": "cristian_dumitrescu", "first_name": "Cristian", "last_name": "Dumitrescu", "email": "cristian.dumitrescu@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190625153217.24301-28-jasvinder.singh@intel.com/mbox/", "series": [ { "id": 5160, "url": "http://patches.dpdk.org/api/series/5160/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5160", "date": "2019-06-25T15:31:49", "name": "sched: feature enhancements", "version": 2, "mbox": "http://patches.dpdk.org/series/5160/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55351/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/55351/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 345421BC10;\n\tTue, 25 Jun 2019 17:33:02 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby dpdk.org (Postfix) with ESMTP id 71A1C1BB32\n\tfor <dev@dpdk.org>; Tue, 25 Jun 2019 17:32:40 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n\tby fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t25 Jun 2019 08:32:39 -0700", "from silpixa00381635.ir.intel.com (HELO\n\tsilpixa00381635.ger.corp.intel.com) ([10.237.223.4])\n\tby orsmga006.jf.intel.com with ESMTP; 25 Jun 2019 08:32:38 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.63,416,1557212400\"; d=\"scan'208\";a=\"166711719\"", "From": "Jasvinder Singh <jasvinder.singh@intel.com>", "To": "dev@dpdk.org", "Cc": "cristian.dumitrescu@intel.com, Abraham Tovar <abrahamx.tovar@intel.com>, \n\tLukasz Krakowiak <lukaszx.krakowiak@intel.com>", "Date": "Tue, 25 Jun 2019 16:32:16 +0100", "Message-Id": "<20190625153217.24301-28-jasvinder.singh@intel.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190625153217.24301-1-jasvinder.singh@intel.com>", "References": "<20190528120553.2992-2-lukaszx.krakowiak@intel.com>\n\t<20190625153217.24301-1-jasvinder.singh@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 27/28] sched: code cleanup", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Remove redundant macros and fields from the data structures.\n\nSigned-off-by: Jasvinder Singh <jasvinder.singh@intel.com>\nSigned-off-by: Abraham Tovar <abrahamx.tovar@intel.com>\nSigned-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>\n---\n lib/librte_sched/rte_sched.c | 43 ------------------------------------\n lib/librte_sched/rte_sched.h | 25 +++------------------\n 2 files changed, 3 insertions(+), 65 deletions(-)", "diff": "diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c\nindex cc1dcf7ab..b214e4283 100644\n--- a/lib/librte_sched/rte_sched.c\n+++ b/lib/librte_sched/rte_sched.c\n@@ -193,7 +193,6 @@ struct rte_sched_pipe {\n \t/* TC oversubscription */\n \tuint32_t tc_ov_credits;\n \tuint8_t tc_ov_period_id;\n-\tuint8_t reserved[3];\n } __rte_cache_aligned;\n \n struct rte_sched_queue {\n@@ -211,18 +210,10 @@ struct rte_sched_queue_extra {\n struct rte_sched_port {\n \t/* User parameters */\n \tuint32_t n_subports_per_port;\n-\tuint32_t n_pipes_per_subport;\n-\tuint32_t n_pipes_per_subport_log2;\n \tint socket;\n \tuint32_t rate;\n \tuint32_t mtu;\n \tuint32_t frame_overhead;\n-\tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n-\tuint32_t n_pipe_profiles;\n-\tuint32_t pipe_tc3_rate_max;\n-#ifdef RTE_SCHED_RED\n-\tstruct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS];\n-#endif\n \n \t/* Timing */\n \tuint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */\n@@ -230,50 +221,17 @@ struct rte_sched_port {\n \tuint64_t time; /* Current NIC TX time measured in bytes */\n \tstruct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */\n \n-\t/* Scheduling loop detection */\n-\tuint32_t pipe_loop;\n-\tuint32_t pipe_exhaustion;\n-\n-\t/* Bitmap */\n-\tstruct rte_bitmap *bmp;\n-\tuint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;\n-\n \t/* Grinders */\n-\tstruct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];\n-\tuint32_t busy_grinders;\n \tstruct rte_mbuf **pkts_out;\n \tuint32_t n_pkts_out;\n \tuint32_t subport_id;\n \n \tuint32_t max_subport_pipes_log2; /* Max number of subport pipes */\n \n-\t/* Queue base calculation */\n-\tuint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];\n-\tuint32_t qsize_sum;\n-\n \t/* Large data structures */\n-\tstruct rte_sched_subport *subport;\n-\tstruct rte_sched_pipe *pipe;\n-\tstruct rte_sched_queue *queue;\n-\tstruct rte_sched_queue_extra *queue_extra;\n-\tstruct rte_sched_pipe_profile *pipe_profiles;\n-\tuint8_t *bmp_array;\n-\tstruct rte_mbuf **queue_array;\n \tstruct rte_sched_subport *subports[0];\n-\tuint8_t memory[0] __rte_cache_aligned;\n } __rte_cache_aligned;\n \n-enum rte_sched_port_array {\n-\te_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,\n-\te_RTE_SCHED_PORT_ARRAY_PIPE,\n-\te_RTE_SCHED_PORT_ARRAY_QUEUE,\n-\te_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,\n-\te_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,\n-\te_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,\n-\te_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,\n-\te_RTE_SCHED_PORT_ARRAY_TOTAL,\n-};\n-\n enum rte_sched_subport_array {\n \te_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,\n \te_RTE_SCHED_SUBPORT_ARRAY_QUEUE,\n@@ -2458,7 +2416,6 @@ grinder_next_pipe(struct rte_sched_subport *subport, uint32_t pos)\n \treturn 1;\n }\n \n-\n static inline void\n grinder_wrr_load(struct rte_sched_subport *subport, uint32_t pos)\n {\ndiff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h\nindex 1f690036d..8fe6ea904 100644\n--- a/lib/librte_sched/rte_sched.h\n+++ b/lib/librte_sched/rte_sched.h\n@@ -82,7 +82,6 @@ extern \"C\" {\n */\n #define RTE_SCHED_BE_QUEUES_PER_PIPE 8\n \n-#define RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS 4\n /** Number of traffic classes per pipe (as well as subport).\n *\n * @see struct rte_sched_subport_params\n@@ -91,13 +90,6 @@ extern \"C\" {\n #define RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE \\\n (RTE_SCHED_QUEUES_PER_PIPE - RTE_SCHED_BE_QUEUES_PER_PIPE + 1)\n \n-/** Maximum number of pipe profiles that can be defined per subport.\n- * Compile-time configurable.\n- */\n-#ifndef RTE_SCHED_PIPE_PROFILES_PER_PORT\n-#define RTE_SCHED_PIPE_PROFILES_PER_PORT 256\n-#endif\n-\n /*\n * Ethernet framing overhead. Overhead fields per Ethernet frame:\n * 1. Preamble: 7 bytes;\n@@ -126,6 +118,7 @@ extern \"C\" {\n struct rte_sched_pipe_params {\n \t/** Token bucket rate (measured in bytes per second) */\n \tuint32_t tb_rate;\n+\n \t/** Token bucket size (measured in credits) */\n \tuint32_t tb_size;\n \n@@ -134,6 +127,7 @@ struct rte_sched_pipe_params {\n \n \t/** Enforcement period (measured in milliseconds) */\n \tuint32_t tc_period;\n+\n #ifdef RTE_SCHED_SUBPORT_TC_OV\n \t/** Best-effort traffic class oversubscription weight */\n \tuint8_t tc_ov_weight;\n@@ -185,11 +179,11 @@ struct rte_sched_subport_params {\n \n \t/** Max profiles allowed in the pipe profile table */\n \tuint32_t n_max_pipe_profiles;\n+\n #ifdef RTE_SCHED_RED\n \t/** RED parameters */\n \tstruct rte_red_params\n \t\tred_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS];\n-\n #endif\n };\n \n@@ -254,19 +248,6 @@ struct rte_sched_port_params {\n \n \t/** Number of subports */\n \tuint32_t n_subports_per_port;\n-\tuint32_t n_pipes_per_subport; /**< Number of pipes per subport */\n-\tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n-\t/**< Packet queue size for each traffic class.\n-\t * All queues within the same pipe traffic class have the same\n-\t * size. Queues from different pipes serving the same traffic\n-\t * class have the same size. */\n-\tstruct rte_sched_pipe_params *pipe_profiles;\n-\t/**< Pipe profile table.\n-\t * Every pipe is configured using one of the profiles from this table. */\n-\tuint32_t n_pipe_profiles; /**< Profiles in the pipe profile table */\n-#ifdef RTE_SCHED_RED\n-\tstruct rte_red_params red_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; /**< RED parameters */\n-#endif\n };\n \n /*\n", "prefixes": [ "v2", "27/28" ] }