Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/55320/?format=api
{ "id": 55320, "url": "http://patches.dpdk.org/api/patches/55320/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190625145811.22154-7-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190625145811.22154-7-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190625145811.22154-7-bruce.richardson@intel.com", "date": "2019-06-25T14:58:09", "name": "[v2,6/8] raw/ioat: add configure, start and stop functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "34e348a96abb860d071474b0733c111e591eab7f", "submitter": { "id": 20, "url": "http://patches.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190625145811.22154-7-bruce.richardson@intel.com/mbox/", "series": [ { "id": 5158, "url": "http://patches.dpdk.org/api/series/5158/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5158", "date": "2019-06-25T14:58:03", "name": "raw/ioat: driver for Intel QuickData Technology", "version": 2, "mbox": "http://patches.dpdk.org/series/5158/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55320/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/55320/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0E0DB1BAE6;\n\tTue, 25 Jun 2019 16:58:43 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id 13ABD1BA8E\n\tfor <dev@dpdk.org>; Tue, 25 Jun 2019 16:58:31 +0200 (CEST)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t25 Jun 2019 07:58:31 -0700", "from silpixa00399126.ir.intel.com (HELO\n\tsilpixa00399126.ger.corp.intel.com) ([10.237.223.2])\n\tby fmsmga006.fm.intel.com with ESMTP; 25 Jun 2019 07:58:30 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.63,416,1557212400\"; d=\"scan'208\";a=\"360422239\"", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, jerinj@marvell.com,\n\tBruce Richardson <bruce.richardson@intel.com>", "Date": "Tue, 25 Jun 2019 15:58:09 +0100", "Message-Id": "<20190625145811.22154-7-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190625145811.22154-1-bruce.richardson@intel.com>", "References": "<20190530212525.40370-1-bruce.richardson@intel.com>\n\t<20190625145811.22154-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 6/8] raw/ioat: add configure,\n\tstart and stop functions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Allow initializing a driver instance. Include selftest to validate these\nfunctions.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n\n---\n\nV2: test cases placed in self-test routine\n---\n app/test/test_rawdev.c | 2 +-\n doc/guides/rawdevs/ioat_rawdev.rst | 32 ++++++++++++\n drivers/raw/ioat/Makefile | 1 +\n drivers/raw/ioat/ioat_rawdev.c | 78 +++++++++++++++++++++++++++++\n drivers/raw/ioat/ioat_rawdev_test.c | 41 +++++++++++++++\n drivers/raw/ioat/meson.build | 3 +-\n drivers/raw/ioat/rte_ioat_rawdev.h | 15 ++++++\n 7 files changed, 170 insertions(+), 2 deletions(-)\n create mode 100644 drivers/raw/ioat/ioat_rawdev_test.c", "diff": "diff --git a/app/test/test_rawdev.c b/app/test/test_rawdev.c\nindex 4db762b4c..731e51717 100644\n--- a/app/test/test_rawdev.c\n+++ b/app/test/test_rawdev.c\n@@ -36,7 +36,7 @@ test_rawdev_selftest_ioat(void)\n \t\tstruct rte_rawdev_info info = { .dev_private = NULL };\n \t\tif (rte_rawdev_info_get(i, &info) == 0 &&\n \t\t\t\tstrstr(info.driver_name, \"ioat\") != NULL)\n-\t\t\treturn 0;\n+\t\t\treturn rte_rawdev_selftest(i);\n \t}\n \n \tprintf(\"No IOAT rawdev found, skipping tests\\n\");\ndiff --git a/doc/guides/rawdevs/ioat_rawdev.rst b/doc/guides/rawdevs/ioat_rawdev.rst\nindex 0ce984490..9ab97e2aa 100644\n--- a/doc/guides/rawdevs/ioat_rawdev.rst\n+++ b/doc/guides/rawdevs/ioat_rawdev.rst\n@@ -117,3 +117,35 @@ the ``dev_private`` field in the ``rte_rawdev_info`` struct should either\n be NULL, or else be set to point to a structure of type\n ``rte_ioat_rawdev_config``, in which case the size of the configured device\n input ring will be returned in that structure.\n+\n+Device Configuration\n+~~~~~~~~~~~~~~~~~~~~~\n+\n+Configuring an IOAT rawdev device is done using the\n+``rte_rawdev_configure()`` API, which takes the same structure parameters\n+as the, previously referenced, ``rte_rawdev_info_get()`` API. The main\n+difference is that, because the parameter is used as input rather than\n+output, the ``dev_private`` structure element cannot be NULL, and must\n+point to a valid ``rte_ioat_rawdev_config`` structure, containing the ring\n+size to be used by the device. The ring size must be a power of two,\n+between 64 and 4096.\n+\n+The following code shows how the device is configured in\n+``test_ioat_rawdev.c``:\n+\n+.. code-block:: C\n+\n+ #define IOAT_TEST_RINGSIZE 512\n+ struct rte_ioat_rawdev_config p = { .ring_size = -1 };\n+ struct rte_rawdev_info info = { .dev_private = &p };\n+\n+ /* ... */\n+\n+ p.ring_size = IOAT_TEST_RINGSIZE;\n+ if (rte_rawdev_configure(dev_id, &info) != 0) {\n+ printf(\"Error with rte_rawdev_configure()\\n\");\n+ return -1;\n+ }\n+\n+Once configured, the device can then be made ready for use by calling the\n+``rte_rawdev_start()`` API.\ndiff --git a/drivers/raw/ioat/Makefile b/drivers/raw/ioat/Makefile\nindex 1e10938f3..b1af9c666 100644\n--- a/drivers/raw/ioat/Makefile\n+++ b/drivers/raw/ioat/Makefile\n@@ -21,6 +21,7 @@ EXPORT_MAP := rte_pmd_ioat_version.map\n \n # library source files\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV) += ioat_rawdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV) += ioat_rawdev_test.c\n \n # export include files\n SYMLINK-y-include += rte_ioat_rawdev.h\ndiff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c\nindex 08e7586c6..46f41c661 100644\n--- a/drivers/raw/ioat/ioat_rawdev.c\n+++ b/drivers/raw/ioat/ioat_rawdev.c\n@@ -24,6 +24,78 @@ static struct rte_pci_driver ioat_pmd_drv;\n #define IOAT_PMD_ERR(fmt, args...) IOAT_PMD_LOG(ERR, fmt, ## args)\n #define IOAT_PMD_WARN(fmt, args...) IOAT_PMD_LOG(WARNING, fmt, ## args)\n \n+#define DESC_SZ sizeof(struct rte_ioat_desc)\n+#define COMPLETION_SZ sizeof(__m128i)\n+\n+static int\n+ioat_dev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config)\n+{\n+\tstruct rte_ioat_rawdev_config *params = config;\n+\tstruct rte_ioat_rawdev *ioat = dev->dev_private;\n+\tunsigned short i;\n+\n+\tif (dev->started)\n+\t\treturn -EBUSY;\n+\n+\tif (params == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (params->ring_size > 4096 || params->ring_size < 64 ||\n+\t\t\t!rte_is_power_of_2(params->ring_size))\n+\t\treturn -EINVAL;\n+\n+\tioat->ring_size = params->ring_size;\n+\tif (ioat->desc_ring != NULL) {\n+\t\trte_free(ioat->desc_ring);\n+\t\tioat->desc_ring = NULL;\n+\t}\n+\n+\t/* allocate one block of memory for both descriptors\n+\t * and completion handles.\n+\t */\n+\tioat->desc_ring = rte_zmalloc_socket(NULL,\n+\t\t\t(DESC_SZ + COMPLETION_SZ) * ioat->ring_size,\n+\t\t\t0, /* alignment, default to 64Byte */\n+\t\t\tdev->device->numa_node);\n+\tif (ioat->desc_ring == NULL)\n+\t\treturn -ENOMEM;\n+\tioat->hdls = (void *)&ioat->desc_ring[ioat->ring_size];\n+\n+\tioat->ring_addr = rte_malloc_virt2iova(ioat->desc_ring);\n+\n+\t/* configure descriptor ring - each one points to next */\n+\tfor (i = 0; i < ioat->ring_size; i++) {\n+\t\tioat->desc_ring[i].next_desc_addr = ioat->ring_addr +\n+\t\t\t\t(((i + 1) % ioat->ring_size) * DESC_SZ);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ioat_dev_start(struct rte_rawdev *dev)\n+{\n+\tstruct rte_ioat_rawdev *ioat = dev->dev_private;\n+\n+\tif (ioat->ring_size == 0 || ioat->desc_ring == NULL)\n+\t\treturn -EBUSY;\n+\n+\t/* inform hardware of where the descriptor ring is */\n+\tioat->regs->chainaddr = ioat->ring_addr;\n+\t/* inform hardware of where to write the status/completions */\n+\tioat->regs->chancmp = ioat->status_addr;\n+\n+\t/* prime the status register to be set to the last element */\n+\tioat->status = ioat->ring_addr + ((ioat->ring_size - 1) * DESC_SZ);\n+\treturn 0;\n+}\n+\n+static void\n+ioat_dev_stop(struct rte_rawdev *dev)\n+{\n+\tRTE_SET_USED(dev);\n+}\n+\n static void\n ioat_dev_info_get(struct rte_rawdev *dev, rte_rawdev_obj_t dev_info)\n {\n@@ -34,11 +106,17 @@ ioat_dev_info_get(struct rte_rawdev *dev, rte_rawdev_obj_t dev_info)\n \t\tcfg->ring_size = ioat->ring_size;\n }\n \n+int ioat_rawdev_test(uint16_t dev_id);\n+\n static int\n ioat_rawdev_create(const char *name, struct rte_pci_device *dev)\n {\n \tstatic const struct rte_rawdev_ops ioat_rawdev_ops = {\n+\t\t\t.dev_configure = ioat_dev_configure,\n+\t\t\t.dev_start = ioat_dev_start,\n+\t\t\t.dev_stop = ioat_dev_stop,\n \t\t\t.dev_info_get = ioat_dev_info_get,\n+\t\t\t.dev_selftest = ioat_rawdev_test,\n \t};\n \n \tstruct rte_rawdev *rawdev = NULL;\ndiff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c\nnew file mode 100644\nindex 000000000..5375da26c\n--- /dev/null\n+++ b/drivers/raw/ioat/ioat_rawdev_test.c\n@@ -0,0 +1,41 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019 Intel Corporation\n+ */\n+\n+#include \"rte_rawdev.h\"\n+#include \"rte_ioat_rawdev.h\"\n+\n+int ioat_rawdev_test(uint16_t dev_id); /* pre-define to keep compiler happy */\n+\n+int\n+ioat_rawdev_test(uint16_t dev_id)\n+{\n+#define IOAT_TEST_RINGSIZE 512\n+\tstruct rte_ioat_rawdev_config p = { .ring_size = -1 };\n+\tstruct rte_rawdev_info info = { .dev_private = &p };\n+\n+\trte_rawdev_info_get(dev_id, &info);\n+\tif (p.ring_size != 0) {\n+\t\tprintf(\"Error, initial ring size is non-zero (%d)\\n\",\n+\t\t\t\t(int)p.ring_size);\n+\t\treturn -1;\n+\t}\n+\n+\tp.ring_size = IOAT_TEST_RINGSIZE;\n+\tif (rte_rawdev_configure(dev_id, &info) != 0) {\n+\t\tprintf(\"Error with rte_rawdev_configure()\\n\");\n+\t\treturn -1;\n+\t}\n+\trte_rawdev_info_get(dev_id, &info);\n+\tif (p.ring_size != IOAT_TEST_RINGSIZE) {\n+\t\tprintf(\"Error, ring size is not %d (%d)\\n\",\n+\t\t\t\tIOAT_TEST_RINGSIZE, (int)p.ring_size);\n+\t\treturn -1;\n+\t}\n+\n+\tif (rte_rawdev_start(dev_id) != 0) {\n+\t\tprintf(\"Error with rte_rawdev_start()\\n\");\n+\t\treturn -1;\n+\t}\n+\treturn 0;\n+}\ndiff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build\nindex ca23e23fc..40fff6654 100644\n--- a/drivers/raw/ioat/meson.build\n+++ b/drivers/raw/ioat/meson.build\n@@ -2,7 +2,8 @@\n # Copyright 2019 Intel Corporation\n \n build = dpdk_conf.has('RTE_ARCH_X86')\n-sources = files('ioat_rawdev.c')\n+sources = files('ioat_rawdev.c',\n+\t\t'ioat_rawdev_test.c')\n deps += ['rawdev', 'bus_pci']\n \n install_headers('rte_ioat_rawdev.h',\ndiff --git a/drivers/raw/ioat/rte_ioat_rawdev.h b/drivers/raw/ioat/rte_ioat_rawdev.h\nindex 7e0d72ca3..0c41a9dcf 100644\n--- a/drivers/raw/ioat/rte_ioat_rawdev.h\n+++ b/drivers/raw/ioat/rte_ioat_rawdev.h\n@@ -14,6 +14,7 @@\n * @b EXPERIMENTAL: these structures and APIs may change without prior notice\n */\n \n+#include <x86intrin.h>\n #include <rte_memory.h>\n #include <rte_ioat_spec.h>\n \n@@ -47,9 +48,23 @@ struct rte_ioat_rawdev {\n \n \tunsigned short ring_size;\n \tstruct rte_ioat_desc *desc_ring;\n+\t__m128i *hdls; /* completion handles for returning to user */\n \n \t/* to report completions, the device will write status back here */\n \tvolatile uint64_t status __rte_cache_aligned;\n };\n \n+/**\n+ * @internal\n+ * Structure representing a descriptor for a copy operation\n+ */\n+struct rte_ioat_desc {\n+\tuint32_t xfer_size __rte_cache_aligned;\n+\tuint32_t desc_control;\n+\tphys_addr_t src_addr; /* 64 bits */\n+\tphys_addr_t dest_addr; /* 64 bits */\n+\tphys_addr_t next_desc_addr; /* 64 bits */\n+\tuint64_t op_type_specific[4];\n+};\n+\n #endif\n", "prefixes": [ "v2", "6/8" ] }