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GET /api/patches/55212/?format=api
{ "id": 55212, "url": "http://patches.dpdk.org/api/patches/55212/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190622132417.32694-24-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190622132417.32694-24-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190622132417.32694-24-jerinj@marvell.com", "date": "2019-06-22T13:24:13", "name": "[v4,23/27] mempool/octeontx2: add remaining slow path ops", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "7726f5eaa20a4f4c07480ae19151a7425abbf997", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190622132417.32694-24-jerinj@marvell.com/mbox/", "series": [ { "id": 5124, "url": "http://patches.dpdk.org/api/series/5124/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5124", "date": "2019-06-22T13:23:50", "name": "OCTEON TX2 common and mempool driver", "version": 4, "mbox": "http://patches.dpdk.org/series/5124/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55212/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/55212/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8EBDE1C5DB;\n\tSat, 22 Jun 2019 15:26:27 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 401831C61B\n\tfor <dev@dpdk.org>; Sat, 22 Jun 2019 15:25:39 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5MDOdZT028280 for <dev@dpdk.org>; Sat, 22 Jun 2019 06:25:38 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2t9hpnrgh3-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Sat, 22 Jun 2019 06:25:38 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSat, 22 Jun 2019 06:25:37 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sat, 22 Jun 2019 06:25:37 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 1A7733F703F;\n\tSat, 22 Jun 2019 06:25:35 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=GWCHk9BPrzpW+EEHNrh4WIrPaZC3CiMeCAHF02iIDss=;\n\tb=SJwUreJ8ySkM+w3jyxgoZ2mFLCLMJn4kYF98UpYFZNzmpcA/pTRntRpLfEZFUfLWmM+4\n\tZZ7ZEPXKk//23hC9pC62nK4iKxEDo6tl9GOAJJUqramhp19pPCBF6tNhOBIk/MDn3iQp\n\txEJLrrRUAGzKzmmmBnnky72iAdFUJJyUW/Tne+vkNj4JSxhad1W29Em648v0IScWEqRF\n\thJXeYTZ3HFuRnGTYPUX1fAOKQC2d80k8SZTlAlQartjZKWZwR58inuOb3NQ9eJD7j7TT\n\tyhgJNNLp5xzKwcsfAVp6IaihGqellUYo9kaJTQ3la3ppBIq/PRpBoVtzA/OjSFWMVIpO\n\tlA== ", "From": "<jerinj@marvell.com>", "To": "Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Sat, 22 Jun 2019 18:54:13 +0530", "Message-ID": "<20190622132417.32694-24-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190622132417.32694-1-jerinj@marvell.com>", "References": "<20190617155537.36144-1-jerinj@marvell.com>\n\t<20190622132417.32694-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-22_09:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v4 23/27] mempool/octeontx2: add remaining slow\n\tpath ops", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jerin Jacob <jerinj@marvell.com>\n\nAdd remaining get_count(), calc_mem_size() and populate() slow path\nmempool operations.\n\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\n---\n drivers/mempool/octeontx2/otx2_mempool.c | 17 ++++++\n drivers/mempool/octeontx2/otx2_mempool.h | 15 ++++-\n drivers/mempool/octeontx2/otx2_mempool_ops.c | 62 ++++++++++++++++++++\n 3 files changed, 92 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/mempool/octeontx2/otx2_mempool.c b/drivers/mempool/octeontx2/otx2_mempool.c\nindex 1bcb86cf4..c47f95fb0 100644\n--- a/drivers/mempool/octeontx2/otx2_mempool.c\n+++ b/drivers/mempool/octeontx2/otx2_mempool.c\n@@ -105,8 +105,24 @@ npa_lf_init(struct otx2_npa_lf *lf, uintptr_t base, uint8_t aura_sz,\n \t\tgoto bmap_free;\n \t}\n \n+\t/* Allocate memory for nap_aura_lim memory */\n+\tlf->aura_lim = rte_zmalloc(\"npa_aura_lim_mem\",\n+\t\t\tsizeof(struct npa_aura_lim) * nr_pools, 0);\n+\tif (lf->aura_lim == NULL) {\n+\t\trc = -ENOMEM;\n+\t\tgoto qint_free;\n+\t}\n+\n+\t/* Init aura start & end limits */\n+\tfor (i = 0; i < nr_pools; i++) {\n+\t\tlf->aura_lim[i].ptr_start = UINT64_MAX;\n+\t\tlf->aura_lim[i].ptr_end = 0x0ull;\n+\t}\n+\n \treturn 0;\n \n+qint_free:\n+\trte_free(lf->npa_qint_mem);\n bmap_free:\n \trte_bitmap_free(lf->npa_bmp);\n bmap_mem_free:\n@@ -123,6 +139,7 @@ npa_lf_fini(struct otx2_npa_lf *lf)\n \tif (!lf)\n \t\treturn NPA_LF_ERR_PARAM;\n \n+\trte_free(lf->aura_lim);\n \trte_free(lf->npa_qint_mem);\n \trte_bitmap_free(lf->npa_bmp);\n \trte_free(lf->npa_bmp_mem);\ndiff --git a/drivers/mempool/octeontx2/otx2_mempool.h b/drivers/mempool/octeontx2/otx2_mempool.h\nindex efaa308b3..adcc0db24 100644\n--- a/drivers/mempool/octeontx2/otx2_mempool.h\n+++ b/drivers/mempool/octeontx2/otx2_mempool.h\n@@ -29,6 +29,11 @@ struct otx2_npa_qint {\n \tuint8_t qintx;\n };\n \n+struct npa_aura_lim {\n+\tuint64_t ptr_start;\n+\tuint64_t ptr_end;\n+};\n+\n struct otx2_npa_lf {\n \tuint16_t qints;\n \tuintptr_t base;\n@@ -42,6 +47,7 @@ struct otx2_npa_lf {\n \tuint32_t stack_pg_ptrs;\n \tuint32_t stack_pg_bytes;\n \tstruct rte_bitmap *npa_bmp;\n+\tstruct npa_aura_lim *aura_lim;\n \tstruct rte_pci_device *pci_dev;\n \tstruct rte_intr_handle *intr_handle;\n };\n@@ -185,11 +191,16 @@ npa_lf_aura_op_range_set(uint64_t aura_handle, uint64_t start_iova,\n \t\t\t\tuint64_t end_iova)\n {\n \tuint64_t reg = npa_lf_aura_handle_to_aura(aura_handle);\n+\tstruct otx2_npa_lf *lf = otx2_npa_lf_obj_get();\n+\tstruct npa_aura_lim *lim = lf->aura_lim;\n \n-\totx2_store_pair(start_iova, reg,\n+\tlim[reg].ptr_start = RTE_MIN(lim[reg].ptr_start, start_iova);\n+\tlim[reg].ptr_end = RTE_MAX(lim[reg].ptr_end, end_iova);\n+\n+\totx2_store_pair(lim[reg].ptr_start, reg,\n \t\t\tnpa_lf_aura_handle_to_base(aura_handle) +\n \t\t\tNPA_LF_POOL_OP_PTR_START0);\n-\totx2_store_pair(end_iova, reg,\n+\totx2_store_pair(lim[reg].ptr_end, reg,\n \t\t\tnpa_lf_aura_handle_to_base(aura_handle) +\n \t\t\tNPA_LF_POOL_OP_PTR_END0);\n }\ndiff --git a/drivers/mempool/octeontx2/otx2_mempool_ops.c b/drivers/mempool/octeontx2/otx2_mempool_ops.c\nindex 94570319a..966b7d7f1 100644\n--- a/drivers/mempool/octeontx2/otx2_mempool_ops.c\n+++ b/drivers/mempool/octeontx2/otx2_mempool_ops.c\n@@ -7,6 +7,12 @@\n \n #include \"otx2_mempool.h\"\n \n+static unsigned int\n+otx2_npa_get_count(const struct rte_mempool *mp)\n+{\n+\treturn (unsigned int)npa_lf_aura_op_available(mp->pool_id);\n+}\n+\n static int\n npa_lf_aura_pool_init(struct otx2_mbox *mbox, uint32_t aura_id,\n \t\t struct npa_aura_s *aura, struct npa_pool_s *pool)\n@@ -341,10 +347,66 @@ otx2_npa_free(struct rte_mempool *mp)\n \totx2_npa_lf_fini();\n }\n \n+static ssize_t\n+otx2_npa_calc_mem_size(const struct rte_mempool *mp, uint32_t obj_num,\n+\t\t uint32_t pg_shift, size_t *min_chunk_size, size_t *align)\n+{\n+\tssize_t mem_size;\n+\n+\t/*\n+\t * Simply need space for one more object to be able to\n+\t * fulfill alignment requirements.\n+\t */\n+\tmem_size = rte_mempool_op_calc_mem_size_default(mp, obj_num + 1,\n+\t\t\t\t\t\t\tpg_shift,\n+\t\t\t\t\t\t\tmin_chunk_size, align);\n+\tif (mem_size >= 0) {\n+\t\t/*\n+\t\t * Memory area which contains objects must be physically\n+\t\t * contiguous.\n+\t\t */\n+\t\t*min_chunk_size = mem_size;\n+\t}\n+\n+\treturn mem_size;\n+}\n+\n+static int\n+otx2_npa_populate(struct rte_mempool *mp, unsigned int max_objs, void *vaddr,\n+\t\t rte_iova_t iova, size_t len,\n+\t\t rte_mempool_populate_obj_cb_t *obj_cb, void *obj_cb_arg)\n+{\n+\tsize_t total_elt_sz;\n+\tsize_t off;\n+\n+\tif (iova == RTE_BAD_IOVA)\n+\t\treturn -EINVAL;\n+\n+\ttotal_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;\n+\n+\t/* Align object start address to a multiple of total_elt_sz */\n+\toff = total_elt_sz - ((uintptr_t)vaddr % total_elt_sz);\n+\n+\tif (len < off)\n+\t\treturn -EINVAL;\n+\n+\tvaddr = (char *)vaddr + off;\n+\tiova += off;\n+\tlen -= off;\n+\n+\tnpa_lf_aura_op_range_set(mp->pool_id, iova, iova + len);\n+\n+\treturn rte_mempool_op_populate_default(mp, max_objs, vaddr, iova, len,\n+\t\t\t\t\t obj_cb, obj_cb_arg);\n+}\n+\n static struct rte_mempool_ops otx2_npa_ops = {\n \t.name = \"octeontx2_npa\",\n \t.alloc = otx2_npa_alloc,\n \t.free = otx2_npa_free,\n+\t.get_count = otx2_npa_get_count,\n+\t.calc_mem_size = otx2_npa_calc_mem_size,\n+\t.populate = otx2_npa_populate,\n };\n \n MEMPOOL_REGISTER_OPS(otx2_npa_ops);\n", "prefixes": [ "v4", "23/27" ] }