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GET /api/patches/55198/?format=api
{ "id": 55198, "url": "http://patches.dpdk.org/api/patches/55198/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190622132417.32694-10-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190622132417.32694-10-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190622132417.32694-10-jerinj@marvell.com", "date": "2019-06-22T13:23:59", "name": "[v4,09/27] common/octeontx2: handle intra device operations", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4d239eadc70b47531246c1b8bb31fadbb38dfc98", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190622132417.32694-10-jerinj@marvell.com/mbox/", "series": [ { "id": 5124, "url": "http://patches.dpdk.org/api/series/5124/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5124", "date": "2019-06-22T13:23:50", "name": "OCTEON TX2 common and mempool driver", "version": 4, "mbox": "http://patches.dpdk.org/series/5124/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55198/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/55198/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6A1D31C5F7;\n\tSat, 22 Jun 2019 15:25:11 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id D6A7A1C5D1\n\tfor <dev@dpdk.org>; Sat, 22 Jun 2019 15:24:57 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5MDOv43030607 for <dev@dpdk.org>; Sat, 22 Jun 2019 06:24:57 -0700", "from sc-exch03.marvell.com ([199.233.58.183])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2t9kuj863c-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Sat, 22 Jun 2019 06:24:57 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSat, 22 Jun 2019 06:24:55 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sat, 22 Jun 2019 06:24:55 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id BC19D3F703F;\n\tSat, 22 Jun 2019 06:24:53 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=VTosMFj7LCM7MPxqV+BCA1WWdneyW3bhpDwNUysepUg=;\n\tb=TW+y8WXIBQzbRQ9UDD/OuCeftTr+jbQTeJBAnotVlW9kRx8VVOUSBhEkz2HjTeIimP/t\n\tcW2G2ChbG5645m7Qd+KkutFPeQMMFw5xUDNwEoGyiSa+bDSLveXNnN4IEir68GPqm5Mv\n\thVTNMdLJ4YKHh/OdOhpN1opoohEZcQfUJJC+eieo7XlzidENa6YTrub6jEV+uKWV3qVY\n\toLyFNRVUpUnA6VlGgp6Sccs4KLXUzq3rUbj6LooZHGM9csIiDy1CepxE3dioyQTkNDOz\n\tGPnUQ+4VMTp1FVD/cqT5KreQQ8yLhB8NqJr2LsSlbIFS+xDjiV3Cm/KoIzwd7kkIohlb\n\tnQ== ", "From": "<jerinj@marvell.com>", "To": "Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>", "CC": "<dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "Date": "Sat, 22 Jun 2019 18:53:59 +0530", "Message-ID": "<20190622132417.32694-10-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190622132417.32694-1-jerinj@marvell.com>", "References": "<20190617155537.36144-1-jerinj@marvell.com>\n\t<20190622132417.32694-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-22_09:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v4 09/27] common/octeontx2: handle intra device\n\toperations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jerin Jacob <jerinj@marvell.com>\n\nThe mempool device(NPA) may be provisioned as a standalone device or\nit can be part of ethdev/eventdev device. In order to address\nmempool as standalone or integrated with ethdev/eventdev device,\nAn intra device structure being introduced.\n\nWhen the _first_ ethdev/eventdev PCIe device or standalone mempool(NPA)\ndevices get probed by the eal PCI subsystem,\nThe NPA object(struct otx2_npa_lf) stored in otx2_dev base class.\nOnce it is accomplished, the other consumer drivers like\nethdev driver or eventdev driver use otx2_npa_* API to operate on\nshared NPA object.\n\nThe similar concept followed for SSO object, Which needs to share between\nPCIe devices.\n\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/common/octeontx2/otx2_common.c | 163 ++++++++++++++++++\n drivers/common/octeontx2/otx2_common.h | 32 +++-\n drivers/common/octeontx2/otx2_dev.c | 6 +\n drivers/common/octeontx2/otx2_dev.h | 1 +\n .../rte_common_octeontx2_version.map | 9 +\n 5 files changed, 210 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/common/octeontx2/otx2_common.c b/drivers/common/octeontx2/otx2_common.c\nindex a4b91b4f1..7e4536639 100644\n--- a/drivers/common/octeontx2/otx2_common.c\n+++ b/drivers/common/octeontx2/otx2_common.c\n@@ -2,9 +2,172 @@\n * Copyright(C) 2019 Marvell International Ltd.\n */\n \n+#include <rte_atomic.h>\n+#include <rte_malloc.h>\n #include <rte_log.h>\n \n #include \"otx2_common.h\"\n+#include \"otx2_dev.h\"\n+#include \"otx2_mbox.h\"\n+\n+/**\n+ * @internal\n+ * Set default NPA configuration.\n+ */\n+void\n+otx2_npa_set_defaults(struct otx2_idev_cfg *idev)\n+{\n+\tidev->npa_pf_func = 0;\n+\trte_atomic16_set(&idev->npa_refcnt, 0);\n+}\n+\n+/**\n+ * @internal\n+ * Get intra device config structure.\n+ */\n+struct otx2_idev_cfg *\n+otx2_intra_dev_get_cfg(void)\n+{\n+\tconst char name[] = \"octeontx2_intra_device_conf\";\n+\tconst struct rte_memzone *mz;\n+\tstruct otx2_idev_cfg *idev;\n+\n+\tmz = rte_memzone_lookup(name);\n+\tif (mz != NULL)\n+\t\treturn mz->addr;\n+\n+\t/* Request for the first time */\n+\tmz = rte_memzone_reserve_aligned(name, sizeof(struct otx2_idev_cfg),\n+\t\t\t\t\t SOCKET_ID_ANY, 0, OTX2_ALIGN);\n+\tif (mz != NULL) {\n+\t\tidev = mz->addr;\n+\t\tidev->sso_pf_func = 0;\n+\t\tidev->npa_lf = NULL;\n+\t\totx2_npa_set_defaults(idev);\n+\t\treturn idev;\n+\t}\n+\treturn NULL;\n+}\n+\n+/**\n+ * @internal\n+ * Get SSO PF_FUNC.\n+ */\n+uint16_t\n+otx2_sso_pf_func_get(void)\n+{\n+\tstruct otx2_idev_cfg *idev;\n+\tuint16_t sso_pf_func;\n+\n+\tsso_pf_func = 0;\n+\tidev = otx2_intra_dev_get_cfg();\n+\n+\tif (idev != NULL)\n+\t\tsso_pf_func = idev->sso_pf_func;\n+\n+\treturn sso_pf_func;\n+}\n+\n+/**\n+ * @internal\n+ * Set SSO PF_FUNC.\n+ */\n+void\n+otx2_sso_pf_func_set(uint16_t sso_pf_func)\n+{\n+\tstruct otx2_idev_cfg *idev;\n+\n+\tidev = otx2_intra_dev_get_cfg();\n+\n+\tif (idev != NULL) {\n+\t\tidev->sso_pf_func = sso_pf_func;\n+\t\trte_smp_wmb();\n+\t}\n+}\n+\n+/**\n+ * @internal\n+ * Get NPA PF_FUNC.\n+ */\n+uint16_t\n+otx2_npa_pf_func_get(void)\n+{\n+\tstruct otx2_idev_cfg *idev;\n+\tuint16_t npa_pf_func;\n+\n+\tnpa_pf_func = 0;\n+\tidev = otx2_intra_dev_get_cfg();\n+\n+\tif (idev != NULL)\n+\t\tnpa_pf_func = idev->npa_pf_func;\n+\n+\treturn npa_pf_func;\n+}\n+\n+/**\n+ * @internal\n+ * Get NPA lf object.\n+ */\n+struct otx2_npa_lf *\n+otx2_npa_lf_obj_get(void)\n+{\n+\tstruct otx2_idev_cfg *idev;\n+\n+\tidev = otx2_intra_dev_get_cfg();\n+\n+\tif (idev != NULL && rte_atomic16_read(&idev->npa_refcnt))\n+\t\treturn idev->npa_lf;\n+\n+\treturn NULL;\n+}\n+\n+/**\n+ * @internal\n+ * Is NPA lf active for the given device?.\n+ */\n+int\n+otx2_npa_lf_active(void *otx2_dev)\n+{\n+\tstruct otx2_dev *dev = otx2_dev;\n+\tstruct otx2_idev_cfg *idev;\n+\n+\t/* Check if npalf is actively used on this dev */\n+\tidev = otx2_intra_dev_get_cfg();\n+\tif (!idev || !idev->npa_lf || idev->npa_lf->mbox != dev->mbox)\n+\t\treturn 0;\n+\n+\treturn rte_atomic16_read(&idev->npa_refcnt);\n+}\n+\n+/*\n+ * @internal\n+ * Gets reference only to existing NPA LF object.\n+ */\n+int otx2_npa_lf_obj_ref(void)\n+{\n+\tstruct otx2_idev_cfg *idev;\n+\tuint16_t cnt;\n+\tint rc;\n+\n+\tidev = otx2_intra_dev_get_cfg();\n+\n+\t/* Check if ref not possible */\n+\tif (idev == NULL)\n+\t\treturn -EINVAL;\n+\n+\n+\t/* Get ref only if > 0 */\n+\tcnt = rte_atomic16_read(&idev->npa_refcnt);\n+\twhile (cnt != 0) {\n+\t\trc = rte_atomic16_cmpset(&idev->npa_refcnt_u16, cnt, cnt + 1);\n+\t\tif (rc)\n+\t\t\tbreak;\n+\n+\t\tcnt = rte_atomic16_read(&idev->npa_refcnt);\n+\t}\n+\n+\treturn cnt ? 0 : -EINVAL;\n+}\n \n /**\n * @internal\ndiff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h\nindex b9e7a7f8d..cbc5c65a7 100644\n--- a/drivers/common/octeontx2/otx2_common.h\n+++ b/drivers/common/octeontx2/otx2_common.h\n@@ -5,9 +5,12 @@\n #ifndef _OTX2_COMMON_H_\n #define _OTX2_COMMON_H_\n \n+#include <rte_atomic.h>\n #include <rte_common.h>\n-#include <rte_io.h>\n+#include <rte_cycles.h>\n #include <rte_memory.h>\n+#include <rte_memzone.h>\n+#include <rte_io.h>\n \n #include \"hw/otx2_rvu.h\"\n #include \"hw/otx2_nix.h\"\n@@ -33,6 +36,33 @@\n #define __hot __attribute__((hot))\n #endif\n \n+/* Intra device related functions */\n+struct otx2_npa_lf {\n+\tstruct otx2_mbox *mbox;\n+\tstruct rte_pci_device *pci_dev;\n+\tstruct rte_intr_handle *intr_handle;\n+};\n+\n+struct otx2_idev_cfg {\n+\tuint16_t sso_pf_func;\n+\tuint16_t npa_pf_func;\n+\tstruct otx2_npa_lf *npa_lf;\n+\tRTE_STD_C11\n+\tunion {\n+\t\trte_atomic16_t npa_refcnt;\n+\t\tuint16_t npa_refcnt_u16;\n+\t};\n+};\n+\n+struct otx2_idev_cfg *otx2_intra_dev_get_cfg(void);\n+void otx2_sso_pf_func_set(uint16_t sso_pf_func);\n+uint16_t otx2_sso_pf_func_get(void);\n+uint16_t otx2_npa_pf_func_get(void);\n+struct otx2_npa_lf *otx2_npa_lf_obj_get(void);\n+void otx2_npa_set_defaults(struct otx2_idev_cfg *idev);\n+int otx2_npa_lf_active(void *dev);\n+int otx2_npa_lf_obj_ref(void);\n+\n /* Log */\n extern int otx2_logtype_base;\n extern int otx2_logtype_mbox;\ndiff --git a/drivers/common/octeontx2/otx2_dev.c b/drivers/common/octeontx2/otx2_dev.c\nindex 486b1b7c8..c3b3f9be5 100644\n--- a/drivers/common/octeontx2/otx2_dev.c\n+++ b/drivers/common/octeontx2/otx2_dev.c\n@@ -177,8 +177,14 @@ void\n otx2_dev_fini(struct rte_pci_device *pci_dev, void *otx2_dev)\n {\n \tstruct otx2_dev *dev = otx2_dev;\n+\tstruct otx2_idev_cfg *idev;\n \tstruct otx2_mbox *mbox;\n \n+\t/* Clear references to this pci dev */\n+\tidev = otx2_intra_dev_get_cfg();\n+\tif (idev->npa_lf && idev->npa_lf->pci_dev == pci_dev)\n+\t\tidev->npa_lf = NULL;\n+\n \t/* Release PF - VF */\n \tmbox = &dev->mbox_vfpf;\n \tif (mbox->hwbase && mbox->dev)\ndiff --git a/drivers/common/octeontx2/otx2_dev.h b/drivers/common/octeontx2/otx2_dev.h\nindex a89570b62..70104dfa2 100644\n--- a/drivers/common/octeontx2/otx2_dev.h\n+++ b/drivers/common/octeontx2/otx2_dev.h\n@@ -40,6 +40,7 @@ struct otx2_dev;\n \totx2_intr_t intr;\t\t\t\t\\\n \tint timer_set;\t/* ~0 : no alarm handling */\t\\\n \tuint64_t hwcap;\t\t\t\t\t\\\n+\tstruct otx2_npa_lf npalf;\t\t\t\\\n \tstruct otx2_mbox *mbox;\t\t\t\t\\\n \tuint16_t maxvf;\t\t\t\t\t\\\n \tconst struct otx2_dev_ops *ops\ndiff --git a/drivers/common/octeontx2/rte_common_octeontx2_version.map b/drivers/common/octeontx2/rte_common_octeontx2_version.map\nindex 007649a48..efcf0cb55 100644\n--- a/drivers/common/octeontx2/rte_common_octeontx2_version.map\n+++ b/drivers/common/octeontx2/rte_common_octeontx2_version.map\n@@ -21,6 +21,15 @@ DPDK_19.08 {\n \totx2_mbox_msg_send;\n \totx2_mbox_wait_for_rsp;\n \n+\totx2_intra_dev_get_cfg;\n+\totx2_npa_lf_active;\n+\totx2_npa_lf_obj_get;\n+\totx2_npa_lf_obj_ref;\n+\totx2_npa_pf_func_get;\n+\totx2_npa_set_defaults;\n+\totx2_sso_pf_func_get;\n+\totx2_sso_pf_func_set;\n+\n \totx2_disable_irqs;\n \totx2_unregister_irq;\n \totx2_register_irq;\n", "prefixes": [ "v4", "09/27" ] }