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Update a patch.

GET /api/patches/54315/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 54315,
    "url": "http://patches.dpdk.org/api/patches/54315/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190604054248.68510-40-leyi.rong@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190604054248.68510-40-leyi.rong@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190604054248.68510-40-leyi.rong@intel.com",
    "date": "2019-06-04T05:42:38",
    "name": "[39/49] net/ice/base: slightly code update",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "eb584f2f3b68fa88f787c96c531e5732c53ea11d",
    "submitter": {
        "id": 1204,
        "url": "http://patches.dpdk.org/api/people/1204/?format=api",
        "name": "Leyi Rong",
        "email": "leyi.rong@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190604054248.68510-40-leyi.rong@intel.com/mbox/",
    "series": [
        {
            "id": 4879,
            "url": "http://patches.dpdk.org/api/series/4879/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4879",
            "date": "2019-06-04T05:41:59",
            "name": "shared code update",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/4879/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/54315/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/54315/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C1B6E1BC73;\n\tTue,  4 Jun 2019 07:45:24 +0200 (CEST)",
            "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id C23BB1BB2A\n\tfor <dev@dpdk.org>; Tue,  4 Jun 2019 07:44:37 +0200 (CEST)",
            "from fmsmga008.fm.intel.com ([10.253.24.58])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t03 Jun 2019 22:44:37 -0700",
            "from lrong-srv-03.sh.intel.com ([10.67.119.177])\n\tby fmsmga008.fm.intel.com with ESMTP; 03 Jun 2019 22:44:36 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Leyi Rong <leyi.rong@intel.com>",
        "To": "qi.z.zhang@intel.com",
        "Cc": "dev@dpdk.org, Leyi Rong <leyi.rong@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>",
        "Date": "Tue,  4 Jun 2019 13:42:38 +0800",
        "Message-Id": "<20190604054248.68510-40-leyi.rong@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20190604054248.68510-1-leyi.rong@intel.com>",
        "References": "<20190604054248.68510-1-leyi.rong@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 39/49] net/ice/base: slightly code update",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Mainly update below functions:\n\nice_flow_proc_seg_hdrs\nice_flow_find_prof_conds\nice_dealloc_flow_entry\nice_add_rule_internal\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Leyi Rong <leyi.rong@intel.com>\n---\n drivers/net/ice/base/ice_flex_pipe.c     | 13 +++----\n drivers/net/ice/base/ice_flow.c          | 47 +++++++++++++++++-------\n drivers/net/ice/base/ice_nvm.c           |  4 +-\n drivers/net/ice/base/ice_protocol_type.h |  1 +\n drivers/net/ice/base/ice_switch.c        | 24 +++++++-----\n drivers/net/ice/base/ice_switch.h        | 14 +++----\n drivers/net/ice/base/ice_type.h          | 13 ++++++-\n 7 files changed, 73 insertions(+), 43 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c\nindex 5864cbf3e..2a310b6e1 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.c\n+++ b/drivers/net/ice/base/ice_flex_pipe.c\n@@ -134,7 +134,7 @@ static struct ice_buf_table *ice_find_buf_table(struct ice_seg *ice_seg)\n \tnvms = (struct ice_nvm_table *)(ice_seg->device_table +\n \t\tLE32_TO_CPU(ice_seg->device_table_count));\n \n-\treturn (struct ice_buf_table *)\n+\treturn (_FORCE_ struct ice_buf_table *)\n \t\t(nvms->vers + LE32_TO_CPU(nvms->table_count));\n }\n \n@@ -1005,9 +1005,8 @@ ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)\n \n \t\tbh = (struct ice_buf_hdr *)(bufs + i);\n \n-\t\tstatus = ice_aq_download_pkg(hw, bh, LE16_TO_CPU(bh->data_end),\n-\t\t\t\t\t     last, &offset, &info, NULL);\n-\n+\t\tstatus = ice_aq_download_pkg(hw, bh, ICE_PKG_BUF_SIZE, last,\n+\t\t\t\t\t     &offset, &info, NULL);\n \t\tif (status) {\n \t\t\tice_debug(hw, ICE_DBG_PKG,\n \t\t\t\t  \"Pkg download failed: err %d off %d inf %d\\n\",\n@@ -2937,7 +2936,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)\n \t\tcase ICE_SID_XLT2_ACL:\n \t\tcase ICE_SID_XLT2_PE:\n \t\t\txlt2 = (struct ice_xlt2_section *)sect;\n-\t\t\tsrc = (u8 *)xlt2->value;\n+\t\t\tsrc = (_FORCE_ u8 *)xlt2->value;\n \t\t\tsect_len = LE16_TO_CPU(xlt2->count) *\n \t\t\t\tsizeof(*hw->blk[block_id].xlt2.t);\n \t\t\tdst = (u8 *)hw->blk[block_id].xlt2.t;\n@@ -3889,7 +3888,7 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)\n \n \t/* fill in the swap array */\n \tsi = hw->blk[ICE_BLK_FD].es.fvw - 1;\n-\tdo {\n+\twhile (si >= 0) {\n \t\tu8 indexes_used = 1;\n \n \t\t/* assume flat at this index */\n@@ -3921,7 +3920,7 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)\n \t\t}\n \n \t\tsi -= indexes_used;\n-\t} while (si >= 0);\n+\t}\n \n \t/* for each set of 4 swap indexes, write the appropriate register */\n \tfor (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {\ndiff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex 795abe98f..f31557eac 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -415,9 +415,6 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)\n \t\tconst ice_bitmap_t *src;\n \t\tu32 hdrs;\n \n-\t\tif (i > 0 && (i + 1) < prof->segs_cnt)\n-\t\t\tcontinue;\n-\n \t\thdrs = prof->segs[i].hdrs;\n \n \t\tif (hdrs & ICE_FLOW_SEG_HDR_ETH) {\n@@ -847,6 +844,7 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)\n \n #define ICE_FLOW_FIND_PROF_CHK_FLDS\t0x00000001\n #define ICE_FLOW_FIND_PROF_CHK_VSI\t0x00000002\n+#define ICE_FLOW_FIND_PROF_NOT_CHK_DIR\t0x00000004\n \n /**\n  * ice_flow_find_prof_conds - Find a profile matching headers and conditions\n@@ -866,7 +864,8 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,\n \tstruct ice_flow_prof *p;\n \n \tLIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry) {\n-\t\tif (p->dir == dir && segs_cnt && segs_cnt == p->segs_cnt) {\n+\t\tif ((p->dir == dir || conds & ICE_FLOW_FIND_PROF_NOT_CHK_DIR) &&\n+\t\t    segs_cnt && segs_cnt == p->segs_cnt) {\n \t\t\tu8 i;\n \n \t\t\t/* Check for profile-VSI association if specified */\n@@ -935,17 +934,15 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)\n }\n \n /**\n- * ice_flow_rem_entry_sync - Remove a flow entry\n+ * ice_dealloc_flow_entry - Deallocate flow entry memory\n  * @hw: pointer to the HW struct\n  * @entry: flow entry to be removed\n  */\n-static enum ice_status\n-ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)\n+static void\n+ice_dealloc_flow_entry(struct ice_hw *hw, struct ice_flow_entry *entry)\n {\n \tif (!entry)\n-\t\treturn ICE_ERR_BAD_PTR;\n-\n-\tLIST_DEL(&entry->l_entry);\n+\t\treturn;\n \n \tif (entry->entry)\n \t\tice_free(hw, entry->entry);\n@@ -957,6 +954,22 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)\n \t}\n \n \tice_free(hw, entry);\n+}\n+\n+/**\n+ * ice_flow_rem_entry_sync - Remove a flow entry\n+ * @hw: pointer to the HW struct\n+ * @entry: flow entry to be removed\n+ */\n+static enum ice_status\n+ice_flow_rem_entry_sync(struct ice_hw *hw, struct ice_flow_entry *entry)\n+{\n+\tif (!entry)\n+\t\treturn ICE_ERR_BAD_PTR;\n+\n+\tLIST_DEL(&entry->l_entry);\n+\n+\tice_dealloc_flow_entry(hw, entry);\n \n \treturn ICE_SUCCESS;\n }\n@@ -1395,9 +1408,12 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,\n \t\tgoto out;\n \t}\n \n-\tice_acquire_lock(&prof->entries_lock);\n-\tLIST_ADD(&e->l_entry, &prof->entries);\n-\tice_release_lock(&prof->entries_lock);\n+\tif (blk != ICE_BLK_ACL) {\n+\t\t/* ACL will handle the entry management */\n+\t\tice_acquire_lock(&prof->entries_lock);\n+\t\tLIST_ADD(&e->l_entry, &prof->entries);\n+\t\tice_release_lock(&prof->entries_lock);\n+\t}\n \n \t*entry_h = ICE_FLOW_ENTRY_HNDL(e);\n \n@@ -1425,7 +1441,7 @@ enum ice_status ice_flow_rem_entry(struct ice_hw *hw, u64 entry_h)\n \tif (entry_h == ICE_FLOW_ENTRY_HANDLE_INVAL)\n \t\treturn ICE_ERR_PARAM;\n \n-\tentry = ICE_FLOW_ENTRY_PTR((unsigned long)entry_h);\n+\tentry = ICE_FLOW_ENTRY_PTR(entry_h);\n \n \t/* Retain the pointer to the flow profile as the entry will be freed */\n \tprof = entry->prof;\n@@ -1676,6 +1692,9 @@ enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)\n \tif (!ice_is_vsi_valid(hw, vsi_handle))\n \t\treturn ICE_ERR_PARAM;\n \n+\tif (LIST_EMPTY(&hw->fl_profs[blk]))\n+\t\treturn ICE_SUCCESS;\n+\n \tice_acquire_lock(&hw->fl_profs_locks[blk]);\n \tLIST_FOR_EACH_ENTRY_SAFE(p, t, &hw->fl_profs[blk], ice_flow_prof,\n \t\t\t\t l_entry) {\ndiff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex fa9c348ce..76cfedb29 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -127,7 +127,7 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)\n \n \tstatus = ice_read_sr_aq(hw, offset, 1, data, true);\n \tif (!status)\n-\t\t*data = LE16_TO_CPU(*(__le16 *)data);\n+\t\t*data = LE16_TO_CPU(*(_FORCE_ __le16 *)data);\n \n \treturn status;\n }\n@@ -185,7 +185,7 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)\n \t} while (words_read < *words);\n \n \tfor (i = 0; i < *words; i++)\n-\t\tdata[i] = LE16_TO_CPU(((__le16 *)data)[i]);\n+\t\tdata[i] = LE16_TO_CPU(((_FORCE_ __le16 *)data)[i]);\n \n read_nvm_buf_aq_exit:\n \t*words = words_read;\ndiff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h\nindex e572dd320..82822fb74 100644\n--- a/drivers/net/ice/base/ice_protocol_type.h\n+++ b/drivers/net/ice/base/ice_protocol_type.h\n@@ -189,6 +189,7 @@ struct ice_udp_tnl_hdr {\n \tu16 field;\n \tu16 proto_type;\n \tu16 vni;\n+\tu16 reserved;\n };\n \n struct ice_nvgre {\ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex faaedd4c8..373acb7a6 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -279,6 +279,7 @@ enum ice_status ice_init_def_sw_recp(struct ice_hw *hw)\n \t\trecps[i].root_rid = i;\n \t\tINIT_LIST_HEAD(&recps[i].filt_rules);\n \t\tINIT_LIST_HEAD(&recps[i].filt_replay_rules);\n+\t\tINIT_LIST_HEAD(&recps[i].rg_list);\n \t\tice_init_lock(&recps[i].filt_rule_lock);\n \t}\n \n@@ -859,7 +860,7 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,\n \t\t\treturn ICE_ERR_PARAM;\n \n \t\tbuf_size = count * sizeof(__le16);\n-\t\tmr_list = (__le16 *)ice_malloc(hw, buf_size);\n+\t\tmr_list = (_FORCE_ __le16 *)ice_malloc(hw, buf_size);\n \t\tif (!mr_list)\n \t\t\treturn ICE_ERR_NO_MEMORY;\n \t\tbreak;\n@@ -1459,7 +1460,6 @@ static int ice_ilog2(u64 n)\n \treturn -1;\n }\n \n-\n /**\n  * ice_fill_sw_rule - Helper function to fill switch rule structure\n  * @hw: pointer to the hardware structure\n@@ -1479,7 +1479,6 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,\n \t__be16 *off;\n \tu8 q_rgn;\n \n-\n \tif (opc == ice_aqc_opc_remove_sw_rules) {\n \t\ts_rule->pdata.lkup_tx_rx.act = 0;\n \t\ts_rule->pdata.lkup_tx_rx.index =\n@@ -1555,7 +1554,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,\n \t\tdaddr = f_info->l_data.ethertype_mac.mac_addr;\n \t\t/* fall-through */\n \tcase ICE_SW_LKUP_ETHERTYPE:\n-\t\toff = (__be16 *)(eth_hdr + ICE_ETH_ETHTYPE_OFFSET);\n+\t\toff = (_FORCE_ __be16 *)(eth_hdr + ICE_ETH_ETHTYPE_OFFSET);\n \t\t*off = CPU_TO_BE16(f_info->l_data.ethertype_mac.ethertype);\n \t\tbreak;\n \tcase ICE_SW_LKUP_MAC_VLAN:\n@@ -1586,7 +1585,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,\n \t\t\t   ICE_NONDMA_TO_NONDMA);\n \n \tif (!(vlan_id > ICE_MAX_VLAN_ID)) {\n-\t\toff = (__be16 *)(eth_hdr + ICE_ETH_VLAN_TCI_OFFSET);\n+\t\toff = (_FORCE_ __be16 *)(eth_hdr + ICE_ETH_VLAN_TCI_OFFSET);\n \t\t*off = CPU_TO_BE16(vlan_id);\n \t}\n \n@@ -2289,14 +2288,15 @@ ice_add_rule_internal(struct ice_hw *hw, u8 recp_id,\n \n \tm_entry = ice_find_rule_entry(hw, recp_id, new_fltr);\n \tif (!m_entry) {\n-\t\tice_release_lock(rule_lock);\n-\t\treturn ice_create_pkt_fwd_rule(hw, f_entry);\n+\t\tstatus = ice_create_pkt_fwd_rule(hw, f_entry);\n+\t\tgoto exit_add_rule_internal;\n \t}\n \n \tcur_fltr = &m_entry->fltr_info;\n \tstatus = ice_add_update_vsi_list(hw, m_entry, cur_fltr, new_fltr);\n-\tice_release_lock(rule_lock);\n \n+exit_add_rule_internal:\n+\tice_release_lock(rule_lock);\n \treturn status;\n }\n \n@@ -2975,12 +2975,19 @@ ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)\n  * ice_add_eth_mac - Add ethertype and MAC based filter rule\n  * @hw: pointer to the hardware structure\n  * @em_list: list of ether type MAC filter, MAC is optional\n+ *\n+ * This function requires the caller to populate the entries in\n+ * the filter list with the necessary fields (including flags to\n+ * indicate Tx or Rx rules).\n  */\n enum ice_status\n ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)\n {\n \tstruct ice_fltr_list_entry *em_list_itr;\n \n+\tif (!em_list || !hw)\n+\t\treturn ICE_ERR_PARAM;\n+\n \tLIST_FOR_EACH_ENTRY(em_list_itr, em_list, ice_fltr_list_entry,\n \t\t\t    list_entry) {\n \t\tenum ice_sw_lkup_type l_type =\n@@ -2990,7 +2997,6 @@ ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)\n \t\t    l_type != ICE_SW_LKUP_ETHERTYPE)\n \t\t\treturn ICE_ERR_PARAM;\n \n-\t\tem_list_itr->fltr_info.flag = ICE_FLTR_TX;\n \t\tem_list_itr->status = ice_add_rule_internal(hw, l_type,\n \t\t\t\t\t\t\t    em_list_itr);\n \t\tif (em_list_itr->status)\ndiff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h\nindex 2f140a86d..05b1170c9 100644\n--- a/drivers/net/ice/base/ice_switch.h\n+++ b/drivers/net/ice/base/ice_switch.h\n@@ -11,6 +11,9 @@\n #define ICE_SW_CFG_MAX_BUF_LEN 2048\n #define ICE_MAX_SW 256\n #define ICE_DFLT_VSI_INVAL 0xff\n+#define ICE_FLTR_RX BIT(0)\n+#define ICE_FLTR_TX BIT(1)\n+#define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)\n \n \n /* Worst case buffer length for ice_aqc_opc_get_res_alloc */\n@@ -77,9 +80,6 @@ struct ice_fltr_info {\n \t/* rule ID returned by firmware once filter rule is created */\n \tu16 fltr_rule_id;\n \tu16 flag;\n-#define ICE_FLTR_RX\t\tBIT(0)\n-#define ICE_FLTR_TX\t\tBIT(1)\n-#define ICE_FLTR_TX_RX\t\t(ICE_FLTR_RX | ICE_FLTR_TX)\n \n \t/* Source VSI for LOOKUP_TX or source port for LOOKUP_RX */\n \tu16 src;\n@@ -145,10 +145,6 @@ struct ice_sw_act_ctrl {\n \t/* Source VSI for LOOKUP_TX or source port for LOOKUP_RX */\n \tu16 src;\n \tu16 flag;\n-#define ICE_FLTR_RX             BIT(0)\n-#define ICE_FLTR_TX             BIT(1)\n-#define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)\n-\n \tenum ice_sw_fwd_act_type fltr_act;\n \t/* Depending on filter action */\n \tunion {\n@@ -368,6 +364,8 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,\n \t\t     struct ice_sq_cd *cd);\n enum ice_status\n ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);\n+enum ice_status\n+ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);\n void ice_rem_all_sw_rules_info(struct ice_hw *hw);\n enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);\n enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);\n@@ -375,8 +373,6 @@ enum ice_status\n ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);\n enum ice_status\n ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);\n-enum ice_status\n-ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);\n #ifndef NO_MACVLAN_SUPPORT\n enum ice_status\n ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);\ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 919ca7fa8..f4e151c55 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -14,6 +14,10 @@\n \n #define BITS_PER_BYTE\t8\n \n+#ifndef _FORCE_\n+#define _FORCE_\n+#endif\n+\n #define ICE_BYTES_PER_WORD\t2\n #define ICE_BYTES_PER_DWORD\t4\n #define ICE_MAX_TRAFFIC_CLASS\t8\n@@ -35,7 +39,7 @@\n #endif\n \n #ifndef IS_ASCII\n-#define IS_ASCII(_ch)  ((_ch) < 0x80)\n+#define IS_ASCII(_ch)\t((_ch) < 0x80)\n #endif\n \n #include \"ice_status.h\"\n@@ -80,6 +84,7 @@ static inline u32 ice_round_to_num(u32 N, u32 R)\n #define ICE_HI_WORD(x)\t\t((u16)(((x) >> 16) & 0xFFFF))\n \n /* debug masks - set these bits in hw->debug_mask to control output */\n+#define ICE_DBG_TRACE\t\tBIT_ULL(0) /* for function-trace only */\n #define ICE_DBG_INIT\t\tBIT_ULL(1)\n #define ICE_DBG_RELEASE\t\tBIT_ULL(2)\n #define ICE_DBG_FW_LOG\t\tBIT_ULL(3)\n@@ -199,6 +204,7 @@ enum ice_vsi_type {\n #ifdef ADQ_SUPPORT\n \tICE_VSI_CHNL = 4,\n #endif /* ADQ_SUPPORT */\n+\tICE_VSI_LB = 6,\n };\n \n struct ice_link_status {\n@@ -718,6 +724,8 @@ struct ice_fw_log_cfg {\n #define ICE_FW_LOG_EVNT_INIT\t(ICE_AQC_FW_LOG_INIT_EN >> ICE_AQC_FW_LOG_EN_S)\n #define ICE_FW_LOG_EVNT_FLOW\t(ICE_AQC_FW_LOG_FLOW_EN >> ICE_AQC_FW_LOG_EN_S)\n #define ICE_FW_LOG_EVNT_ERR\t(ICE_AQC_FW_LOG_ERR_EN >> ICE_AQC_FW_LOG_EN_S)\n+#define ICE_FW_LOG_EVNT_ALL\t(ICE_FW_LOG_EVNT_INFO | ICE_FW_LOG_EVNT_INIT | \\\n+\t\t\t\t ICE_FW_LOG_EVNT_FLOW | ICE_FW_LOG_EVNT_ERR)\n \tstruct ice_fw_log_evnt evnts[ICE_AQC_FW_LOG_ID_MAX];\n };\n \n@@ -745,6 +753,7 @@ struct ice_hw {\n \tu8 pf_id;\t\t/* device profile info */\n \n \tu16 max_burst_size;\t/* driver sets this value */\n+\n \t/* Tx Scheduler values */\n \tu16 num_tx_sched_layers;\n \tu16 num_tx_sched_phys_layers;\n@@ -948,7 +957,6 @@ enum ice_sw_fwd_act_type {\n #define ICE_SR_CSR_PROTECTED_LIST_PTR\t\t0x0D\n #define ICE_SR_MNG_CFG_PTR\t\t\t0x0E\n #define ICE_SR_EMP_MODULE_PTR\t\t\t0x0F\n-#define ICE_SR_PBA_FLAGS\t\t\t0x15\n #define ICE_SR_PBA_BLOCK_PTR\t\t\t0x16\n #define ICE_SR_BOOT_CFG_PTR\t\t\t0x17\n #define ICE_SR_NVM_WOL_CFG\t\t\t0x19\n@@ -994,6 +1002,7 @@ enum ice_sw_fwd_act_type {\n #define ICE_SR_EMP_SR_SETTINGS_PTR\t\t0x48\n #define ICE_SR_CONFIGURATION_METADATA_PTR\t0x4D\n #define ICE_SR_IMMEDIATE_VALUES_PTR\t\t0x4E\n+#define ICE_SR_POR_REGISTERS_AUTOLOAD_PTR\t0x118\n \n /* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */\n #define ICE_SR_VPD_SIZE_WORDS\t\t512\n",
    "prefixes": [
        "39/49"
    ]
}