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GET /api/patches/54311/?format=api
{ "id": 54311, "url": "http://patches.dpdk.org/api/patches/54311/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190604054248.68510-36-leyi.rong@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190604054248.68510-36-leyi.rong@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190604054248.68510-36-leyi.rong@intel.com", "date": "2019-06-04T05:42:34", "name": "[35/49] net/ice/base: calculate rate limit burst size correctly", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "296535d1e952467462aea10f6a83af72d1dddcb4", "submitter": { "id": 1204, "url": "http://patches.dpdk.org/api/people/1204/?format=api", "name": "Leyi Rong", "email": "leyi.rong@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190604054248.68510-36-leyi.rong@intel.com/mbox/", "series": [ { "id": 4879, "url": "http://patches.dpdk.org/api/series/4879/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4879", "date": "2019-06-04T05:41:59", "name": "shared code update", "version": 1, "mbox": "http://patches.dpdk.org/series/4879/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54311/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54311/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 74AAB1BC0B;\n\tTue, 4 Jun 2019 07:45:19 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id E02671BB20\n\tfor <dev@dpdk.org>; Tue, 4 Jun 2019 07:44:32 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t03 Jun 2019 22:44:32 -0700", "from lrong-srv-03.sh.intel.com ([10.67.119.177])\n\tby fmsmga008.fm.intel.com with ESMTP; 03 Jun 2019 22:44:31 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Leyi Rong <leyi.rong@intel.com>", "To": "qi.z.zhang@intel.com", "Cc": "dev@dpdk.org, Leyi Rong <leyi.rong@intel.com>,\n\tBen Shelton <benjamin.h.shelton@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Tue, 4 Jun 2019 13:42:34 +0800", "Message-Id": "<20190604054248.68510-36-leyi.rong@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190604054248.68510-1-leyi.rong@intel.com>", "References": "<20190604054248.68510-1-leyi.rong@intel.com>", "Subject": "[dpdk-dev] [PATCH 35/49] net/ice/base: calculate rate limit burst\n\tsize correctly", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When the MSB is not set, the lower 11 bits do not represent bytes, but\nchunks of 64 bytes. Adjust the rate limit burst size calculation\naccordingly, and update the comments to indicate the way the hardware\nactually works.\n\nSigned-off-by: Ben Shelton <benjamin.h.shelton@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Leyi Rong <leyi.rong@intel.com>\n---\n drivers/net/ice/base/ice_sched.c | 17 ++++++++---------\n drivers/net/ice/base/ice_sched.h | 14 ++++++++------\n 2 files changed, 16 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex 0c1c18ba1..a72e72982 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -5060,16 +5060,15 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)\n \tif (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||\n \t bytes > ICE_MAX_BURST_SIZE_ALLOWED)\n \t\treturn ICE_ERR_PARAM;\n-\tif (bytes <= ICE_MAX_BURST_SIZE_BYTE_GRANULARITY) {\n-\t\t/* byte granularity case */\n+\tif (ice_round_to_num(bytes, 64) <=\n+\t ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {\n+\t\t/* 64 byte granularity case */\n \t\t/* Disable MSB granularity bit */\n-\t\tburst_size_to_prog = ICE_BYTE_GRANULARITY;\n-\t\t/* round number to nearest 256 granularity */\n-\t\tbytes = ice_round_to_num(bytes, 256);\n-\t\t/* check rounding doesn't go beyond allowed */\n-\t\tif (bytes > ICE_MAX_BURST_SIZE_BYTE_GRANULARITY)\n-\t\t\tbytes = ICE_MAX_BURST_SIZE_BYTE_GRANULARITY;\n-\t\tburst_size_to_prog |= (u16)bytes;\n+\t\tburst_size_to_prog = ICE_64_BYTE_GRANULARITY;\n+\t\t/* round number to nearest 64 byte granularity */\n+\t\tbytes = ice_round_to_num(bytes, 64);\n+\t\t/* The value is in 64 byte chunks */\n+\t\tburst_size_to_prog |= (u16)(bytes / 64);\n \t} else {\n \t\t/* k bytes granularity case */\n \t\t/* Enable MSB granularity bit */\ndiff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h\nindex 56f9977ab..e444dc880 100644\n--- a/drivers/net/ice/base/ice_sched.h\n+++ b/drivers/net/ice/base/ice_sched.h\n@@ -13,14 +13,16 @@\n #define ICE_SCHED_INVAL_LAYER_NUM\t0xFF\n /* Burst size is a 12 bits register that is configured while creating the RL\n * profile(s). MSB is a granularity bit and tells the granularity type\n- * 0 - LSB bits are in bytes granularity\n+ * 0 - LSB bits are in 64 bytes granularity\n * 1 - LSB bits are in 1K bytes granularity\n */\n-#define ICE_BYTE_GRANULARITY\t\t\t0\n-#define ICE_KBYTE_GRANULARITY\t\t\t0x800\n-#define ICE_MIN_BURST_SIZE_ALLOWED\t\t1 /* In Bytes */\n-#define ICE_MAX_BURST_SIZE_ALLOWED\t\t(2047 * 1024) /* In Bytes */\n-#define ICE_MAX_BURST_SIZE_BYTE_GRANULARITY\t2047 /* In Bytes */\n+#define ICE_64_BYTE_GRANULARITY\t\t\t0\n+#define ICE_KBYTE_GRANULARITY\t\t\tBIT(11)\n+#define ICE_MIN_BURST_SIZE_ALLOWED\t\t64 /* In Bytes */\n+#define ICE_MAX_BURST_SIZE_ALLOWED \\\n+\t((BIT(11) - 1) * 1024) /* In Bytes */\n+#define ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY \\\n+\t((BIT(11) - 1) * 64) /* In Bytes */\n #define ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY\tICE_MAX_BURST_SIZE_ALLOWED\n \n #define ICE_RL_PROF_FREQUENCY 446000000\n", "prefixes": [ "35/49" ] }