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GET /api/patches/54290/?format=api
{ "id": 54290, "url": "http://patches.dpdk.org/api/patches/54290/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190604054248.68510-15-leyi.rong@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190604054248.68510-15-leyi.rong@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190604054248.68510-15-leyi.rong@intel.com", "date": "2019-06-04T05:42:13", "name": "[14/49] net/ice/base: refactor HW table init function", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c24cd4712998a4eb9e19e9c17a88a9adf1d37e36", "submitter": { "id": 1204, "url": "http://patches.dpdk.org/api/people/1204/?format=api", "name": "Leyi Rong", "email": "leyi.rong@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190604054248.68510-15-leyi.rong@intel.com/mbox/", "series": [ { "id": 4879, "url": "http://patches.dpdk.org/api/series/4879/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4879", "date": "2019-06-04T05:41:59", "name": "shared code update", "version": 1, "mbox": "http://patches.dpdk.org/series/4879/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54290/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54290/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0BB9B1BAF5;\n\tTue, 4 Jun 2019 07:44:24 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id C4A111B9EF\n\tfor <dev@dpdk.org>; Tue, 4 Jun 2019 07:44:09 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t03 Jun 2019 22:44:09 -0700", "from lrong-srv-03.sh.intel.com ([10.67.119.177])\n\tby fmsmga008.fm.intel.com with ESMTP; 03 Jun 2019 22:44:08 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Leyi Rong <leyi.rong@intel.com>", "To": "qi.z.zhang@intel.com", "Cc": "dev@dpdk.org, Leyi Rong <leyi.rong@intel.com>,\n\tVignesh Sridhar <vignesh.sridhar@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Tue, 4 Jun 2019 13:42:13 +0800", "Message-Id": "<20190604054248.68510-15-leyi.rong@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190604054248.68510-1-leyi.rong@intel.com>", "References": "<20190604054248.68510-1-leyi.rong@intel.com>", "Subject": "[dpdk-dev] [PATCH 14/49] net/ice/base: refactor HW table init\n\tfunction", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "1. Separated the calls to initialize and allocate the HW XLT tables\nfrom call to fill table. This is to allow the ice_init_hw_tbls call\nto be made prior to package download so that all HW structures are\ncorrectly initialized. This will avoid any invalid memory references\nif package download fails on unloading the driver.\n2. Fill HW tables with package content after successful package download.\n3. Free HW table and flow profile allocations when unloading driver.\n4. Add flag in block structure to check if lists in block are\ninitialized. This is to avoid any NULL reference in releasing flow\nprofiles that may have been freed in previous calls to free tables.\n\nSigned-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Leyi Rong <leyi.rong@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 6 +-\n drivers/net/ice/base/ice_flex_pipe.c | 284 ++++++++++++++-------------\n drivers/net/ice/base/ice_flex_pipe.h | 1 +\n drivers/net/ice/base/ice_flex_type.h | 1 +\n 4 files changed, 151 insertions(+), 141 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex a0ab25aef..62c7fad0d 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -916,12 +916,13 @@ enum ice_status ice_init_hw(struct ice_hw *hw)\n \n \tice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);\n \tice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);\n-\n \t/* Obtain counter base index which would be used by flow director */\n \tstatus = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);\n \tif (status)\n \t\tgoto err_unroll_fltr_mgmt_struct;\n-\n+\tstatus = ice_init_hw_tbls(hw);\n+\tif (status)\n+\t\tgoto err_unroll_fltr_mgmt_struct;\n \treturn ICE_SUCCESS;\n \n err_unroll_fltr_mgmt_struct:\n@@ -952,6 +953,7 @@ void ice_deinit_hw(struct ice_hw *hw)\n \tice_sched_cleanup_all(hw);\n \tice_sched_clear_agg(hw);\n \tice_free_seg(hw);\n+\tice_free_hw_tbls(hw);\n \n \tif (hw->port_info) {\n \t\tice_free(hw, hw->port_info);\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c\nindex 8f0b513f4..93e056853 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.c\n+++ b/drivers/net/ice/base/ice_flex_pipe.c\n@@ -1375,10 +1375,12 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)\n \n \tif (!status) {\n \t\thw->seg = seg;\n-\t\t/* on successful package download, update other required\n-\t\t * registers to support the package\n+\t\t/* on successful package download update other required\n+\t\t * registers to support the package and fill HW tables\n+\t\t * with package content.\n \t\t */\n \t\tice_init_pkg_regs(hw);\n+\t\tice_fill_blk_tbls(hw);\n \t} else {\n \t\tice_debug(hw, ICE_DBG_INIT, \"package load failed, %d\\n\",\n \t\t\t status);\n@@ -2755,6 +2757,65 @@ static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = {\n \t}\n };\n \n+/**\n+ * ice_init_sw_xlt1_db - init software XLT1 database from HW tables\n+ * @hw: pointer to the hardware structure\n+ * @blk: the HW block to initialize\n+ */\n+static\n+void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)\n+{\n+\tu16 pt;\n+\n+\tfor (pt = 0; pt < hw->blk[blk].xlt1.count; pt++) {\n+\t\tu8 ptg;\n+\n+\t\tptg = hw->blk[blk].xlt1.t[pt];\n+\t\tif (ptg != ICE_DEFAULT_PTG) {\n+\t\t\tice_ptg_alloc_val(hw, blk, ptg);\n+\t\t\tice_ptg_add_mv_ptype(hw, blk, pt, ptg);\n+\t\t}\n+\t}\n+}\n+\n+/**\n+ * ice_init_sw_xlt2_db - init software XLT2 database from HW tables\n+ * @hw: pointer to the hardware structure\n+ * @blk: the HW block to initialize\n+ */\n+static void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)\n+{\n+\tu16 vsi;\n+\n+\tfor (vsi = 0; vsi < hw->blk[blk].xlt2.count; vsi++) {\n+\t\tu16 vsig;\n+\n+\t\tvsig = hw->blk[blk].xlt2.t[vsi];\n+\t\tif (vsig) {\n+\t\t\tice_vsig_alloc_val(hw, blk, vsig);\n+\t\t\tice_vsig_add_mv_vsi(hw, blk, vsi, vsig);\n+\t\t\t/* no changes at this time, since this has been\n+\t\t\t * initialized from the original package\n+\t\t\t */\n+\t\t\thw->blk[blk].xlt2.vsis[vsi].changed = 0;\n+\t\t}\n+\t}\n+}\n+\n+/**\n+ * ice_init_sw_db - init software database from HW tables\n+ * @hw: pointer to the hardware structure\n+ */\n+static void ice_init_sw_db(struct ice_hw *hw)\n+{\n+\tu16 i;\n+\n+\tfor (i = 0; i < ICE_BLK_COUNT; i++) {\n+\t\tice_init_sw_xlt1_db(hw, (enum ice_block)i);\n+\t\tice_init_sw_xlt2_db(hw, (enum ice_block)i);\n+\t}\n+}\n+\n /**\n * ice_fill_tbl - Reads content of a single table type into database\n * @hw: pointer to the hardware structure\n@@ -2853,12 +2914,12 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)\n \t\tcase ICE_SID_FLD_VEC_PE:\n \t\t\tes = (struct ice_sw_fv_section *)sect;\n \t\t\tsrc = (u8 *)es->fv;\n-\t\t\tsect_len = LE16_TO_CPU(es->count) *\n-\t\t\t\thw->blk[block_id].es.fvw *\n+\t\t\tsect_len = (u32)(LE16_TO_CPU(es->count) *\n+\t\t\t\t\t hw->blk[block_id].es.fvw) *\n \t\t\t\tsizeof(*hw->blk[block_id].es.t);\n \t\t\tdst = (u8 *)hw->blk[block_id].es.t;\n-\t\t\tdst_len = hw->blk[block_id].es.count *\n-\t\t\t\thw->blk[block_id].es.fvw *\n+\t\t\tdst_len = (u32)(hw->blk[block_id].es.count *\n+\t\t\t\t\thw->blk[block_id].es.fvw) *\n \t\t\t\tsizeof(*hw->blk[block_id].es.t);\n \t\t\tbreak;\n \t\tdefault:\n@@ -2886,75 +2947,61 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)\n }\n \n /**\n- * ice_fill_blk_tbls - Read package content for tables of a block\n+ * ice_fill_blk_tbls - Read package context for tables\n * @hw: pointer to the hardware structure\n- * @block_id: The block ID which contains the tables to be copied\n *\n * Reads the current package contents and populates the driver\n- * database with the data it contains to allow for advanced driver\n- * features.\n- */\n-static void ice_fill_blk_tbls(struct ice_hw *hw, enum ice_block block_id)\n-{\n-\tice_fill_tbl(hw, block_id, hw->blk[block_id].xlt1.sid);\n-\tice_fill_tbl(hw, block_id, hw->blk[block_id].xlt2.sid);\n-\tice_fill_tbl(hw, block_id, hw->blk[block_id].prof.sid);\n-\tice_fill_tbl(hw, block_id, hw->blk[block_id].prof_redir.sid);\n-\tice_fill_tbl(hw, block_id, hw->blk[block_id].es.sid);\n-}\n-\n-/**\n- * ice_free_flow_profs - free flow profile entries\n- * @hw: pointer to the hardware structure\n+ * database with the data iteratively for all advanced feature\n+ * blocks. Assume that the Hw tables have been allocated.\n */\n-static void ice_free_flow_profs(struct ice_hw *hw)\n+void ice_fill_blk_tbls(struct ice_hw *hw)\n {\n \tu8 i;\n \n \tfor (i = 0; i < ICE_BLK_COUNT; i++) {\n-\t\tstruct ice_flow_prof *p, *tmp;\n-\n-\t\tif (!&hw->fl_profs[i])\n-\t\t\tcontinue;\n-\n-\t\t/* This call is being made as part of resource deallocation\n-\t\t * during unload. Lock acquire and release will not be\n-\t\t * necessary here.\n-\t\t */\n-\t\tLIST_FOR_EACH_ENTRY_SAFE(p, tmp, &hw->fl_profs[i],\n-\t\t\t\t\t ice_flow_prof, l_entry) {\n-\t\t\tstruct ice_flow_entry *e, *t;\n-\n-\t\t\tLIST_FOR_EACH_ENTRY_SAFE(e, t, &p->entries,\n-\t\t\t\t\t\t ice_flow_entry, l_entry)\n-\t\t\t\tice_flow_rem_entry(hw, ICE_FLOW_ENTRY_HNDL(e));\n-\n-\t\t\tLIST_DEL(&p->l_entry);\n-\t\t\tif (p->acts)\n-\t\t\t\tice_free(hw, p->acts);\n-\t\t\tice_free(hw, p);\n-\t\t}\n+\t\tenum ice_block blk_id = (enum ice_block)i;\n \n-\t\tice_destroy_lock(&hw->fl_profs_locks[i]);\n+\t\tice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt1.sid);\n+\t\tice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt2.sid);\n+\t\tice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof.sid);\n+\t\tice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof_redir.sid);\n+\t\tice_fill_tbl(hw, blk_id, hw->blk[blk_id].es.sid);\n \t}\n+\n+\tice_init_sw_db(hw);\n }\n \n /**\n- * ice_free_prof_map - frees the profile map\n+ * ice_free_flow_profs - free flow profile entries\n * @hw: pointer to the hardware structure\n- * @blk: the HW block which contains the profile map to be freed\n+ * @blk_idx: HW block index\n */\n-static void ice_free_prof_map(struct ice_hw *hw, enum ice_block blk)\n+static void ice_free_flow_profs(struct ice_hw *hw, u8 blk_idx)\n {\n-\tstruct ice_prof_map *del, *tmp;\n+\tstruct ice_flow_prof *p, *tmp;\n \n-\tif (LIST_EMPTY(&hw->blk[blk].es.prof_map))\n-\t\treturn;\n+\t/* This call is being made as part of resource deallocation\n+\t * during unload. Lock acquire and release will not be\n+\t * necessary here.\n+\t */\n+\tLIST_FOR_EACH_ENTRY_SAFE(p, tmp, &hw->fl_profs[blk_idx],\n+\t\t\t\t ice_flow_prof, l_entry) {\n+\t\tstruct ice_flow_entry *e, *t;\n+\n+\t\tLIST_FOR_EACH_ENTRY_SAFE(e, t, &p->entries,\n+\t\t\t\t\t ice_flow_entry, l_entry)\n+\t\t\tice_flow_rem_entry(hw, ICE_FLOW_ENTRY_HNDL(e));\n \n-\tLIST_FOR_EACH_ENTRY_SAFE(del, tmp, &hw->blk[blk].es.prof_map,\n-\t\t\t\t ice_prof_map, list) {\n-\t\tice_rem_prof(hw, blk, del->profile_cookie);\n+\t\tLIST_DEL(&p->l_entry);\n+\t\tif (p->acts)\n+\t\t\tice_free(hw, p->acts);\n+\t\tice_free(hw, p);\n \t}\n+\n+\t/* if driver is in reset and tables are being cleared\n+\t * re-initialize the flow profile list heads\n+\t */\n+\tINIT_LIST_HEAD(&hw->fl_profs[blk_idx]);\n }\n \n /**\n@@ -2980,10 +3027,25 @@ static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)\n */\n void ice_free_hw_tbls(struct ice_hw *hw)\n {\n+\tstruct ice_rss_cfg *r, *rt;\n \tu8 i;\n \n \tfor (i = 0; i < ICE_BLK_COUNT; i++) {\n-\t\tice_free_prof_map(hw, (enum ice_block)i);\n+\t\tif (hw->blk[i].is_list_init) {\n+\t\t\tstruct ice_es *es = &hw->blk[i].es;\n+\t\t\tstruct ice_prof_map *del, *tmp;\n+\n+\t\t\tLIST_FOR_EACH_ENTRY_SAFE(del, tmp, &es->prof_map,\n+\t\t\t\t\t\t ice_prof_map, list) {\n+\t\t\t\tLIST_DEL(&del->list);\n+\t\t\t\tice_free(hw, del);\n+\t\t\t}\n+\t\t\tice_destroy_lock(&es->prof_map_lock);\n+\n+\t\t\tice_free_flow_profs(hw, i);\n+\t\t\tice_destroy_lock(&hw->fl_profs_locks[i]);\n+\t\t\thw->blk[i].is_list_init = false;\n+\t\t}\n \t\tice_free_vsig_tbl(hw, (enum ice_block)i);\n \t\tice_free(hw, hw->blk[i].xlt1.ptypes);\n \t\tice_free(hw, hw->blk[i].xlt1.ptg_tbl);\n@@ -2998,84 +3060,24 @@ void ice_free_hw_tbls(struct ice_hw *hw)\n \t\tice_free(hw, hw->blk[i].es.written);\n \t}\n \n+\tLIST_FOR_EACH_ENTRY_SAFE(r, rt, &hw->rss_list_head,\n+\t\t\t\t ice_rss_cfg, l_entry) {\n+\t\tLIST_DEL(&r->l_entry);\n+\t\tice_free(hw, r);\n+\t}\n+\tice_destroy_lock(&hw->rss_locks);\n \tice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);\n-\n-\tice_free_flow_profs(hw);\n }\n \n /**\n * ice_init_flow_profs - init flow profile locks and list heads\n * @hw: pointer to the hardware structure\n+ * @blk_idx: HW block index\n */\n-static void ice_init_flow_profs(struct ice_hw *hw)\n+static void ice_init_flow_profs(struct ice_hw *hw, u8 blk_idx)\n {\n-\tu8 i;\n-\n-\tfor (i = 0; i < ICE_BLK_COUNT; i++) {\n-\t\tice_init_lock(&hw->fl_profs_locks[i]);\n-\t\tINIT_LIST_HEAD(&hw->fl_profs[i]);\n-\t}\n-}\n-\n-/**\n- * ice_init_sw_xlt1_db - init software XLT1 database from HW tables\n- * @hw: pointer to the hardware structure\n- * @blk: the HW block to initialize\n- */\n-static\n-void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)\n-{\n-\tu16 pt;\n-\n-\tfor (pt = 0; pt < hw->blk[blk].xlt1.count; pt++) {\n-\t\tu8 ptg;\n-\n-\t\tptg = hw->blk[blk].xlt1.t[pt];\n-\t\tif (ptg != ICE_DEFAULT_PTG) {\n-\t\t\tice_ptg_alloc_val(hw, blk, ptg);\n-\t\t\tice_ptg_add_mv_ptype(hw, blk, pt, ptg);\n-\t\t}\n-\t}\n-}\n-\n-/**\n- * ice_init_sw_xlt2_db - init software XLT2 database from HW tables\n- * @hw: pointer to the hardware structure\n- * @blk: the HW block to initialize\n- */\n-static\n-void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)\n-{\n-\tu16 vsi;\n-\n-\tfor (vsi = 0; vsi < hw->blk[blk].xlt2.count; vsi++) {\n-\t\tu16 vsig;\n-\n-\t\tvsig = hw->blk[blk].xlt2.t[vsi];\n-\t\tif (vsig) {\n-\t\t\tice_vsig_alloc_val(hw, blk, vsig);\n-\t\t\tice_vsig_add_mv_vsi(hw, blk, vsi, vsig);\n-\t\t\t/* no changes at this time, since this has been\n-\t\t\t * initialized from the original package\n-\t\t\t */\n-\t\t\thw->blk[blk].xlt2.vsis[vsi].changed = 0;\n-\t\t}\n-\t}\n-}\n-\n-/**\n- * ice_init_sw_db - init software database from HW tables\n- * @hw: pointer to the hardware structure\n- */\n-static\n-void ice_init_sw_db(struct ice_hw *hw)\n-{\n-\tu16 i;\n-\n-\tfor (i = 0; i < ICE_BLK_COUNT; i++) {\n-\t\tice_init_sw_xlt1_db(hw, (enum ice_block)i);\n-\t\tice_init_sw_xlt2_db(hw, (enum ice_block)i);\n-\t}\n+\tice_init_lock(&hw->fl_profs_locks[blk_idx]);\n+\tINIT_LIST_HEAD(&hw->fl_profs[blk_idx]);\n }\n \n /**\n@@ -3086,14 +3088,23 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)\n {\n \tu8 i;\n \n-\tice_init_flow_profs(hw);\n-\n+\tice_init_lock(&hw->rss_locks);\n+\tINIT_LIST_HEAD(&hw->rss_list_head);\n \tfor (i = 0; i < ICE_BLK_COUNT; i++) {\n \t\tstruct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;\n \t\tstruct ice_prof_tcam *prof = &hw->blk[i].prof;\n \t\tstruct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;\n \t\tstruct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;\n \t\tstruct ice_es *es = &hw->blk[i].es;\n+\t\tu16 j;\n+\n+\t\tif (hw->blk[i].is_list_init)\n+\t\t\tcontinue;\n+\n+\t\tice_init_flow_profs(hw, i);\n+\t\tice_init_lock(&es->prof_map_lock);\n+\t\tINIT_LIST_HEAD(&es->prof_map);\n+\t\thw->blk[i].is_list_init = true;\n \n \t\thw->blk[i].overwrite = blk_sizes[i].overwrite;\n \t\tes->reverse = blk_sizes[i].reverse;\n@@ -3131,6 +3142,9 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)\n \t\tif (!xlt2->vsig_tbl)\n \t\t\tgoto err;\n \n+\t\tfor (j = 0; j < xlt2->count; j++)\n+\t\t\tINIT_LIST_HEAD(&xlt2->vsig_tbl[j].prop_lst);\n+\n \t\txlt2->t = (u16 *)ice_calloc(hw, xlt2->count, sizeof(*xlt2->t));\n \t\tif (!xlt2->t)\n \t\t\tgoto err;\n@@ -3157,8 +3171,8 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)\n \t\tes->count = blk_sizes[i].es;\n \t\tes->fvw = blk_sizes[i].fvw;\n \t\tes->t = (struct ice_fv_word *)\n-\t\t\tice_calloc(hw, es->count * es->fvw, sizeof(*es->t));\n-\n+\t\t\tice_calloc(hw, (u32)(es->count * es->fvw),\n+\t\t\t\t sizeof(*es->t));\n \t\tif (!es->t)\n \t\t\tgoto err;\n \n@@ -3170,15 +3184,7 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)\n \n \t\tif (!es->ref_count)\n \t\t\tgoto err;\n-\n-\t\tINIT_LIST_HEAD(&es->prof_map);\n-\n-\t\t/* Now that tables are allocated, read in package data */\n-\t\tice_fill_blk_tbls(hw, (enum ice_block)i);\n \t}\n-\n-\tice_init_sw_db(hw);\n-\n \treturn ICE_SUCCESS;\n \n err:\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h\nindex 2710dded6..e8cc9cef3 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.h\n+++ b/drivers/net/ice/base/ice_flex_pipe.h\n@@ -98,6 +98,7 @@ enum ice_status\n ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);\n enum ice_status ice_init_hw_tbls(struct ice_hw *hw);\n void ice_free_seg(struct ice_hw *hw);\n+void ice_fill_blk_tbls(struct ice_hw *hw);\n void ice_free_hw_tbls(struct ice_hw *hw);\n enum ice_status\n ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,\ndiff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h\nindex 892c94b1f..7133983ff 100644\n--- a/drivers/net/ice/base/ice_flex_type.h\n+++ b/drivers/net/ice/base/ice_flex_type.h\n@@ -676,6 +676,7 @@ struct ice_blk_info {\n \tstruct ice_prof_redir prof_redir;\n \tstruct ice_es es;\n \tu8 overwrite; /* set to true to allow overwrite of table entries */\n+\tu8 is_list_init;\n };\n \n enum ice_chg_type {\n", "prefixes": [ "14/49" ] }