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GET /api/patches/54114/?format=api
{ "id": 54114, "url": "http://patches.dpdk.org/api/patches/54114/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-56-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190602152434.23996-56-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190602152434.23996-56-jerinj@marvell.com", "date": "2019-06-02T15:24:31", "name": "[v1,55/58] net/octeontx2: add device start operation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "89090bdbbc3e29beea1794601af0992d2ca01c6a", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-56-jerinj@marvell.com/mbox/", "series": [ { "id": 4848, "url": "http://patches.dpdk.org/api/series/4848/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4848", "date": "2019-06-02T15:23:36", "name": "OCTEON TX2 Ethdev driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4848/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54114/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54114/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9255F1BC28;\n\tSun, 2 Jun 2019 17:27:27 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id B388D1BC25\n\tfor <dev@dpdk.org>; Sun, 2 Jun 2019 17:27:26 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx52FK7HI020263; Sun, 2 Jun 2019 08:27:26 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk49ag-2\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 02 Jun 2019 08:27:26 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 2 Jun 2019 08:27:24 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 2 Jun 2019 08:27:24 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 015883F703F;\n\tSun, 2 Jun 2019 08:27:22 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=L/0ljATpVlB/HPy59chuNzur1qzjmQBoM7dAoGcD+s0=;\n\tb=SMvUNLkKtYF77UDQwpux99jW7VDFk3qONhvBkJIIQbXymemErFCx2xLQcqI1UC6vcwWZ\n\tDHzphGK4CW2ybx2LamzlqPP/QoxeigRve2XyGiZlu37XBXIv9EGYahgHxBPDwxwduPlu\n\t7chX5AKhmUHgdOwMSYYzNjDVvv/EGQD7MJ8lU+V+44+9N0nHcG88z6njHNlqepZfBe/j\n\tSJJJd7lbvDjExp/98nAoblUyLwFXdjefUhQUCYF9SJ+7nvhDtVHxXmLdDfhKDGdQHxyH\n\tC9cuenhv0OX1Xuc7D+oPEij6VYPG7510iWWPXtQ3bm2FtEMiOSxvAUnalTWz90VdUE06\n\tWA== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>", "CC": "<ferruh.yigit@intel.com>, Vamsi Attunuru <vattunuru@marvell.com>", "Date": "Sun, 2 Jun 2019 20:54:31 +0530", "Message-ID": "<20190602152434.23996-56-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190602152434.23996-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-02_09:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v1 55/58] net/octeontx2: add device start\n\toperation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Nithin Dabilpuram <ndabilpuram@marvell.com>\n\nAdd device start operation and update the correct\nfunction pointers for Rx and Tx burst functions.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\n---\n drivers/net/octeontx2/otx2_ethdev.c | 180 ++++++++++++++++++++++++\n drivers/net/octeontx2/otx2_flow.c | 4 +-\n drivers/net/octeontx2/otx2_flow_parse.c | 7 +-\n drivers/net/octeontx2/otx2_ptp.c | 8 ++\n drivers/net/octeontx2/otx2_vlan.c | 1 +\n 5 files changed, 197 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex fdcab89b8..bdf291996 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -135,6 +135,55 @@ otx2_cgx_rxtx_stop(struct otx2_eth_dev *dev)\n \treturn otx2_mbox_process(mbox);\n }\n \n+static int\n+npc_rx_enable(struct otx2_eth_dev *dev)\n+{\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\n+\totx2_mbox_alloc_msg_nix_lf_start_rx(mbox);\n+\n+\treturn otx2_mbox_process(mbox);\n+}\n+\n+static int\n+npc_rx_disable(struct otx2_eth_dev *dev)\n+{\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\n+\totx2_mbox_alloc_msg_nix_lf_stop_rx(mbox);\n+\n+\treturn otx2_mbox_process(mbox);\n+}\n+\n+static int\n+nix_cgx_start_link_event(struct otx2_eth_dev *dev)\n+{\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\n+\tif (otx2_dev_is_vf(dev))\n+\t\treturn 0;\n+\n+\totx2_mbox_alloc_msg_cgx_start_linkevents(mbox);\n+\n+\treturn otx2_mbox_process(mbox);\n+}\n+\n+static int\n+cgx_intlbk_enable(struct otx2_eth_dev *dev, bool en)\n+{\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\n+\tif (otx2_dev_is_vf(dev))\n+\t\treturn 0;\n+\n+\tif (en)\n+\t\totx2_mbox_alloc_msg_cgx_intlbk_enable(mbox);\n+\telse\n+\t\totx2_mbox_alloc_msg_cgx_intlbk_disable(mbox);\n+\n+\treturn otx2_mbox_process(mbox);\n+}\n+\n static inline void\n nix_rx_queue_reset(struct otx2_eth_rxq *rxq)\n {\n@@ -478,6 +527,74 @@ nix_sq_max_sqe_sz(struct otx2_eth_txq *txq)\n \t\treturn NIX_MAXSQESZ_W8;\n }\n \n+static uint16_t\n+nix_rx_offload_flags(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct rte_eth_conf *conf = &data->dev_conf;\n+\tstruct rte_eth_rxmode *rxmode = &conf->rxmode;\n+\tuint16_t flags = 0;\n+\n+\tif (rxmode->mq_mode == ETH_MQ_RX_RSS)\n+\t\tflags |= NIX_RX_OFFLOAD_RSS_F;\n+\n+\tif (dev->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM |\n+\t\t\t DEV_RX_OFFLOAD_UDP_CKSUM))\n+\t\tflags |= NIX_RX_OFFLOAD_CHECKSUM_F;\n+\n+\tif (dev->rx_offloads & (DEV_RX_OFFLOAD_IPV4_CKSUM |\n+\t\t\t\tDEV_RX_OFFLOAD_OUTER_IPV4_CKSUM))\n+\t\tflags |= NIX_RX_OFFLOAD_CHECKSUM_F;\n+\n+\tif (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\n+\t\tflags |= NIX_RX_MULTI_SEG_F;\n+\n+\tif (dev->rx_offloads & (DEV_RX_OFFLOAD_VLAN_STRIP |\n+\t\t\t\tDEV_RX_OFFLOAD_QINQ_STRIP))\n+\t\tflags |= NIX_RX_OFFLOAD_VLAN_STRIP_F;\n+\n+\tif ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP))\n+\t\tflags |= NIX_RX_OFFLOAD_TSTAMP_F;\n+\n+\treturn flags;\n+}\n+\n+static uint16_t\n+nix_tx_offload_flags(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tuint64_t conf = dev->tx_offloads;\n+\tuint16_t flags = 0;\n+\n+\t/* Fastpath is dependent on these enums */\n+\tRTE_BUILD_BUG_ON(PKT_TX_TCP_CKSUM != (1ULL << 52));\n+\tRTE_BUILD_BUG_ON(PKT_TX_SCTP_CKSUM != (2ULL << 52));\n+\tRTE_BUILD_BUG_ON(PKT_TX_UDP_CKSUM != (3ULL << 52));\n+\n+\tif (conf & DEV_TX_OFFLOAD_VLAN_INSERT ||\n+\t conf & DEV_TX_OFFLOAD_QINQ_INSERT)\n+\t\tflags |= NIX_TX_OFFLOAD_VLAN_QINQ_F;\n+\n+\tif (conf & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM ||\n+\t conf & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM)\n+\t\tflags |= NIX_TX_OFFLOAD_OL3_OL4_CSUM_F;\n+\n+\tif (conf & DEV_TX_OFFLOAD_IPV4_CKSUM ||\n+\t conf & DEV_TX_OFFLOAD_TCP_CKSUM ||\n+\t conf & DEV_TX_OFFLOAD_UDP_CKSUM ||\n+\t conf & DEV_TX_OFFLOAD_SCTP_CKSUM)\n+\t\tflags |= NIX_TX_OFFLOAD_L3_L4_CSUM_F;\n+\n+\tif (!(conf & DEV_TX_OFFLOAD_MBUF_FAST_FREE))\n+\t\tflags |= NIX_TX_OFFLOAD_MBUF_NOFF_F;\n+\n+\tif (conf & DEV_TX_OFFLOAD_MULTI_SEGS)\n+\t\tflags |= NIX_TX_MULTI_SEG_F;\n+\n+\treturn flags;\n+}\n+\n static int\n nix_sq_init(struct otx2_eth_txq *txq)\n {\n@@ -1089,6 +1206,8 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)\n \n \tdev->rx_offloads = rxmode->offloads;\n \tdev->tx_offloads = txmode->offloads;\n+\tdev->rx_offload_flags |= nix_rx_offload_flags(eth_dev);\n+\tdev->tx_offload_flags |= nix_tx_offload_flags(eth_dev);\n \tdev->rss_info.rss_grps = NIX_RSS_GRPS;\n \n \tnb_rxq = RTE_MAX(data->nb_rx_queues, 1);\n@@ -1128,6 +1247,13 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)\n \t\tgoto free_nix_lf;\n \t}\n \n+\t/* Configure loop back mode */\n+\trc = cgx_intlbk_enable(dev, eth_dev->data->dev_conf.lpbk_mode);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to configure cgx loop back mode rc=%d\", rc);\n+\t\tgoto free_nix_lf;\n+\t}\n+\n \trc = otx2_nix_rxchan_bpid_cfg(eth_dev, true);\n \tif (rc) {\n \t\totx2_err(\"Failed to configure nix rx chan bpid cfg rc=%d\", rc);\n@@ -1277,6 +1403,59 @@ otx2_nix_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)\n \treturn rc;\n }\n \n+static int\n+otx2_nix_dev_start(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tint rc, i;\n+\n+\t/* Start rx queues */\n+\tfor (i = 0; i < eth_dev->data->nb_rx_queues; i++) {\n+\t\trc = otx2_nix_rx_queue_start(eth_dev, i);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t}\n+\n+\t/* Start tx queues */\n+\tfor (i = 0; i < eth_dev->data->nb_tx_queues; i++) {\n+\t\trc = otx2_nix_tx_queue_start(eth_dev, i);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t}\n+\n+\trc = otx2_nix_update_flow_ctrl_mode(eth_dev);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to update flow ctrl mode %d\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\trc = npc_rx_enable(dev);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to enable NPC rx %d\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\totx2_nix_toggle_flag_link_cfg(dev, true);\n+\n+\trc = nix_cgx_start_link_event(dev);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to start cgx link event %d\", rc);\n+\t\tgoto rx_disable;\n+\t}\n+\n+\totx2_nix_toggle_flag_link_cfg(dev, false);\n+\totx2_eth_set_tx_function(eth_dev);\n+\totx2_eth_set_rx_function(eth_dev);\n+\n+\treturn 0;\n+\n+rx_disable:\n+\tnpc_rx_disable(dev);\n+\totx2_nix_toggle_flag_link_cfg(dev, false);\n+\treturn rc;\n+}\n+\n+\n /* Initialize and register driver with DPDK Application */\n static const struct eth_dev_ops otx2_eth_dev_ops = {\n \t.dev_infos_get = otx2_nix_info_get,\n@@ -1286,6 +1465,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {\n \t.tx_queue_release = otx2_nix_tx_queue_release,\n \t.rx_queue_setup = otx2_nix_rx_queue_setup,\n \t.rx_queue_release = otx2_nix_rx_queue_release,\n+\t.dev_start = otx2_nix_dev_start,\n \t.tx_queue_start = otx2_nix_tx_queue_start,\n \t.tx_queue_stop = otx2_nix_tx_queue_stop,\n \t.rx_queue_start = otx2_nix_rx_queue_start,\ndiff --git a/drivers/net/octeontx2/otx2_flow.c b/drivers/net/octeontx2/otx2_flow.c\nindex 270433cd6..68337631d 100644\n--- a/drivers/net/octeontx2/otx2_flow.c\n+++ b/drivers/net/octeontx2/otx2_flow.c\n@@ -498,8 +498,10 @@ otx2_flow_destroy(struct rte_eth_dev *dev,\n \t\t\treturn -EINVAL;\n \n \t\t/* Clear mark offload flag if there are no more mark actions */\n-\t\tif (rte_atomic32_sub_return(&npc->mark_actions, 1) == 0)\n+\t\tif (rte_atomic32_sub_return(&npc->mark_actions, 1) == 0) {\n \t\t\thw->rx_offload_flags &= ~NIX_RX_OFFLOAD_MARK_UPDATE_F;\n+\t\t\totx2_eth_set_rx_function(dev);\n+\t\t}\n \t}\n \n \trc = flow_free_rss_action(dev, flow);\ndiff --git a/drivers/net/octeontx2/otx2_flow_parse.c b/drivers/net/octeontx2/otx2_flow_parse.c\nindex cf13813d8..cebae645e 100644\n--- a/drivers/net/octeontx2/otx2_flow_parse.c\n+++ b/drivers/net/octeontx2/otx2_flow_parse.c\n@@ -922,8 +922,11 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev,\n \tif (mark)\n \t\tflow->npc_action |= (uint64_t)mark << 40;\n \n-\tif (rte_atomic32_read(&npc->mark_actions) == 1)\n-\t\thw->rx_offload_flags |= NIX_RX_OFFLOAD_MARK_UPDATE_F;\n+\tif (rte_atomic32_read(&npc->mark_actions) == 1) {\n+\t\thw->rx_offload_flags |=\n+\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F;\n+\t\totx2_eth_set_rx_function(dev);\n+\t}\n \n \n \t/* Ideally AF must ensure that correct pf_func is set */\ndiff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c\nindex 5291da241..0186c629a 100644\n--- a/drivers/net/octeontx2/otx2_ptp.c\n+++ b/drivers/net/octeontx2/otx2_ptp.c\n@@ -118,6 +118,10 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)\n \t\t\tstruct otx2_eth_txq *txq = eth_dev->data->tx_queues[i];\n \t\t\totx2_nix_form_default_desc(txq);\n \t\t}\n+\n+\t\t/* Setting up the function pointers as per new offload flags */\n+\t\totx2_eth_set_rx_function(eth_dev);\n+\t\totx2_eth_set_tx_function(eth_dev);\n \t}\n \treturn rc;\n }\n@@ -147,6 +151,10 @@ otx2_nix_timesync_disable(struct rte_eth_dev *eth_dev)\n \t\t\tstruct otx2_eth_txq *txq = eth_dev->data->tx_queues[i];\n \t\t\totx2_nix_form_default_desc(txq);\n \t\t}\n+\n+\t\t/* Setting up the function pointers as per new offload flags */\n+\t\totx2_eth_set_rx_function(eth_dev);\n+\t\totx2_eth_set_tx_function(eth_dev);\n \t}\n \treturn rc;\n }\ndiff --git a/drivers/net/octeontx2/otx2_vlan.c b/drivers/net/octeontx2/otx2_vlan.c\nindex 3c0d40553..4f56cefd9 100644\n--- a/drivers/net/octeontx2/otx2_vlan.c\n+++ b/drivers/net/octeontx2/otx2_vlan.c\n@@ -656,6 +656,7 @@ otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)\n \t\t\tDEV_RX_OFFLOAD_QINQ_STRIP)) {\n \t\tdev->rx_offloads |= offloads;\n \t\tdev->rx_offload_flags |= NIX_RX_OFFLOAD_VLAN_STRIP_F;\n+\t\totx2_eth_set_rx_function(eth_dev);\n \t}\n \n done:\n", "prefixes": [ "v1", "55/58" ] }