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GET /api/patches/54108/?format=api
{ "id": 54108, "url": "http://patches.dpdk.org/api/patches/54108/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-36-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190602152434.23996-36-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190602152434.23996-36-jerinj@marvell.com", "date": "2019-06-02T15:24:11", "name": "[v1,35/58] net/octeontx2: flow mailbox utility", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a053bc4ea2919ee13cfaa0fcc15816b569846b6a", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-36-jerinj@marvell.com/mbox/", "series": [ { "id": 4848, "url": "http://patches.dpdk.org/api/series/4848/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4848", "date": "2019-06-02T15:23:36", "name": "OCTEON TX2 Ethdev driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4848/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54108/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54108/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BF9541BB4D;\n\tSun, 2 Jun 2019 17:26:32 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id F2CEC1BB3B\n\tfor <dev@dpdk.org>; Sun, 2 Jun 2019 17:26:24 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx52FJxgx021326; Sun, 2 Jun 2019 08:26:24 -0700", "from sc-exch03.marvell.com ([199.233.58.183])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2supqkvqju-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 02 Jun 2019 08:26:24 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 2 Jun 2019 08:26:23 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 2 Jun 2019 08:26:23 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 95C6F3F703F;\n\tSun, 2 Jun 2019 08:26:21 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=Sbnve039aroqaAUyC/xE0cLXyt4ckc2C9yd9FCbDBZ0=;\n\tb=XsG9nQRiMik5mFI1s6fjQQj/E01kkyAD0+WpltA2g4eOtY5OFmrIZrdiWGiHWR/3+plA\n\tvDMOojW4OR5s/+XFjA9dyt6BIRP4NLEiBX/YOXIvvM78DyMH25UZawOUFHpLqxOUARv5\n\twTZTgGVaIi0WzKuVSboJemBvI4u2t/+udrOWfL2POxgIAe9x7N7IPJXn70t+8YjY9AmJ\n\tYZggn5JgPKAOYYtk8YOmxNqCQTIjtr75HEnG6YhCvam5OCx+O2VAZJhwesS0V7mWr2lw\n\tbNa2tYZyLemUNY7q5d/vJNDJomqVvpTc+DfJVNheZSgv9Ybt33cKv5b5PJsPwK3mvm+h\n\t5Q== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>", "CC": "<ferruh.yigit@intel.com>, Vivek Sharma <viveksharma@marvell.com>", "Date": "Sun, 2 Jun 2019 20:54:11 +0530", "Message-ID": "<20190602152434.23996-36-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190602152434.23996-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-02_09:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v1 35/58] net/octeontx2: flow mailbox utility", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding mailbox utility functions for rte_flow. These will be used\nto alloc, reserve and write the entries to the device on request.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\nSigned-off-by: Vivek Sharma <viveksharma@marvell.com>\n---\n drivers/net/octeontx2/otx2_flow.h | 6 +-\n drivers/net/octeontx2/otx2_flow_utils.c | 259 ++++++++++++++++++++++++\n 2 files changed, 264 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/octeontx2/otx2_flow.h b/drivers/net/octeontx2/otx2_flow.h\nindex 07d9e9fd6..04c5e487f 100644\n--- a/drivers/net/octeontx2/otx2_flow.h\n+++ b/drivers/net/octeontx2/otx2_flow.h\n@@ -380,5 +380,9 @@ int otx2_flow_parse_actions(struct rte_eth_dev *dev,\n \t\t\t const struct rte_flow_action actions[],\n \t\t\t struct rte_flow_error *error,\n \t\t\t struct rte_flow *flow);\n-\n+int\n+flow_validate_and_shift_prio_ent(struct otx2_mbox *mbox, struct rte_flow *flow,\n+\t\t\t\t struct otx2_npc_flow_info *flow_info,\n+\t\t\t\t struct npc_mcam_alloc_entry_rsp *rsp,\n+\t\t\t\t int req_prio);\n #endif /* __OTX2_FLOW_H__ */\ndiff --git a/drivers/net/octeontx2/otx2_flow_utils.c b/drivers/net/octeontx2/otx2_flow_utils.c\nindex bf20d7319..288f5776e 100644\n--- a/drivers/net/octeontx2/otx2_flow_utils.c\n+++ b/drivers/net/octeontx2/otx2_flow_utils.c\n@@ -367,3 +367,262 @@ otx2_flow_keyx_compress(uint64_t *data, uint32_t nibble_mask)\n \tdata[1] = cdata[1];\n }\n \n+static int\n+flow_first_set_bit(uint64_t slab)\n+{\n+\tint num = 0;\n+\n+\tif ((slab & 0xffffffff) == 0) {\n+\t\tnum += 32;\n+\t\tslab >>= 32;\n+\t}\n+\tif ((slab & 0xffff) == 0) {\n+\t\tnum += 16;\n+\t\tslab >>= 16;\n+\t}\n+\tif ((slab & 0xff) == 0) {\n+\t\tnum += 8;\n+\t\tslab >>= 8;\n+\t}\n+\tif ((slab & 0xf) == 0) {\n+\t\tnum += 4;\n+\t\tslab >>= 4;\n+\t}\n+\tif ((slab & 0x3) == 0) {\n+\t\tnum += 2;\n+\t\tslab >>= 2;\n+\t}\n+\tif ((slab & 0x1) == 0)\n+\t\tnum += 1;\n+\n+\treturn num;\n+}\n+\n+static int\n+flow_shift_lv_ent(struct otx2_mbox *mbox, struct rte_flow *flow,\n+\t\t struct otx2_npc_flow_info *flow_info,\n+\t\t uint32_t old_ent, uint32_t new_ent)\n+{\n+\tstruct npc_mcam_shift_entry_req *req;\n+\tstruct npc_mcam_shift_entry_rsp *rsp;\n+\tstruct otx2_flow_list *list;\n+\tstruct rte_flow *flow_iter;\n+\tint rc = 0;\n+\n+\totx2_npc_dbg(\"Old ent:%u new ent:%u priority:%u\", old_ent, new_ent,\n+\t\t flow->priority);\n+\n+\tlist = &flow_info->flow_list[flow->priority];\n+\n+\t/* Old entry is disabled & it's contents are moved to new_entry,\n+\t * new entry is enabled finally.\n+\t */\n+\treq = otx2_mbox_alloc_msg_npc_mcam_shift_entry(mbox);\n+\treq->curr_entry[0] = old_ent;\n+\treq->new_entry[0] = new_ent;\n+\treq->shift_count = 1;\n+\n+\totx2_mbox_msg_send(mbox, 0);\n+\trc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Remove old node from list */\n+\tTAILQ_FOREACH(flow_iter, list, next) {\n+\t\tif (flow_iter->mcam_id == old_ent)\n+\t\t\tTAILQ_REMOVE(list, flow_iter, next);\n+\t}\n+\n+\t/* Insert node with new mcam id at right place */\n+\tTAILQ_FOREACH(flow_iter, list, next) {\n+\t\tif (flow_iter->mcam_id > new_ent)\n+\t\t\tTAILQ_INSERT_BEFORE(flow_iter, flow, next);\n+\t}\n+\treturn rc;\n+}\n+\n+/* Exchange all required entries with a given priority level */\n+static int\n+flow_shift_ent(struct otx2_mbox *mbox, struct rte_flow *flow,\n+\t struct otx2_npc_flow_info *flow_info,\n+\t struct npc_mcam_alloc_entry_rsp *rsp, int dir, int prio_lvl)\n+{\n+\tstruct rte_bitmap *fr_bmp, *fr_bmp_rev, *lv_bmp, *lv_bmp_rev, *bmp;\n+\tuint32_t e_fr = 0, e_lv = 0, e, e_id = 0, mcam_entries;\n+\tuint64_t fr_bit_pos = 0, lv_bit_pos = 0, bit_pos = 0;\n+\t/* Bit position within the slab */\n+\tuint32_t sl_fr_bit_off = 0, sl_lv_bit_off = 0;\n+\t/* Overall bit position of the start of slab */\n+\t/* free & live entry index */\n+\tint rc_fr = 0, rc_lv = 0, rc = 0, idx = 0;\n+\tstruct otx2_mcam_ents_info *ent_info;\n+\t/* free & live bitmap slab */\n+\tuint64_t sl_fr = 0, sl_lv = 0, *sl;\n+\n+\tfr_bmp = flow_info->free_entries[prio_lvl];\n+\tfr_bmp_rev = flow_info->free_entries_rev[prio_lvl];\n+\tlv_bmp = flow_info->live_entries[prio_lvl];\n+\tlv_bmp_rev = flow_info->live_entries_rev[prio_lvl];\n+\tent_info = &flow_info->flow_entry_info[prio_lvl];\n+\tmcam_entries = flow_info->mcam_entries;\n+\n+\n+\t/* New entries allocated are always contiguous, but older entries\n+\t * already in free/live bitmap can be non-contiguous: so return\n+\t * shifted entries should be in non-contiguous format.\n+\t */\n+\twhile (idx <= rsp->count) {\n+\t\tif (!sl_fr && !sl_lv) {\n+\t\t\t/* Lower index elements to be exchanged */\n+\t\t\tif (dir < 0) {\n+\t\t\t\trc_fr = rte_bitmap_scan(fr_bmp, &e_fr, &sl_fr);\n+\t\t\t\trc_lv = rte_bitmap_scan(lv_bmp, &e_lv, &sl_lv);\n+\t\t\t\totx2_npc_dbg(\"Fwd slab rc fr %u rc lv %u \"\n+\t\t\t\t\t \"e_fr %u e_lv %u\", rc_fr, rc_lv,\n+\t\t\t\t\t e_fr, e_lv);\n+\t\t\t} else {\n+\t\t\t\trc_fr = rte_bitmap_scan(fr_bmp_rev,\n+\t\t\t\t\t\t\t&sl_fr_bit_off,\n+\t\t\t\t\t\t\t&sl_fr);\n+\t\t\t\trc_lv = rte_bitmap_scan(lv_bmp_rev,\n+\t\t\t\t\t\t\t&sl_lv_bit_off,\n+\t\t\t\t\t\t\t&sl_lv);\n+\n+\t\t\t\totx2_npc_dbg(\"Rev slab rc fr %u rc lv %u \"\n+\t\t\t\t\t \"e_fr %u e_lv %u\", rc_fr, rc_lv,\n+\t\t\t\t\t e_fr, e_lv);\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (rc_fr) {\n+\t\t\tfr_bit_pos = flow_first_set_bit(sl_fr);\n+\t\t\te_fr = sl_fr_bit_off + fr_bit_pos;\n+\t\t\totx2_npc_dbg(\"Fr_bit_pos 0x%\" PRIx64, fr_bit_pos);\n+\t\t} else {\n+\t\t\te_fr = ~(0);\n+\t\t}\n+\n+\t\tif (rc_lv) {\n+\t\t\tlv_bit_pos = flow_first_set_bit(sl_lv);\n+\t\t\te_lv = sl_lv_bit_off + lv_bit_pos;\n+\t\t\totx2_npc_dbg(\"Lv_bit_pos 0x%\" PRIx64, lv_bit_pos);\n+\t\t} else {\n+\t\t\te_lv = ~(0);\n+\t\t}\n+\n+\t\t/* First entry is from free_bmap */\n+\t\tif (e_fr < e_lv) {\n+\t\t\tbmp = fr_bmp;\n+\t\t\te = e_fr;\n+\t\t\tsl = &sl_fr;\n+\t\t\tbit_pos = fr_bit_pos;\n+\t\t\tif (dir > 0)\n+\t\t\t\te_id = mcam_entries - e - 1;\n+\t\t\telse\n+\t\t\t\te_id = e;\n+\t\t\totx2_npc_dbg(\"Fr e %u e_id %u\", e, e_id);\n+\t\t} else {\n+\t\t\tbmp = lv_bmp;\n+\t\t\te = e_lv;\n+\t\t\tsl = &sl_lv;\n+\t\t\tbit_pos = lv_bit_pos;\n+\t\t\tif (dir > 0)\n+\t\t\t\te_id = mcam_entries - e - 1;\n+\t\t\telse\n+\t\t\t\te_id = e;\n+\n+\t\t\totx2_npc_dbg(\"Lv e %u e_id %u\", e, e_id);\n+\t\t\tif (idx < rsp->count)\n+\t\t\t\trc =\n+\t\t\t\t flow_shift_lv_ent(mbox, flow,\n+\t\t\t\t\t\t flow_info, e_id,\n+\t\t\t\t\t\t rsp->entry + idx);\n+\t\t}\n+\n+\t\trte_bitmap_clear(bmp, e);\n+\t\trte_bitmap_set(bmp, rsp->entry + idx);\n+\t\t/* Update entry list, use non-contiguous\n+\t\t * list now.\n+\t\t */\n+\t\trsp->entry_list[idx] = e_id;\n+\t\t*sl &= ~(1 << bit_pos);\n+\n+\t\t/* Update min & max entry identifiers in current\n+\t\t * priority level.\n+\t\t */\n+\t\tif (dir < 0) {\n+\t\t\tent_info->max_id = rsp->entry + idx;\n+\t\t\tent_info->min_id = e_id;\n+\t\t} else {\n+\t\t\tent_info->max_id = e_id;\n+\t\t\tent_info->min_id = rsp->entry;\n+\t\t}\n+\n+\t\tidx++;\n+\t}\n+\treturn rc;\n+}\n+\n+/* Validate if newly allocated entries lie in the correct priority zone\n+ * since NPC_MCAM_LOWER_PRIO & NPC_MCAM_HIGHER_PRIO don't ensure zone accuracy.\n+ * If not properly aligned, shift entries to do so\n+ */\n+int\n+flow_validate_and_shift_prio_ent(struct otx2_mbox *mbox, struct rte_flow *flow,\n+\t\t\t\t struct otx2_npc_flow_info *flow_info,\n+\t\t\t\t struct npc_mcam_alloc_entry_rsp *rsp,\n+\t\t\t\t int req_prio)\n+{\n+\tint prio_idx = 0, rc = 0, needs_shift = 0, idx, prio = flow->priority;\n+\tstruct otx2_mcam_ents_info *info = flow_info->flow_entry_info;\n+\tint dir = (req_prio == NPC_MCAM_HIGHER_PRIO) ? 1 : -1;\n+\tuint32_t tot_ent = 0;\n+\n+\totx2_npc_dbg(\"Dir %d, priority = %d\", dir, prio);\n+\n+\tif (dir < 0)\n+\t\tprio_idx = flow_info->flow_max_priority - 1;\n+\n+\t/* Only live entries needs to be shifted, free entries can just be\n+\t * moved by bits manipulation.\n+\t */\n+\n+\t/* For dir = -1(NPC_MCAM_LOWER_PRIO), when shifting,\n+\t * NPC_MAX_PREALLOC_ENT are exchanged with adjoining higher priority\n+\t * level entries(lower indexes).\n+\t *\n+\t * For dir = +1(NPC_MCAM_HIGHER_PRIO), during shift,\n+\t * NPC_MAX_PREALLOC_ENT are exchanged with adjoining lower priority\n+\t * level entries(higher indexes) with highest indexes.\n+\t */\n+\tdo {\n+\t\ttot_ent = info[prio_idx].free_ent + info[prio_idx].live_ent;\n+\n+\t\tif (dir < 0 && prio_idx != prio &&\n+\t\t rsp->entry > info[prio_idx].max_id && tot_ent) {\n+\t\t\totx2_npc_dbg(\"Rsp entry %u prio idx %u \"\n+\t\t\t\t \"max id %u\", rsp->entry, prio_idx,\n+\t\t\t\t info[prio_idx].max_id);\n+\n+\t\t\tneeds_shift = 1;\n+\t\t} else if ((dir > 0) && (prio_idx != prio) &&\n+\t\t (rsp->entry < info[prio_idx].min_id) && tot_ent) {\n+\t\t\totx2_npc_dbg(\"Rsp entry %u prio idx %u \"\n+\t\t\t\t \"min id %u\", rsp->entry, prio_idx,\n+\t\t\t\t info[prio_idx].min_id);\n+\t\t\tneeds_shift = 1;\n+\t\t}\n+\n+\t\totx2_npc_dbg(\"Needs_shift = %d\", needs_shift);\n+\t\tif (needs_shift) {\n+\t\t\tneeds_shift = 0;\n+\t\t\trc = flow_shift_ent(mbox, flow, flow_info, rsp, dir,\n+\t\t\t\t\t prio_idx);\n+\t\t} else {\n+\t\t\tfor (idx = 0; idx < rsp->count; idx++)\n+\t\t\t\trsp->entry_list[idx] = rsp->entry + idx;\n+\t\t}\n+\t} while ((prio_idx != prio) && (prio_idx += dir));\n+\n+\treturn rc;\n+}\n", "prefixes": [ "v1", "35/58" ] }