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GET /api/patches/54093/?format=api
{ "id": 54093, "url": "http://patches.dpdk.org/api/patches/54093/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-51-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190602152434.23996-51-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190602152434.23996-51-jerinj@marvell.com", "date": "2019-06-02T15:24:26", "name": "[v1,50/58] net/octeontx2: add Rx multi segment version", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fe67ca1b7f7c1bb26b92155d9fc78cb676b7ee09", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-51-jerinj@marvell.com/mbox/", "series": [ { "id": 4848, "url": "http://patches.dpdk.org/api/series/4848/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4848", "date": "2019-06-02T15:23:36", "name": "OCTEON TX2 Ethdev driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4848/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54093/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54093/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DAD4E1BB71;\n\tSun, 2 Jun 2019 17:27:13 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id EC6F21BA57\n\tfor <dev@dpdk.org>; Sun, 2 Jun 2019 17:27:11 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx52FK4k8020253; Sun, 2 Jun 2019 08:27:11 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk499v-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 02 Jun 2019 08:27:11 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 2 Jun 2019 08:27:09 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 2 Jun 2019 08:27:09 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 8CAF23F7040;\n\tSun, 2 Jun 2019 08:27:07 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=VPjzGxk4M36Hm3e8jClYVS2NOkzh3uRj/nei6l88W4g=;\n\tb=Qd0pQPNvvEvZrHw1rg+uZKwRpSZ4+M0+Dkp6sLbPFT80Emb8kJRg7RCcyi6j+JXavNyO\n\tpblPATUgHBCkdRMcqeXFHyLdIM5tfFekOnPVy/fc88z/xIHApFeH0lN0me5PVHaFMtVS\n\th8nnZtn2sBBpNBWoqTHFeCAOJ7t51hywd1OGQ1wG5fDJkupWM77wBxiQKw4q//11lkc6\n\t3r/U1KLpurNyrFyMbNf+dCTbC0Wmqx5Y9Ej0KASQKzhCcgplo8LLlPMNFW15ZgdwiDt2\n\tf7Ev0ie59zumRAUojIUjCu4Gu9rPcqK2ispcjykNL0GNgVOxhKaauWr5xzQIpzVzjibd\n\tXQ== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, John McNamara <john.mcnamara@intel.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>, Jerin Jacob <jerinj@marvell.com>, \"Nithin\n\tDabilpuram\" <ndabilpuram@marvell.com>, Kiran Kumar K\n\t<kirankumark@marvell.com>, Anatoly Burakov <anatoly.burakov@intel.com>", "CC": "<ferruh.yigit@intel.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "Date": "Sun, 2 Jun 2019 20:54:26 +0530", "Message-ID": "<20190602152434.23996-51-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190602152434.23996-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-02_09:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v1 50/58] net/octeontx2: add Rx multi segment\n\tversion", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Nithin Dabilpuram <ndabilpuram@marvell.com>\n\nAdd multi segment version of packet Receive function.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n doc/guides/nics/features/octeontx2.ini | 2 +\n doc/guides/nics/features/octeontx2_vec.ini | 1 +\n doc/guides/nics/features/octeontx2_vf.ini | 2 +\n drivers/net/octeontx2/otx2_rx.c | 25 ++++++++++\n drivers/net/octeontx2/otx2_rx.h | 55 +++++++++++++++++++++-\n 5 files changed, 84 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini\nindex 6117e1edf..18bcf81cf 100644\n--- a/doc/guides/nics/features/octeontx2.ini\n+++ b/doc/guides/nics/features/octeontx2.ini\n@@ -24,6 +24,8 @@ Inner RSS = Y\n VLAN filter = Y\n Flow control = Y\n Flow API = Y\n+Jumbo frame = Y\n+Scattered Rx = Y\n VLAN offload = Y\n QinQ offload = Y\n Packet type parsing = Y\ndiff --git a/doc/guides/nics/features/octeontx2_vec.ini b/doc/guides/nics/features/octeontx2_vec.ini\nindex 66c327cfc..97a24671e 100644\n--- a/doc/guides/nics/features/octeontx2_vec.ini\n+++ b/doc/guides/nics/features/octeontx2_vec.ini\n@@ -24,6 +24,7 @@ Inner RSS = Y\n VLAN filter = Y\n Flow control = Y\n Flow API = Y\n+Jumbo frame = Y\n VLAN offload = Y\n QinQ offload = Y\n Packet type parsing = Y\ndiff --git a/doc/guides/nics/features/octeontx2_vf.ini b/doc/guides/nics/features/octeontx2_vf.ini\nindex 3aa0491e1..916a6d7b0 100644\n--- a/doc/guides/nics/features/octeontx2_vf.ini\n+++ b/doc/guides/nics/features/octeontx2_vf.ini\n@@ -19,6 +19,8 @@ RSS reta update = Y\n Inner RSS = Y\n VLAN filter = Y\n Flow API = Y\n+Jumbo frame = Y\n+Scattered Rx = Y\n VLAN offload = Y\n QinQ offload = Y\n Packet type parsing = Y\ndiff --git a/drivers/net/octeontx2/otx2_rx.c b/drivers/net/octeontx2/otx2_rx.c\nindex b4a3e9d55..0f0919338 100644\n--- a/drivers/net/octeontx2/otx2_rx.c\n+++ b/drivers/net/octeontx2/otx2_rx.c\n@@ -91,6 +91,14 @@ otx2_nix_recv_pkts_ ## name(void *rx_queue,\t\t\t\t \\\n {\t\t\t\t\t\t\t\t\t \\\n \treturn nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags));\t\t \\\n }\t\t\t\t\t\t\t\t\t \\\n+\t\t\t\t\t\t\t\t\t \\\n+static uint16_t __rte_noinline\t__hot\t\t\t\t\t \\\n+otx2_nix_recv_pkts_mseg_ ## name(void *rx_queue,\t\t\t \\\n+\t\t\tstruct rte_mbuf **rx_pkts, uint16_t pkts)\t \\\n+{\t\t\t\t\t\t\t\t\t \\\n+\treturn nix_recv_pkts(rx_queue, rx_pkts, pkts,\t\t\t \\\n+\t\t\t (flags) | NIX_RX_MULTI_SEG_F);\t\t \\\n+}\t\t\t\t\t\t\t\t\t \\\n \n NIX_RX_FASTPATH_MODES\n #undef R\n@@ -114,15 +122,32 @@ pick_rx_func(struct rte_eth_dev *eth_dev,\n void\n otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n {\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\n \tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2] = {\n #define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n \t[f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_ ## name,\n \n+NIX_RX_FASTPATH_MODES\n+#undef R\n+\t};\n+\n+\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t[f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_mseg_ ## name,\n+\n NIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tpick_rx_func(eth_dev, nix_eth_rx_burst);\n \n+\tif (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\n+\t\tpick_rx_func(eth_dev, nix_eth_rx_burst_mseg);\n+\n+\t/* Copy multi seg version with no offload for tear down sequence */\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n+\t\tdev->rx_pkt_burst_no_offload =\n+\t\t\tnix_eth_rx_burst_mseg[0][0][0][0][0][0];\n \trte_mb();\n }\ndiff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h\nindex fc0e87d14..1d1150786 100644\n--- a/drivers/net/octeontx2/otx2_rx.h\n+++ b/drivers/net/octeontx2/otx2_rx.h\n@@ -23,6 +23,11 @@\n #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(4)\n #define NIX_RX_OFFLOAD_TSTAMP_F BIT(5)\n \n+/* Flags to control cqe_to_mbuf conversion function.\n+ * Defining it from backwards to denote its been\n+ * not used as offload flags to pick function\n+ */\n+#define NIX_RX_MULTI_SEG_F BIT(15)\n #define NIX_TIMESYNC_RX_OFFSET\t\t8\n \n struct otx2_timesync_info {\n@@ -133,6 +138,51 @@ nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,\n \treturn ol_flags;\n }\n \n+static __rte_always_inline void\n+nix_cqe_xtract_mseg(const struct nix_rx_parse_s *rx,\n+\t\t struct rte_mbuf *mbuf, uint64_t rearm)\n+{\n+\tconst rte_iova_t *iova_list;\n+\tstruct rte_mbuf *head;\n+\tconst rte_iova_t *eol;\n+\tuint8_t nb_segs;\n+\tuint64_t sg;\n+\n+\tsg = *(const uint64_t *)(rx + 1);\n+\tnb_segs = (sg >> 48) & 0x3;\n+\tmbuf->nb_segs = nb_segs;\n+\tmbuf->data_len = sg & 0xFFFF;\n+\tsg = sg >> 16;\n+\n+\teol = ((const rte_iova_t *)(rx + 1) + ((rx->desc_sizem1 + 1) << 1));\n+\t/* Skip SG_S and first IOVA*/\n+\tiova_list = ((const rte_iova_t *)(rx + 1)) + 2;\n+\tnb_segs--;\n+\n+\trearm = rearm & ~0xFFFF;\n+\n+\thead = mbuf;\n+\twhile (nb_segs) {\n+\t\tmbuf->next = ((struct rte_mbuf *)*iova_list) - 1;\n+\t\tmbuf = mbuf->next;\n+\n+\t\t__mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);\n+\n+\t\tmbuf->data_len = sg & 0xFFFF;\n+\t\tsg = sg >> 16;\n+\t\t*(uint64_t *)(&mbuf->rearm_data) = rearm;\n+\t\tnb_segs--;\n+\t\tiova_list++;\n+\n+\t\tif (!nb_segs && (iova_list + 1 < eol)) {\n+\t\t\tsg = *(const uint64_t *)(iova_list);\n+\t\t\tnb_segs = (sg >> 48) & 0x3;\n+\t\t\thead->nb_segs += nb_segs;\n+\t\t\tiova_list = (const rte_iova_t *)(iova_list + 1);\n+\t\t}\n+\t}\n+}\n+\n static __rte_always_inline void\n otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *mbuf,\n \t\t const void *lookup_mem, const uint64_t val,\n@@ -178,7 +228,10 @@ otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *mbuf,\n \t*(uint64_t *)(&mbuf->rearm_data) = val;\n \tmbuf->pkt_len = len;\n \n-\tmbuf->data_len = len;\n+\tif (flag & NIX_RX_MULTI_SEG_F)\n+\t\tnix_cqe_xtract_mseg(rx, mbuf, val);\n+\telse\n+\t\tmbuf->data_len = len;\n }\n \n #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F\n", "prefixes": [ "v1", "50/58" ] }