Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/54090/?format=api
{ "id": 54090, "url": "http://patches.dpdk.org/api/patches/54090/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-48-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190602152434.23996-48-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190602152434.23996-48-jerinj@marvell.com", "date": "2019-06-02T15:24:23", "name": "[v1,47/58] net/octeontx2: support VLAN TPID and PVID for Tx", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "107ac4582ae272753434c70deb7861209dbad590", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-48-jerinj@marvell.com/mbox/", "series": [ { "id": 4848, "url": "http://patches.dpdk.org/api/series/4848/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4848", "date": "2019-06-02T15:23:36", "name": "OCTEON TX2 Ethdev driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4848/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54090/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54090/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 563B41BBFC;\n\tSun, 2 Jun 2019 17:27:03 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 546531BBFC\n\tfor <dev@dpdk.org>; Sun, 2 Jun 2019 17:27:02 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx52FLOCm021032; Sun, 2 Jun 2019 08:27:01 -0700", "from sc-exch03.marvell.com ([199.233.58.183])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk499j-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 02 Jun 2019 08:27:01 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 2 Jun 2019 08:27:00 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 2 Jun 2019 08:27:00 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 7A6E53F703F;\n\tSun, 2 Jun 2019 08:26:58 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=16sK1n1CdAHNzc6Q1/0q31JoM0moar82hEVaeqb1Av4=;\n\tb=YVhnng/HPGfAPXem3tGWxy8Z9MW297pl9NJ+fsgUXufTXc3aA5rq5rS/5kcyNTaq7GC7\n\tJMQxKIO+SJB26V6VISSmXziLXH/qdimFYzQmKUDNDHnzexLArecNiVjJjdBwPNv3R40Z\n\tJVrCAgBUtwQcRmnk0Q8PP0CXkxqo3iWO6T/xz5IiDDAmixYx+zATlcgAF6dQYPT+qXDv\n\tHVBvvysF3JyDvUGKXcfdOQqGrBZCLXhCAFm3RsABhlDY+A1dONP8t2SEXPco8JWuXEGf\n\tTKBYa6HCHWFwhjdS8dO7VhG2wNUODA7BoWIu2xzvsMeFrktJSkCAId9EUhDsEgChX/7t\n\tow== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>", "CC": "<ferruh.yigit@intel.com>, Vivek Sharma <viveksharma@marvell.com>", "Date": "Sun, 2 Jun 2019 20:54:23 +0530", "Message-ID": "<20190602152434.23996-48-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190602152434.23996-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-02_09:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v1 47/58] net/octeontx2: support VLAN TPID and\n\tPVID for Tx", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Vivek Sharma <viveksharma@marvell.com>\n\nImplement support for setting VLAN TPID and PVID for Tx\npackets.\n\nSigned-off-by: Vivek Sharma <viveksharma@marvell.com>\n---\n drivers/net/octeontx2/otx2_ethdev.c | 2 +\n drivers/net/octeontx2/otx2_ethdev.h | 5 +\n drivers/net/octeontx2/otx2_vlan.c | 191 ++++++++++++++++++++++++++++\n 3 files changed, 198 insertions(+)", "diff": "diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex 175e80e44..c5dcdc21c 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -1347,6 +1347,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {\n \t.vlan_offload_set = otx2_nix_vlan_offload_set,\n \t.vlan_filter_set\t = otx2_nix_vlan_filter_set,\n \t.vlan_strip_queue_set\t = otx2_nix_vlan_strip_queue_set,\n+\t.vlan_tpid_set\t\t = otx2_nix_vlan_tpid_set,\n+\t.vlan_pvid_set\t\t = otx2_nix_vlan_pvid_set,\n };\n \n static inline int\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex a3babe51a..3f11802eb 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -473,5 +473,10 @@ int otx2_nix_vlan_filter_set(struct rte_eth_dev *eth_dev, uint16_t vlan_id,\n \t\t\t int on);\n void otx2_nix_vlan_strip_queue_set(struct rte_eth_dev *dev,\n \t\t\t\t uint16_t queue, int on);\n+int\n+otx2_nix_vlan_tpid_set(struct rte_eth_dev *eth_dev,\n+\t\t enum rte_vlan_type type, uint16_t tpid);\n+int\n+otx2_nix_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);\n \n #endif /* __OTX2_ETHDEV_H__ */\ndiff --git a/drivers/net/octeontx2/otx2_vlan.c b/drivers/net/octeontx2/otx2_vlan.c\nindex 3e60da099..3c0d40553 100644\n--- a/drivers/net/octeontx2/otx2_vlan.c\n+++ b/drivers/net/octeontx2/otx2_vlan.c\n@@ -81,6 +81,37 @@ nix_set_rx_vlan_action(struct rte_eth_dev *eth_dev,\n \tentry->vtag_action = vtag_action;\n }\n \n+static void\n+nix_set_tx_vlan_action(struct mcam_entry *entry, enum rte_vlan_type type,\n+\t\t int vtag_index)\n+{\n+\tunion {\n+\t\tuint64_t reg;\n+\t\tstruct nix_tx_vtag_action_s act;\n+\t} vtag_action;\n+\n+\tuint64_t action;\n+\n+\taction = NIX_TX_ACTIONOP_UCAST_DEFAULT;\n+\n+\tif (type == ETH_VLAN_TYPE_OUTER) {\n+\t\tvtag_action.act.vtag0_def = vtag_index;\n+\t\tvtag_action.act.vtag0_lid = NPC_LID_LA;\n+\t\tvtag_action.act.vtag0_op = NIX_TX_VTAGOP_INSERT;\n+\t\tvtag_action.act.vtag0_relptr = sizeof(struct nix_inst_hdr_s) +\n+\t\t 2 * RTE_ETHER_ADDR_LEN + NIX_RX_VTAGACTION_VTAG0_RELPTR;\n+\t} else {\n+\t\tvtag_action.act.vtag1_def = vtag_index;\n+\t\tvtag_action.act.vtag1_lid = NPC_LID_LA;\n+\t\tvtag_action.act.vtag1_op = NIX_TX_VTAGOP_INSERT;\n+\t\tvtag_action.act.vtag1_relptr = sizeof(struct nix_inst_hdr_s) +\n+\t\t 2 * RTE_ETHER_ADDR_LEN + NIX_RX_VTAGACTION_VTAG1_RELPTR;\n+\t}\n+\n+\tentry->action = action;\n+\tentry->vtag_action = vtag_action.reg;\n+}\n+\n static int\n nix_vlan_mcam_free(struct otx2_eth_dev *dev, uint32_t entry)\n {\n@@ -322,6 +353,46 @@ nix_vlan_handle_default_rx_entry(struct rte_eth_dev *eth_dev, bool strip,\n \treturn 0;\n }\n \n+/* Installs/Removes default tx entry */\n+static int\n+nix_vlan_handle_default_tx_entry(struct rte_eth_dev *eth_dev,\n+\t\t\t\t enum rte_vlan_type type, int vtag_index,\n+\t\t\t\t int enable)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_vlan_info *vlan = &dev->vlan_info;\n+\tstruct mcam_entry entry;\n+\tuint16_t pf_func;\n+\tint rc;\n+\n+\tif (!vlan->def_tx_mcam_idx && enable) {\n+\t\tmemset(&entry, 0, sizeof(struct mcam_entry));\n+\n+\t\t/* Only pf_func is matched, swap it's bytes */\n+\t\tpf_func = (dev->pf_func & 0xff) << 8;\n+\t\tpf_func |= (dev->pf_func >> 8) & 0xff;\n+\n+\t\t/* PF Func extracted to KW1[63:48] */\n+\t\tentry.kw[1] = (uint64_t)pf_func << 48;\n+\t\tentry.kw_mask[1] = (BIT_ULL(16) - 1) << 48;\n+\n+\t\tnix_set_tx_vlan_action(&entry, type, vtag_index);\n+\t\tvlan->def_tx_mcam_ent = entry;\n+\n+\t\treturn nix_vlan_mcam_alloc_and_write(eth_dev, &entry,\n+\t\t\t\t\t\t NIX_INTF_TX, 0);\n+\t}\n+\n+\tif (vlan->def_tx_mcam_idx && !enable) {\n+\t\trc = nix_vlan_mcam_free(dev, vlan->def_tx_mcam_idx);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t\tvlan->def_rx_mcam_idx = 0;\n+\t}\n+\n+\treturn 0;\n+}\n+\n /* Configure vlan stripping on or off */\n static int\n nix_vlan_hw_strip(struct rte_eth_dev *eth_dev, const uint8_t enable)\n@@ -591,6 +662,126 @@ otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)\n \treturn rc;\n }\n \n+int\n+otx2_nix_vlan_tpid_set(struct rte_eth_dev *eth_dev,\n+\t\t enum rte_vlan_type type, uint16_t tpid)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct nix_set_vlan_tpid *tpid_cfg;\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tint rc;\n+\n+\ttpid_cfg = otx2_mbox_alloc_msg_nix_set_vlan_tpid(mbox);\n+\n+\ttpid_cfg->tpid = tpid;\n+\tif (type == ETH_VLAN_TYPE_OUTER)\n+\t\ttpid_cfg->vlan_type = NIX_VLAN_TYPE_OUTER;\n+\telse\n+\t\ttpid_cfg->vlan_type = NIX_VLAN_TYPE_INNER;\n+\n+\trc = otx2_mbox_process(mbox);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (type == ETH_VLAN_TYPE_OUTER)\n+\t\tdev->vlan_info.outer_vlan_tpid = tpid;\n+\telse\n+\t\tdev->vlan_info.inner_vlan_tpid = tpid;\n+\treturn 0;\n+}\n+\n+int\n+otx2_nix_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)\n+{\n+\tstruct otx2_eth_dev *otx2_dev = otx2_eth_pmd_priv(dev);\n+\tstruct otx2_mbox *mbox = otx2_dev->mbox;\n+\tstruct nix_vtag_config *vtag_cfg;\n+\tstruct nix_vtag_config_rsp *rsp;\n+\tstruct otx2_vlan_info *vlan;\n+\tint rc, rc1, vtag_index = 0;\n+\n+\tif (vlan_id == 0) {\n+\t\totx2_err(\"vlan id can't be zero\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tvlan = &otx2_dev->vlan_info;\n+\n+\tif (on && vlan->pvid_insert_on && vlan->pvid == vlan_id) {\n+\t\totx2_err(\"pvid %d is already enabled\", vlan_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (on && vlan->pvid_insert_on && vlan->pvid != vlan_id) {\n+\t\totx2_err(\"another pvid is enabled, disable that first\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* No pvid active */\n+\tif (!on && !vlan->pvid_insert_on)\n+\t\treturn 0;\n+\n+\t/* Given pvid already disabled */\n+\tif (!on && vlan->pvid != vlan_id)\n+\t\treturn 0;\n+\n+\tvtag_cfg = otx2_mbox_alloc_msg_nix_vtag_cfg(mbox);\n+\n+\tif (on) {\n+\t\tvtag_cfg->cfg_type = VTAG_TX;\n+\t\tvtag_cfg->vtag_size = NIX_VTAGSIZE_T4;\n+\n+\t\tif (vlan->outer_vlan_tpid)\n+\t\t\tvtag_cfg->tx.vtag0 =\n+\t\t\t\t(vlan->outer_vlan_tpid << 16) | vlan_id;\n+\t\telse\n+\t\t\tvtag_cfg->tx.vtag0 =\n+\t\t\t\t((RTE_ETHER_TYPE_VLAN << 16) | vlan_id);\n+\t\tvtag_cfg->tx.cfg_vtag0 = 1;\n+\t} else {\n+\t\tvtag_cfg->cfg_type = VTAG_TX;\n+\t\tvtag_cfg->vtag_size = NIX_VTAGSIZE_T4;\n+\n+\t\tvtag_cfg->tx.vtag0_idx = vlan->outer_vlan_idx;\n+\t\tvtag_cfg->tx.free_vtag0 = 1;\n+\t}\n+\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (on) {\n+\t\tvtag_index = rsp->vtag0_idx;\n+\t} else {\n+\t\tvlan->pvid = 0;\n+\t\tvlan->pvid_insert_on = 0;\n+\t\tvlan->outer_vlan_idx = 0;\n+\t}\n+\n+\trc = nix_vlan_handle_default_tx_entry(dev, ETH_VLAN_TYPE_OUTER,\n+\t\t\t\t\t vtag_index, on);\n+\tif (rc < 0) {\n+\t\tprintf(\"Default tx entry failed with rc %d\\n\", rc);\n+\t\tvtag_cfg->tx.vtag0_idx = vtag_index;\n+\t\tvtag_cfg->tx.free_vtag0 = 1;\n+\t\tvtag_cfg->tx.cfg_vtag0 = 0;\n+\n+\t\trc1 = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\t\tif (rc1)\n+\t\t\totx2_err(\"Vtag free failed\");\n+\n+\t\treturn rc;\n+\t}\n+\n+\tif (on) {\n+\t\tvlan->pvid = vlan_id;\n+\t\tvlan->pvid_insert_on = 1;\n+\t\tvlan->outer_vlan_idx = vtag_index;\n+\t}\n+\n+\treturn 0;\n+}\n+\n void otx2_nix_vlan_strip_queue_set(__rte_unused struct rte_eth_dev *dev,\n \t\t\t\t __rte_unused uint16_t queue,\n \t\t\t\t __rte_unused int on)\n", "prefixes": [ "v1", "47/58" ] }