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GET /api/patches/54089/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 54089,
    "url": "http://patches.dpdk.org/api/patches/54089/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-47-jerinj@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190602152434.23996-47-jerinj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190602152434.23996-47-jerinj@marvell.com",
    "date": "2019-06-02T15:24:22",
    "name": "[v1,46/58] net/octeontx2: support VLAN filters",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "f8235e430025615c64c4b435387a61739b0c73db",
    "submitter": {
        "id": 1188,
        "url": "http://patches.dpdk.org/api/people/1188/?format=api",
        "name": "Jerin Jacob Kollanukkaran",
        "email": "jerinj@marvell.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-47-jerinj@marvell.com/mbox/",
    "series": [
        {
            "id": 4848,
            "url": "http://patches.dpdk.org/api/series/4848/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4848",
            "date": "2019-06-02T15:23:36",
            "name": "OCTEON TX2 Ethdev driver",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/4848/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/54089/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/54089/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 003AC1BA6F;\n\tSun,  2 Jun 2019 17:27:01 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id E2B471BBF8\n\tfor <dev@dpdk.org>; Sun,  2 Jun 2019 17:26:59 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx52FK6kb020260; Sun, 2 Jun 2019 08:26:59 -0700",
            "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk499h-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 02 Jun 2019 08:26:59 -0700",
            "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 2 Jun 2019 08:26:57 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 2 Jun 2019 08:26:57 -0700",
            "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 3C2BA3F703F;\n\tSun,  2 Jun 2019 08:26:55 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=XuNX2pMqfsD0vas+fBWUzwq5MgllqS0xyAhtQ4D3jQc=;\n\tb=i23AGyCN+WEjpQ5XgsFf+kfJdoOx5kVft2B0HEw6f/XVA57DNQm9qABIsS4oqIC0Zt5E\n\tVk+lbvAr4sF1tXqS2JhON7o4lgxAbrjhsO9lbxvN8JK3Xw0wgHuOh8iSn7B/bCFtms6z\n\t31uANkYFrBPpo95M8YxYg7K/+6klMT/4CYngCaF7Lp8voP/jO8u8hZGT8M+piBVX+ivI\n\t+ou+McIP0ADFAFq91/knoL7zHbv+yRE/lCaGlr0rCaf0ESU3wARcIwymWjGmpHpgh95a\n\txbISAevzyTCVedJceTzLkGYj6CxwJyjuoBeKiEPD2r2XtA/J9qX8KfyzRUIloY+Uw61B\n\tVA== ",
        "From": "<jerinj@marvell.com>",
        "To": "<dev@dpdk.org>, John McNamara <john.mcnamara@intel.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>, Jerin Jacob <jerinj@marvell.com>, \"Nithin\n\tDabilpuram\" <ndabilpuram@marvell.com>, Kiran Kumar K\n\t<kirankumark@marvell.com>",
        "CC": "<ferruh.yigit@intel.com>, Vivek Sharma <viveksharma@marvell.com>",
        "Date": "Sun, 2 Jun 2019 20:54:22 +0530",
        "Message-ID": "<20190602152434.23996-47-jerinj@marvell.com>",
        "X-Mailer": "git-send-email 2.21.0",
        "In-Reply-To": "<20190602152434.23996-1-jerinj@marvell.com>",
        "References": "<20190602152434.23996-1-jerinj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-02_09:, , signatures=0",
        "Subject": "[dpdk-dev]  [PATCH v1 46/58] net/octeontx2: support VLAN filters",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Vivek Sharma <viveksharma@marvell.com>\n\nSupport setting up VLAN filters so as to allow tagged\npacket's reception after VLAN HW Filter offload is enabled.\n\nSigned-off-by: Vivek Sharma <viveksharma@marvell.com>\n---\n doc/guides/nics/features/octeontx2.ini     |   1 +\n doc/guides/nics/features/octeontx2_vec.ini |   1 +\n doc/guides/nics/features/octeontx2_vf.ini  |   1 +\n drivers/net/octeontx2/otx2_ethdev.c        |   2 +\n drivers/net/octeontx2/otx2_ethdev.h        |   5 +-\n drivers/net/octeontx2/otx2_vlan.c          | 147 ++++++++++++++++++++-\n 6 files changed, 154 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini\nindex f811c38e3..3567e3f63 100644\n--- a/doc/guides/nics/features/octeontx2.ini\n+++ b/doc/guides/nics/features/octeontx2.ini\n@@ -21,6 +21,7 @@ RSS hash             = Y\n RSS key update       = Y\n RSS reta update      = Y\n Inner RSS            = Y\n+VLAN filter          = Y\n Flow control         = Y\n Flow API             = Y\n VLAN offload         = Y\ndiff --git a/doc/guides/nics/features/octeontx2_vec.ini b/doc/guides/nics/features/octeontx2_vec.ini\nindex 77c3a5637..7edc80348 100644\n--- a/doc/guides/nics/features/octeontx2_vec.ini\n+++ b/doc/guides/nics/features/octeontx2_vec.ini\n@@ -21,6 +21,7 @@ RSS hash             = Y\n RSS key update       = Y\n RSS reta update      = Y\n Inner RSS            = Y\n+VLAN filter          = Y\n Flow control         = Y\n Flow API             = Y\n VLAN offload         = Y\ndiff --git a/doc/guides/nics/features/octeontx2_vf.ini b/doc/guides/nics/features/octeontx2_vf.ini\nindex 4571a1e78..fcc1ddc03 100644\n--- a/doc/guides/nics/features/octeontx2_vf.ini\n+++ b/doc/guides/nics/features/octeontx2_vf.ini\n@@ -17,6 +17,7 @@ RSS hash             = Y\n RSS key update       = Y\n RSS reta update      = Y\n Inner RSS            = Y\n+VLAN filter          = Y\n Flow API             = Y\n VLAN offload         = Y\n QinQ offload         = Y\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex 362e46941..175e80e44 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -1345,6 +1345,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {\n \t.timesync_read_time       = otx2_nix_timesync_read_time,\n \t.timesync_write_time      = otx2_nix_timesync_write_time,\n \t.vlan_offload_set         = otx2_nix_vlan_offload_set,\n+\t.vlan_filter_set\t  = otx2_nix_vlan_filter_set,\n+\t.vlan_strip_queue_set\t  = otx2_nix_vlan_strip_queue_set,\n };\n \n static inline int\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex 816371c37..a3babe51a 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -469,6 +469,9 @@ int otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en);\n int otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev);\n int otx2_nix_vlan_fini(struct rte_eth_dev *eth_dev);\n int otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask);\n-\n+int otx2_nix_vlan_filter_set(struct rte_eth_dev *eth_dev, uint16_t vlan_id,\n+\t\t\t     int on);\n+void otx2_nix_vlan_strip_queue_set(struct rte_eth_dev *dev,\n+\t\t\t\t   uint16_t queue, int on);\n \n #endif /* __OTX2_ETHDEV_H__ */\ndiff --git a/drivers/net/octeontx2/otx2_vlan.c b/drivers/net/octeontx2/otx2_vlan.c\nindex d9880d069..3e60da099 100644\n--- a/drivers/net/octeontx2/otx2_vlan.c\n+++ b/drivers/net/octeontx2/otx2_vlan.c\n@@ -21,8 +21,8 @@ enum vtag_cfg_dir {\n };\n \n static int\n-__rte_unused nix_vlan_mcam_enb_dis(struct otx2_eth_dev *dev,\n-\t\t\t\t   uint32_t entry, const int enable)\n+nix_vlan_mcam_enb_dis(struct otx2_eth_dev *dev,\n+\t\t      uint32_t entry, const int enable)\n {\n \tstruct npc_mcam_ena_dis_entry_req *req;\n \tstruct otx2_mbox *mbox = dev->mbox;\n@@ -366,6 +366,8 @@ nix_vlan_hw_filter(struct rte_eth_dev *eth_dev, const uint8_t enable,\n \t\t   uint16_t vlan_id)\n {\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_vlan_info *vlan = &dev->vlan_info;\n+\tstruct vlan_entry *entry;\n \tint rc = -EINVAL;\n \n \tif (!vlan_id && enable) {\n@@ -379,6 +381,24 @@ nix_vlan_hw_filter(struct rte_eth_dev *eth_dev, const uint8_t enable,\n \t\treturn 0;\n \t}\n \n+\t/* Enable/disable existing vlan filter entries */\n+\tTAILQ_FOREACH(entry, &vlan->fltr_tbl, next) {\n+\t\tif (vlan_id) {\n+\t\t\tif (entry->vlan_id == vlan_id) {\n+\t\t\t\trc = nix_vlan_mcam_enb_dis(dev,\n+\t\t\t\t\t\t\t   entry->mcam_idx,\n+\t\t\t\t\t\t\t   enable);\n+\t\t\t\tif (rc)\n+\t\t\t\t\treturn rc;\n+\t\t\t}\n+\t\t} else {\n+\t\t\trc = nix_vlan_mcam_enb_dis(dev, entry->mcam_idx,\n+\t\t\t\t\t\t   enable);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n \tif (!vlan_id && !enable) {\n \t\trc = nix_vlan_handle_default_rx_entry(eth_dev, false, true,\n \t\t\t\t\t\t      enable);\n@@ -393,6 +413,80 @@ nix_vlan_hw_filter(struct rte_eth_dev *eth_dev, const uint8_t enable,\n \treturn 0;\n }\n \n+/* Enable/disable vlan filtering for the given vlan_id */\n+int\n+otx2_nix_vlan_filter_set(struct rte_eth_dev *eth_dev, uint16_t vlan_id,\n+\t\t\t int on)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_vlan_info *vlan = &dev->vlan_info;\n+\tstruct vlan_entry *entry;\n+\tint entry_exists = 0;\n+\tint rc = -EINVAL;\n+\tint mcam_idx;\n+\n+\tif (!vlan_id) {\n+\t\totx2_err(\"Vlan Id can't be zero\");\n+\t\treturn rc;\n+\t}\n+\n+\tif (!vlan->def_rx_mcam_idx) {\n+\t\totx2_err(\"Vlan Filtering is disabled, enable it first\");\n+\t\treturn rc;\n+\t}\n+\n+\tif (on) {\n+\t\tTAILQ_FOREACH(entry, &vlan->fltr_tbl, next) {\n+\t\t\tif (entry->vlan_id == vlan_id) {\n+\t\t\t\t/* Vlan entry already exists */\n+\t\t\t\tentry_exists = 1;\n+\t\t\t\t/* mcam entry already allocated */\n+\t\t\t\tif (entry->mcam_idx) {\n+\t\t\t\t\trc = nix_vlan_hw_filter(eth_dev, on,\n+\t\t\t\t\t\t\t\tvlan_id);\n+\t\t\t\t\treturn rc;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (!entry_exists) {\n+\t\t\tentry = rte_zmalloc(\"otx2_nix_vlan_entry\",\n+\t\t\t\t\t    sizeof(struct vlan_entry), 0);\n+\t\t\tif (!entry) {\n+\t\t\t\totx2_err(\"Failed to allocate memory\");\n+\t\t\t\treturn -ENOMEM;\n+\t\t\t}\n+\t\t}\n+\n+\t\t/* Enables vlan_id & mac address based filtering */\n+\t\tmcam_idx = nix_vlan_mcam_config(eth_dev, vlan_id,\n+\t\t\t\t\t\tVLAN_ID_MATCH |\n+\t\t\t\t\t\tMAC_ADDR_MATCH);\n+\t\tif (mcam_idx < 0) {\n+\t\t\totx2_err(\"Failed to config vlan mcam\");\n+\t\t\tTAILQ_REMOVE(&vlan->fltr_tbl, entry, next);\n+\t\t\trte_free(entry);\n+\t\t\treturn mcam_idx;\n+\t\t}\n+\n+\t\tentry->mcam_idx = mcam_idx;\n+\t\tif (!entry_exists) {\n+\t\t\tentry->vlan_id  = vlan_id;\n+\t\t\tTAILQ_INSERT_HEAD(&vlan->fltr_tbl, entry, next);\n+\t\t}\n+\t} else {\n+\t\tTAILQ_FOREACH(entry, &vlan->fltr_tbl, next) {\n+\t\t\tif (entry->vlan_id == vlan_id) {\n+\t\t\t\tnix_vlan_mcam_free(dev, entry->mcam_idx);\n+\t\t\t\tTAILQ_REMOVE(&vlan->fltr_tbl, entry, next);\n+\t\t\t\trte_free(entry);\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n /* Configure double vlan(qinq) on or off */\n static int\n otx2_nix_config_double_vlan(struct rte_eth_dev *eth_dev,\n@@ -497,6 +591,13 @@ otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)\n \treturn rc;\n }\n \n+void otx2_nix_vlan_strip_queue_set(__rte_unused struct rte_eth_dev *dev,\n+\t\t\t\t   __rte_unused uint16_t queue,\n+\t\t\t\t   __rte_unused int on)\n+{\n+\totx2_err(\"Not Supported\");\n+}\n+\n static int\n nix_vlan_rx_mkex_offset(uint64_t mask)\n {\n@@ -549,6 +650,27 @@ nix_vlan_get_mkex_info(struct otx2_eth_dev *dev)\n \treturn 0;\n }\n \n+static void nix_vlan_reinstall_vlan_filters(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct vlan_entry *entry;\n+\tint rc;\n+\n+\t/* VLAN filters can't be set without setting filtern on */\n+\trc = nix_vlan_handle_default_rx_entry(eth_dev, false, true, true);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to reinstall vlan filters\");\n+\t\treturn;\n+\t}\n+\n+\twhile ((entry = TAILQ_FIRST(&dev->vlan_info.fltr_tbl)) != NULL) {\n+\t\trc = otx2_nix_vlan_filter_set(eth_dev, entry->vlan_id, true);\n+\t\tif (rc)\n+\t\t\totx2_err(\"Failed to reinstall filter for vlan:%d\",\n+\t\t\t\t entry->vlan_id);\n+\t}\n+}\n+\n int\n otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev)\n {\n@@ -564,6 +686,11 @@ otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev)\n \t\t}\n \n \t\tTAILQ_INIT(&dev->vlan_info.fltr_tbl);\n+\t} else {\n+\t\t/* Reinstall all mcam entries now if filter offload is set */\n+\t\tif (eth_dev->data->dev_conf.rxmode.offloads &\n+\t\t    DEV_RX_OFFLOAD_VLAN_FILTER)\n+\t\t\tnix_vlan_reinstall_vlan_filters(eth_dev);\n \t}\n \n \tmask =\n@@ -582,8 +709,24 @@ otx2_nix_vlan_fini(struct rte_eth_dev *eth_dev)\n {\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tstruct otx2_vlan_info *vlan = &dev->vlan_info;\n+\tstruct vlan_entry *entry;\n \tint rc;\n \n+\twhile ((entry = TAILQ_FIRST(&vlan->fltr_tbl)) != NULL) {\n+\t\tif (!dev->configured) {\n+\t\t\trc = nix_vlan_mcam_free(dev, entry->mcam_idx);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\t\t\tTAILQ_REMOVE(&vlan->fltr_tbl, entry, next);\n+\t\t\trte_free(entry);\n+\t\t} else {\n+\t\t\t/* MCAM entries freed by flow_fini & lf_free on\n+\t\t\t * port stop.\n+\t\t\t */\n+\t\t\tentry->mcam_idx = 0;\n+\t\t}\n+\t}\n+\n \tif (!dev->configured) {\n \t\tif (vlan->def_rx_mcam_idx) {\n \t\t\trc = nix_vlan_mcam_free(dev, vlan->def_rx_mcam_idx);\n",
    "prefixes": [
        "v1",
        "46/58"
    ]
}