Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/54055/?format=api
{ "id": 54055, "url": "http://patches.dpdk.org/api/patches/54055/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190601185355.370-45-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190601185355.370-45-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190601185355.370-45-pbhagavatula@marvell.com", "date": "2019-06-01T18:53:54", "name": "[44/44] doc: update Marvell OCTEON TX2 eventdev documentation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "547ff7397001e13cd35b4ff9020365a38dc0a1e4", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190601185355.370-45-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 4847, "url": "http://patches.dpdk.org/api/series/4847/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4847", "date": "2019-06-01T18:53:10", "name": "OCTEON TX2 event device driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4847/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54055/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54055/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4F8E71BBE1;\n\tSat, 1 Jun 2019 20:57:22 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 923B61BA0C\n\tfor <dev@dpdk.org>; Sat, 1 Jun 2019 20:56:55 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx51It7aj029946; Sat, 1 Jun 2019 11:56:55 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk12kc-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSat, 01 Jun 2019 11:56:54 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSat, 1 Jun 2019 11:56:53 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sat, 1 Jun 2019 11:56:53 -0700", "from BG-LT7430.marvell.com (unknown [10.28.17.28])\n\tby maili.marvell.com (Postfix) with ESMTP id 23D083F7040;\n\tSat, 1 Jun 2019 11:56:50 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=WaEDqVwGV9rsb/MbQEY6/yTZv6Nzv98xOhVIvlvgL74=;\n\tb=U52/dFQY3fOzOT3qE8ILmJ2LTeruzu4ELnWPLKtzwUH5B1nvmPbFCzBgxeLhn+E20UOU\n\t+EJ8DvK8kUlVOoqFzNCYA61g5wCOSJ4T7Irorj2jJeAQ+4y0ndMCwGTBtZKgID2vXU09\n\t5TmVZ3ntjGFR4TNwxl1rTLQWfT8YyQLkWmwAJPm2DnTGkc2JTuyxoEeVcuYUDdeOE16U\n\tExtxf6apCrkvLskaKAnKuMo/W97y7ZSSlgopq69vdWp6qS8YP/21XwJ48Y177SXYSQYY\n\tSDkGr8bK3NY2hPejs2M6Pc7eU1EOYOR3+u3I9XeOP/Bos8D59uyDKJe+x2T06p3FFdct\n\t9g== ", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Thomas Monjalon <thomas@monjalon.net>, \"Pavan\n\tNikhilesh\" <pbhagavatula@marvell.com>, John McNamara\n\t<john.mcnamara@intel.com>, Marko Kovacevic <marko.kovacevic@intel.com>", "CC": "<dev@dpdk.org>", "Date": "Sun, 2 Jun 2019 00:23:54 +0530", "Message-ID": "<20190601185355.370-45-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190601185355.370-1-pbhagavatula@marvell.com>", "References": "<20190601185355.370-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-01_13:, , signatures=0", "Subject": "[dpdk-dev] [PATCH 44/44] doc: update Marvell OCTEON TX2 eventdev\n\tdocumentation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nUpdate Marvell OCTEON TX2 eventdev with event timer adapter i.e. TIM\ncapabilities.\nClaim Maintainership of OCTEON TX2 eventdev.\n\nCc: John McNamara <john.mcnamara@intel.com>\nCc: Thomas Monjalon <thomas@monjalon.net>\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\n---\n MAINTAINERS | 6 ++++\n doc/guides/eventdevs/octeontx2.rst | 54 ++++++++++++++++++++++++++++++\n 2 files changed, 60 insertions(+)\n\n--\n2.21.0", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 74ac6d41f..facf36b3a 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -1042,6 +1042,12 @@ M: Peter Mccarthy <peter.mccarthy@intel.com>\n F: drivers/event/opdl/\n F: doc/guides/eventdevs/opdl.rst\n\n+Marvell OCTEON TX2\n+M: Pavan Nikhilesh <pbhagavatula@marvell.com>\n+M: Jerin Jacob <jerinj@marvell.com>\n+F: drivers/event/octeontx2/\n+F: doc/guides/eventdevs/octeontx2.rst\n+\n\n Rawdev Drivers\n --------------\ndiff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst\nindex 928251aa6..b88d9cf7a 100644\n--- a/doc/guides/eventdevs/octeontx2.rst\n+++ b/doc/guides/eventdevs/octeontx2.rst\n@@ -28,6 +28,10 @@ Features of the OCTEON TX2 SSO PMD are:\n - Open system with configurable amount of outstanding events limited only by\n DRAM\n - HW accelerated dequeue timeout support to enable power management\n+- HW managed event timers support through TIM, with high precision and\n+ time granularity of 2.5us.\n+- Up to 256 TIM rings aka event timer adapters.\n+- Up to 8 rings traversed in parallel.\n\n Prerequisites and Compilation procedure\n ---------------------------------------\n@@ -90,6 +94,54 @@ Runtime Config Options\n\n --dev \"0002:0e:00.0,selftest=1\"\n\n+- ``TIM disable NPA``\n+\n+ By default chunks are allocated from NPA then TIM can automatically free\n+ them when traversing the list of chunks. The ``tim_disable_npa`` devargs\n+ parameter disables NPA and uses software mempool to manage chunks\n+ For example::\n+\n+ --dev \"0002:0e:00.0,tim_disable_npa=1\"\n+\n+- ``TIM modify chunk slots``\n+\n+ The ``tim_chnk_slots`` devargs can be used to modify number of chunk slots.\n+ Chunks are used to store event timers, a chunk can be visualised as an array\n+ where the last element points to the next chunk and rest of them are used to\n+ store events. TIM traverses the list of chunks and enqueues the event timers\n+ to SSO. The default value is 255 and the max value is 4095.\n+ For example::\n+\n+ --dev \"0002:0e:00.0,tim_chnk_slots=1023\"\n+\n+- ``TIM enable arm/cancel statistics``\n+\n+ The ``tim_stats_ena`` devargs can be used to enable arm and cancel stats of\n+ event timer adapter.\n+ For example::\n+\n+ --dev \"0002:0e:00.0,tim_stats_ena=1\"\n+\n+- ``TIM limit max rings reserved``\n+\n+ The ``tim_rings_lmt`` devargs can be used to limit the max number of TIM\n+ rings i.e. event timer adapter reserved on probe. Since, TIM rings are HW\n+ resources we can avoid starving other applications by not grabbing all the\n+ rings.\n+ For example::\n+\n+ --dev \"0002:0e:00.0,tim_rings_lmt=5\"\n+\n+- ``TIM ring control internal parameters``\n+\n+ When using multiple TIM rings the ``tim_ring_ctl`` devargs can be used to\n+ control each TIM rings internal parameters uniquely. The following dict\n+ format is expected [ring-chnk_slots-disable_npa-stats_ena]. 0 represents\n+ default values.\n+ For Example::\n+\n+ --dev \"0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]\"\n+\n Debugging Options\n ~~~~~~~~~~~~~~~~~\n\n@@ -102,3 +154,5 @@ Debugging Options\n +===+============+=======================================================+\n | 1 | SSO | --log-level='pmd\\.event\\.octeontx2,8' |\n +---+------------+-------------------------------------------------------+\n+ | 2 | TIM | --log-level='pmd\\.event\\.octeontx2\\.timer,8' |\n+ +---+------------+-------------------------------------------------------+\n", "prefixes": [ "44/44" ] }