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GET /api/patches/54029/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 54029,
    "url": "http://patches.dpdk.org/api/patches/54029/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190601185355.370-19-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190601185355.370-19-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190601185355.370-19-pbhagavatula@marvell.com",
    "date": "2019-06-01T18:53:28",
    "name": "[18/44] event/octeontx2: add SSO dual GWS HW device operations",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "a954a7075338a64ce69053d1e33da037c6b42f43",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190601185355.370-19-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 4847,
            "url": "http://patches.dpdk.org/api/series/4847/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4847",
            "date": "2019-06-01T18:53:10",
            "name": "OCTEON TX2 event device driver",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/4847/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/54029/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/54029/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A577C1B9D9;\n\tSat,  1 Jun 2019 20:56:24 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 1436E4F91\n\tfor <dev@dpdk.org>; Sat,  1 Jun 2019 20:55:43 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx51IsiFV029446 for <dev@dpdk.org>; Sat, 1 Jun 2019 11:55:43 -0700",
            "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk12ds-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Sat, 01 Jun 2019 11:55:43 -0700",
            "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSat, 1 Jun 2019 11:55:42 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sat, 1 Jun 2019 11:55:42 -0700",
            "from BG-LT7430.marvell.com (unknown [10.28.17.28])\n\tby maili.marvell.com (Postfix) with ESMTP id F0E833F7040;\n\tSat,  1 Jun 2019 11:55:40 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=zjjqvz9tkzweROAEtVSKa4hwdRDpEalE94nHH5taNXg=;\n\tb=wxgObNhQEutipF9HYvwdMBqCgicLFNF+72XHPzsqs8FE6AT8HOhKjq4lfE1wNVdf9HEi\n\tq6s4zjt8E/b4hXqeyjqOPVMH+z3QHOJy0C3mxDKSLc34OLp1WH5fS7IK6otpUNTtb0A4\n\txXh5xvYh9bEoJGRaWXVQhvu9d2gSnNHQBSADraaC6cuHtxrsCl9qmU66iljd6dVdWr+/\n\tbiBFwYIGbDIPHXSBY6unN4qUXcldw+4wNTb10MjzrpBiA3mUSo1Ohn2ip4cYHqNg6HQk\n\teWDBGEoy/i4pKdFFW9S95PVNt0NtZ+OpPUENQdghNp6fm+s+s3x8PozQomRxx83nnqsm\n\tUg== ",
        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>",
        "CC": "<dev@dpdk.org>",
        "Date": "Sun, 2 Jun 2019 00:23:28 +0530",
        "Message-ID": "<20190601185355.370-19-pbhagavatula@marvell.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20190601185355.370-1-pbhagavatula@marvell.com>",
        "References": "<20190601185355.370-1-pbhagavatula@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-01_13:, , signatures=0",
        "Subject": "[dpdk-dev] [PATCH 18/44] event/octeontx2: add SSO dual GWS HW\n\tdevice operations",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd SSO dual workslot mode GWS HW device operations.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\n---\n drivers/event/octeontx2/Makefile           |  1 +\n drivers/event/octeontx2/meson.build        |  1 +\n drivers/event/octeontx2/otx2_worker_dual.c |  6 ++\n drivers/event/octeontx2/otx2_worker_dual.h | 76 ++++++++++++++++++++++\n 4 files changed, 84 insertions(+)\n create mode 100644 drivers/event/octeontx2/otx2_worker_dual.c\n create mode 100644 drivers/event/octeontx2/otx2_worker_dual.h",
    "diff": "diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile\nindex a3de5ca23..dfecda599 100644\n--- a/drivers/event/octeontx2/Makefile\n+++ b/drivers/event/octeontx2/Makefile\n@@ -30,6 +30,7 @@ LIBABIVER := 1\n # all source are stored in SRCS-y\n #\n \n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker_dual.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_irq.c\ndiff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build\nindex 1d2080b6d..c2a5f3e3d 100644\n--- a/drivers/event/octeontx2/meson.build\n+++ b/drivers/event/octeontx2/meson.build\n@@ -3,6 +3,7 @@\n #\n \n sources = files('otx2_worker.c',\n+\t\t'otx2_worker_dual.c',\n \t\t'otx2_evdev.c',\n \t\t'otx2_evdev_irq.c',\n \t\t)\ndiff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c\nnew file mode 100644\nindex 000000000..f762436aa\n--- /dev/null\n+++ b/drivers/event/octeontx2/otx2_worker_dual.c\n@@ -0,0 +1,6 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#include \"otx2_worker_dual.h\"\n+#include \"otx2_worker.h\"\ndiff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h\nnew file mode 100644\nindex 000000000..fe8813897\n--- /dev/null\n+++ b/drivers/event/octeontx2/otx2_worker_dual.h\n@@ -0,0 +1,76 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef __OTX2_WORKER_DUAL_H__\n+#define __OTX2_WORKER_DUAL_H__\n+\n+#include <rte_branch_prediction.h>\n+#include <rte_common.h>\n+\n+#include <otx2_common.h>\n+#include \"otx2_evdev.h\"\n+\n+/* SSO Operations */\n+static __rte_always_inline uint16_t\n+otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,\n+\t\t\t  struct otx2_ssogws_state *ws_pair,\n+\t\t\t  struct rte_event *ev)\n+{\n+\tconst uint64_t set_gw = BIT_ULL(16) | 1;\n+\tuint64_t get_work0;\n+\tuint64_t get_work1;\n+\n+#ifdef RTE_ARCH_ARM64\n+\tasm volatile(\n+\t\t\t\"        ldr %[tag], [%[tag_loc]]    \\n\"\n+\t\t\t\"        ldr %[wqp], [%[wqp_loc]]    \\n\"\n+\t\t\t\"        tbz %[tag], 63, done%=      \\n\"\n+\t\t\t\"        sevl                        \\n\"\n+\t\t\t\"rty%=:  wfe                         \\n\"\n+\t\t\t\"        ldr %[tag], [%[tag_loc]]    \\n\"\n+\t\t\t\"        ldr %[wqp], [%[wqp_loc]]    \\n\"\n+\t\t\t\"        tbnz %[tag], 63, rty%=      \\n\"\n+\t\t\t\"done%=: str %[gw], [%[pong]]        \\n\"\n+\t\t\t\"        prfm pldl1strm, [%[wqp]]    \\n\"\n+\t\t\t\"        dmb ld                      \\n\"\n+\t\t\t: [tag] \"=&r\" (get_work0), [wqp] \"=&r\" (get_work1)\n+\t\t\t: [tag_loc] \"r\" (ws->tag_op),\n+\t\t\t  [wqp_loc] \"r\" (ws->wqp_op),\n+\t\t\t  [gw] \"r\" (set_gw),\n+\t\t\t  [pong] \"r\" (ws_pair->getwrk_op)\n+\t\t\t);\n+#else\n+\tget_work0 = otx2_read64(ws->tag_op);\n+\twhile ((BIT_ULL(63)) & get_work0)\n+\t\tget_work0 = otx2_read64(ws->tag_op);\n+\tget_work1 = otx2_read64(ws->wqp_op);\n+\totx2_write64(set_gw, ws_pair->getwrk_op);\n+\n+\trte_prefetch_non_temporal((const void *)get_work1);\n+#endif\n+\n+\tws->cur_tt = (get_work0 >> 32) & 0x3;\n+\tws->cur_grp = (get_work0 >> 36) & 0x3FF;\n+\tget_work0 = (get_work0 & (0x3ull << 32)) << 6 |\n+\t\t(get_work0 & (0x3FFull << 36)) << 4 |\n+\t\t(get_work0 & 0xffffffff);\n+\n+\tev->event = get_work0;\n+\tev->u64 = get_work1;\n+\n+\treturn !!get_work1;\n+}\n+\n+static __rte_always_inline void\n+otx2_ssogws_dual_add_work(struct otx2_ssogws_dual *ws, const uint64_t event_ptr,\n+\t\t\t  const uint32_t tag, const uint8_t new_tt,\n+\t\t\t  const uint16_t grp)\n+{\n+\tuint64_t add_work0;\n+\n+\tadd_work0 = tag | ((uint64_t)(new_tt) << 32);\n+\totx2_store_pair(add_work0, event_ptr, ws->grps_base[grp]);\n+}\n+\n+#endif\n",
    "prefixes": [
        "18/44"
    ]
}