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GET /api/patches/54020/?format=api
{ "id": 54020, "url": "http://patches.dpdk.org/api/patches/54020/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190601185355.370-13-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190601185355.370-13-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190601185355.370-13-pbhagavatula@marvell.com", "date": "2019-06-01T18:53:22", "name": "[12/44] event/octeontx2: add register dump functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "2f8cb202816a588868c8c084ae579ac2c467fe0b", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190601185355.370-13-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 4847, "url": "http://patches.dpdk.org/api/series/4847/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4847", "date": "2019-06-01T18:53:10", "name": "OCTEON TX2 event device driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4847/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54020/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54020/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0A7061B9A2;\n\tSat, 1 Jun 2019 20:56:05 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 756BE4C96\n\tfor <dev@dpdk.org>; Sat, 1 Jun 2019 20:55:40 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx51ItbNM029526 for <dev@dpdk.org>; Sat, 1 Jun 2019 11:55:39 -0700", "from sc-exch03.marvell.com ([199.233.58.183])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2supqksfw5-5\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Sat, 01 Jun 2019 11:55:39 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSat, 1 Jun 2019 11:55:37 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sat, 1 Jun 2019 11:55:37 -0700", "from BG-LT7430.marvell.com (unknown [10.28.17.28])\n\tby maili.marvell.com (Postfix) with ESMTP id 287063F7138;\n\tSat, 1 Jun 2019 11:55:24 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=OgeLXz9z019VS5EhylNRNNUAxzgZyjLjo9oZmVbFdzM=;\n\tb=r9xA30YUvuJqjoM1S7X70G0/ZGgzb6ebhMHlObc4p1dlWI22lmFqIkcjFqUpC4G/bT39\n\t2RGgCAQqsHjVddKb+T+orRlG9KhcT5RaFMBCLBAScg14bzgOfOqadLiIjTRRFQ7rwCCE\n\ti34feJwJMQsgaqHnKBPcuPBf63IqO7dRGtXgrQ8qXFHIRz7+WTMCMYGGexNbvOHlP1/5\n\twynIHbBYATWX8Wlw59HHpBwfqdTyCfPMIOpfd3LamRQEXsSPFKURGTnODOUC9xovfAas\n\tIXarT3wa9R7hqqKUZ0Yd4QBQOuq5E69+Gg0Vkyh56Asz6YcmVdjycXuLD1wBdJvanXKp\n\tPA== ", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Sun, 2 Jun 2019 00:23:22 +0530", "Message-ID": "<20190601185355.370-13-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190601185355.370-1-pbhagavatula@marvell.com>", "References": "<20190601185355.370-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-01_13:, , signatures=0", "Subject": "[dpdk-dev] [PATCH 12/44] event/octeontx2: add register dump\n\tfunctions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd SSO GWS and GGRP register dump function to aid debugging.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/octeontx2/otx2_evdev.c | 68 ++++++++++++++++++++++++++++\n 1 file changed, 68 insertions(+)", "diff": "diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex c8623b502..7adde59a3 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -678,6 +678,72 @@ otx2_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,\n \treturn 0;\n }\n \n+static void\n+ssogws_dump(struct otx2_ssogws *ws, FILE *f)\n+{\n+\tuintptr_t base = OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op);\n+\n+\tfprintf(f, \"SSOW_LF_GWS Base addr 0x%\" PRIx64 \"\\n\", (uint64_t)base);\n+\tfprintf(f, \"SSOW_LF_GWS_LINKS 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSOW_LF_GWS_LINKS));\n+\tfprintf(f, \"SSOW_LF_GWS_PENDWQP 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSOW_LF_GWS_PENDWQP));\n+\tfprintf(f, \"SSOW_LF_GWS_PENDSTATE 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSOW_LF_GWS_PENDSTATE));\n+\tfprintf(f, \"SSOW_LF_GWS_NW_TIM 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSOW_LF_GWS_NW_TIM));\n+\tfprintf(f, \"SSOW_LF_GWS_TAG 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSOW_LF_GWS_TAG));\n+\tfprintf(f, \"SSOW_LF_GWS_WQP 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSOW_LF_GWS_TAG));\n+\tfprintf(f, \"SSOW_LF_GWS_SWTP 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSOW_LF_GWS_SWTP));\n+\tfprintf(f, \"SSOW_LF_GWS_PENDTAG 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSOW_LF_GWS_PENDTAG));\n+}\n+\n+static void\n+ssoggrp_dump(uintptr_t base, FILE *f)\n+{\n+\tfprintf(f, \"SSO_LF_GGRP Base addr 0x%\" PRIx64 \"\\n\", (uint64_t)base);\n+\tfprintf(f, \"SSO_LF_GGRP_QCTL 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSO_LF_GGRP_QCTL));\n+\tfprintf(f, \"SSO_LF_GGRP_XAQ_CNT 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSO_LF_GGRP_XAQ_CNT));\n+\tfprintf(f, \"SSO_LF_GGRP_INT_THR 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSO_LF_GGRP_INT_THR));\n+\tfprintf(f, \"SSO_LF_GGRP_INT_CNT 0x%\" PRIX64 \"\\n\",\n+\t\totx2_read64(base + SSO_LF_GGRP_INT_CNT));\n+\tfprintf(f, \"SSO_LF_GGRP_AQ_CNT 0x%\" PRIX64 \"\\n\",\n+\t\totx2_read64(base + SSO_LF_GGRP_AQ_CNT));\n+\tfprintf(f, \"SSO_LF_GGRP_AQ_THR 0x%\" PRIX64 \"\\n\",\n+\t\totx2_read64(base + SSO_LF_GGRP_AQ_THR));\n+\tfprintf(f, \"SSO_LF_GGRP_MISC_CNT 0x%\" PRIx64 \"\\n\",\n+\t\totx2_read64(base + SSO_LF_GGRP_MISC_CNT));\n+}\n+\n+static void\n+otx2_sso_dump(struct rte_eventdev *event_dev, FILE *f)\n+{\n+\tstruct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);\n+\tuint8_t queue;\n+\tuint8_t port;\n+\n+\t/* Dump SSOW registers */\n+\tfor (port = 0; port < dev->nb_event_ports; port++) {\n+\t\tfprintf(f, \"[%s]SSO single workslot[%d] dump\\n\",\n+\t\t\t__func__, port);\n+\t\tssogws_dump(event_dev->data->ports[port], f);\n+\t}\n+\n+\t/* Dump SSO registers */\n+\tfor (queue = 0; queue < dev->nb_event_queues; queue++) {\n+\t\tfprintf(f, \"[%s]SSO group[%d] dump\\n\", __func__, queue);\n+\t\tstruct otx2_ssogws *ws = event_dev->data->ports[0];\n+\t\tssoggrp_dump(ws->grps_base[queue], f);\n+\t}\n+}\n+\n /* Initialize and register event driver with DPDK Application */\n static struct rte_eventdev_ops otx2_sso_ops = {\n \t.dev_infos_get = otx2_sso_info_get,\n@@ -691,6 +757,8 @@ static struct rte_eventdev_ops otx2_sso_ops = {\n \t.port_link = otx2_sso_port_link,\n \t.port_unlink = otx2_sso_port_unlink,\n \t.timeout_ticks = otx2_sso_timeout_ticks,\n+\n+\t.dump = otx2_sso_dump,\n };\n \n #define OTX2_SSO_XAE_CNT\t\"xae_cnt\"\n", "prefixes": [ "12/44" ] }