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GET /api/patches/54003/?format=api
{ "id": 54003, "url": "http://patches.dpdk.org/api/patches/54003/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190601182030.8282-3-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190601182030.8282-3-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190601182030.8282-3-jerinj@marvell.com", "date": "2019-06-01T18:20:23", "name": "[v1,2/9] raw/octeontx2_dma: update probe function", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cd823d6848f53fb3ca43bd0f773971cdbc1704f5", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190601182030.8282-3-jerinj@marvell.com/mbox/", "series": [ { "id": 4846, "url": "http://patches.dpdk.org/api/series/4846/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4846", "date": "2019-06-01T18:20:21", "name": "OCTEON TX2 DMA driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4846/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54003/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54003/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E48D04F91;\n\tSat, 1 Jun 2019 20:20:27 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id E2CF31C0B\n\tfor <dev@dpdk.org>; Sat, 1 Jun 2019 20:20:26 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx51IKQiZ003606 for <dev@dpdk.org>; Sat, 1 Jun 2019 11:20:26 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk1016-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Sat, 01 Jun 2019 11:20:26 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSat, 1 Jun 2019 11:20:25 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sat, 1 Jun 2019 11:20:25 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 1CB353F703F;\n\tSat, 1 Jun 2019 11:20:23 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=Ul+Uv8k5AB9KKJQhrw1XJlPjU1ZP5Bidwpd5jt1De90=;\n\tb=WOcGPMKEMrlbSXcpATZEC6fPnZhUcGn8q3KmJMUuQLb7HhDo1Jhc1eNS9T38kRADsyEW\n\t6ThdJTvV5qW/b65/GkyMYECGA/jQf8ZwtPFsjF2S/duJ2v3M5Bt5NpnF5PIMvnHj6pNa\n\t3P6unN4i3THjPP6/ocmL2GodbExjDPz+lmeTqfaFiwV87IataVMX1QwJTi9+/J2s05mT\n\tV4X2NQBnYOj2ZSI66OFUqS2rhcWOU+ihlw1gnk5eSIL/QisoIoIvuwadfWYM+EgBwOGD\n\t1hGcQAB7TboQk2EIGeF/HKNVYJ+5amlkL8e5y9HD9XvvYn7K55ur01PyusDp/AVsSive\n\t0g== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<skoteshwar@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>", "Date": "Sat, 1 Jun 2019 23:50:23 +0530", "Message-ID": "<20190601182030.8282-3-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190601182030.8282-1-jerinj@marvell.com>", "References": "<20190601182030.8282-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-01_13:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v1 2/9] raw/octeontx2_dma: update probe function", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Satha Rao <skoteshwar@marvell.com>\n\nProbe function enhanced to allocate and initialise PMD private data.\n\nSigned-off-by: Satha Rao <skoteshwar@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\n---\n drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 25 +++++++--\n drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 59 +++++++++++++++++++++\n 2 files changed, 80 insertions(+), 4 deletions(-)\n create mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h", "diff": "diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\nindex 01422c299..f9560abcc 100644\n--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\n+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\n@@ -17,7 +17,7 @@\n #include <rte_rawdev.h>\n #include <rte_rawdev_pmd.h>\n \n-#include <otx2_mempool.h>\n+#include \"otx2_dpi_rawdev.h\"\n \n static const struct rte_pci_id pci_dma_map[] = {\n \t{\n@@ -34,11 +34,13 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\t struct rte_pci_device *pci_dev)\n {\n \tchar name[RTE_RAWDEV_NAME_MAX_LEN];\n+\tstruct dpi_vf_s *dpivf = NULL;\n \tstruct rte_rawdev *rawdev;\n+\tuint16_t vf_id;\n \n \t/* For secondary processes, the primary has done all the work */\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n-\t\treturn 0;\n+\t\treturn DPI_DMA_QUEUE_SUCCESS;\n \n \tif (pci_dev->mem_resource[0].addr == NULL) {\n \t\totx2_dpi_dbg(\"Empty bars %p %p\", pci_dev->mem_resource[0].addr,\n@@ -52,7 +54,8 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\t pci_dev->addr.function);\n \n \t/* Allocate device structure */\n-\trawdev = rte_rawdev_pmd_allocate(name, 0, rte_socket_id());\n+\trawdev = rte_rawdev_pmd_allocate(name, sizeof(struct dpi_vf_s),\n+\t\t\t\t\t rte_socket_id());\n \tif (rawdev == NULL) {\n \t\totx2_err(\"Rawdev allocation failed\");\n \t\treturn -EINVAL;\n@@ -61,7 +64,21 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \trawdev->device = &pci_dev->device;\n \trawdev->driver_name = pci_dev->driver->driver.name;\n \n-\treturn 0;\n+\tdpivf = rawdev->dev_private;\n+\tif (dpivf->state != DPI_QUEUE_STOP) {\n+\t\totx2_dpi_dbg(\"Device already started!!!\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tvf_id = ((pci_dev->addr.devid & 0x1F) << 3) |\n+\t\t (pci_dev->addr.function & 0x7);\n+\tvf_id -= 1;\n+\tdpivf->state = DPI_QUEUE_START;\n+\tdpivf->vf_id = vf_id;\n+\tdpivf->vf_bar0 = (uintptr_t)pci_dev->mem_resource[0].addr;\n+\tdpivf->vf_bar2 = (uintptr_t)pci_dev->mem_resource[2].addr;\n+\n+\treturn DPI_DMA_QUEUE_SUCCESS;\n }\n \n static int\ndiff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h\nnew file mode 100644\nindex 000000000..33fd95c33\n--- /dev/null\n+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h\n@@ -0,0 +1,59 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef _DPI_RAWDEV_H_\n+#define _DPI_RAWDEV_H_\n+\n+#include \"otx2_common.h\"\n+#include \"otx2_mempool.h\"\n+\n+#define DPI_QUEUE_OPEN\t0x1\n+#define DPI_QUEUE_CLOSE\t0x2\n+\n+/* DPI VF register offsets from VF_BAR0 */\n+#define DPI_VDMA_EN (0x0)\n+#define DPI_VDMA_REQQ_CTL (0x8)\n+#define DPI_VDMA_DBELL (0x10)\n+#define DPI_VDMA_SADDR (0x18)\n+#define DPI_VDMA_COUNTS (0x20)\n+#define DPI_VDMA_NADDR (0x28)\n+#define DPI_VDMA_IWBUSY (0x30)\n+#define DPI_VDMA_CNT (0x38)\n+#define DPI_VF_INT (0x100)\n+#define DPI_VF_INT_W1S (0x108)\n+#define DPI_VF_INT_ENA_W1C (0x110)\n+#define DPI_VF_INT_ENA_W1S (0x118)\n+\n+#define DPI_MAX_VFS 8\n+#define DPI_DMA_CMD_SIZE 64\n+#define DPI_CHUNK_SIZE\t\t1024\n+#define DPI_QUEUE_STOP\t\t0x0\n+#define DPI_QUEUE_START\t\t0x1\n+\n+struct dpi_vf_s {\n+\tstruct rte_pci_device *dev;\n+\tuint8_t state;\n+\tuint16_t vf_id;\n+\tuint8_t domain;\n+\tuintptr_t vf_bar0;\n+\tuintptr_t vf_bar2;\n+\n+\tuint16_t pool_size_m1;\n+\tuint16_t index;\n+\tuint64_t *base_ptr;\n+\tvoid *chunk_pool;\n+\tstruct otx2_mbox *mbox;\n+};\n+\n+struct dpi_rawdev_conf_s {\n+\tvoid *chunk_pool;\n+};\n+\n+enum dpi_dma_queue_result_e {\n+\tDPI_DMA_QUEUE_SUCCESS = 0,\n+\tDPI_DMA_QUEUE_NO_MEMORY = -1,\n+\tDPI_DMA_QUEUE_INVALID_PARAM = -2,\n+};\n+\n+#endif /* _DPI_RAWDEV_H_ */\n", "prefixes": [ "v1", "2/9" ] }