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GET /api/patches/53984/?format=api
{ "id": 53984, "url": "http://patches.dpdk.org/api/patches/53984/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190601014905.45531-14-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190601014905.45531-14-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190601014905.45531-14-jerinj@marvell.com", "date": "2019-06-01T01:48:51", "name": "[v2,13/27] common/octeontx2: add uplink message support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b6c068b2a580f54fdaa7eddc77036d34df560d01", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190601014905.45531-14-jerinj@marvell.com/mbox/", "series": [ { "id": 4844, "url": "http://patches.dpdk.org/api/series/4844/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4844", "date": "2019-06-01T01:48:38", "name": "OCTEON TX2 common and mempool driver", "version": 2, "mbox": "http://patches.dpdk.org/series/4844/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/53984/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/53984/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 524871B9C4;\n\tSat, 1 Jun 2019 03:49:55 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 18D0A1B945\n\tfor <dev@dpdk.org>; Sat, 1 Jun 2019 03:49:52 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx511k5Qw001009 for <dev@dpdk.org>; Fri, 31 May 2019 18:49:52 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2sufgn82x3-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Fri, 31 May 2019 18:49:52 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 31 May 2019 18:49:51 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 31 May 2019 18:49:51 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 026BE3F703F;\n\tFri, 31 May 2019 18:49:49 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=DNlNxPY4WqHOef9/1QTH6la4POOez3beNZq9YGvijgI=;\n\tb=w5dTYQDANypuVqpurwWZffry9VqibE6jlANP7ib0dI7g5LKzVVYfnEHavIMJwZh2wf/e\n\tLpzRcKn2j8qF5IcFNryhqDeE8oGiUOD4NU598QzU5afyZrtYgFkF6TfEuMeUHhjyDMsY\n\t/q52NrEhl5gcPDxSvrDmnnWfah67tCPjm4ytv9E3F8izXUYALErkRQ9w7fwNN1m6Nwd2\n\t8CS3tg0OuUMj9fjypOr2xsNFn2djrUTv328wEaWo1vA2tHrTUdiROnHgTGd9SzAd/hjT\n\t61Ny4nxNEK2IKaZH7RQJxxF41FbzwoJavklt+biGJtUnYoU40mx7CKiC/N/qVECmBCfo\n\tsg== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>", "CC": "Harman Kalra <hkalra@marvell.com>", "Date": "Sat, 1 Jun 2019 07:18:51 +0530", "Message-ID": "<20190601014905.45531-14-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190601014905.45531-1-jerinj@marvell.com>", "References": "<20190523081339.56348-1-jerinj@marvell.com>\n\t<20190601014905.45531-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-01_02:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v2 13/27] common/octeontx2: add uplink message\n\tsupport", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Nithin Dabilpuram <ndabilpuram@marvell.com>\n\nThe events like PHY link status change by AF or PHY configuration\nchange by PF would call for the uplink message.\nThe AF initiated uplink would land it in PF and PF would further\nforward to VF(if it is intended for that specific VF)\n\nThe PF initiated uplink would be distributed to all active VFs.\nThis patch adds support for the same.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/common/octeontx2/otx2_dev.c | 243 +++++++++++++++++++++++++++-\n drivers/common/octeontx2/otx2_dev.h | 11 ++\n 2 files changed, 252 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/common/octeontx2/otx2_dev.c b/drivers/common/octeontx2/otx2_dev.c\nindex fc6dca624..3522a1783 100644\n--- a/drivers/common/octeontx2/otx2_dev.c\n+++ b/drivers/common/octeontx2/otx2_dev.c\n@@ -195,6 +195,57 @@ vf_pf_process_msgs(struct otx2_dev *dev, uint16_t vf)\n \treturn i;\n }\n \n+static int\n+vf_pf_process_up_msgs(struct otx2_dev *dev, uint16_t vf)\n+{\n+\tstruct otx2_mbox *mbox = &dev->mbox_vfpf_up;\n+\tstruct otx2_mbox_dev *mdev = &mbox->dev[vf];\n+\tstruct mbox_hdr *req_hdr;\n+\tstruct mbox_msghdr *msg;\n+\tint msgs_acked = 0;\n+\tint offset;\n+\tuint16_t i;\n+\n+\treq_hdr = (struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->rx_start);\n+\tif (req_hdr->num_msgs == 0)\n+\t\treturn 0;\n+\n+\toffset = mbox->rx_start + RTE_ALIGN(sizeof(*req_hdr), MBOX_MSG_ALIGN);\n+\n+\tfor (i = 0; i < req_hdr->num_msgs; i++) {\n+\t\tmsg = (struct mbox_msghdr *)((uintptr_t)mdev->mbase + offset);\n+\n+\t\tmsgs_acked++;\n+\t\t/* RVU_PF_FUNC_S */\n+\t\tmsg->pcifunc = otx2_pfvf_func(dev->pf, vf);\n+\n+\t\tswitch (msg->id) {\n+\t\tcase MBOX_MSG_CGX_LINK_EVENT:\n+\t\t\totx2_base_dbg(\"PF: Msg 0x%x (%s) fn:0x%x (pf:%d,vf:%d)\",\n+\t\t\t\t msg->id, otx2_mbox_id2name(msg->id),\n+\t\t\t\t msg->pcifunc, otx2_get_pf(msg->pcifunc),\n+\t\t\t\t otx2_get_vf(msg->pcifunc));\n+\t\t\tbreak;\n+\t\tcase MBOX_MSG_CGX_PTP_RX_INFO:\n+\t\t\totx2_base_dbg(\"PF: Msg 0x%x (%s) fn:0x%x (pf:%d,vf:%d)\",\n+\t\t\t\t msg->id, otx2_mbox_id2name(msg->id),\n+\t\t\t\t msg->pcifunc, otx2_get_pf(msg->pcifunc),\n+\t\t\t\t otx2_get_vf(msg->pcifunc));\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\totx2_err(\"Not handled UP msg 0x%x (%s) func:0x%x\",\n+\t\t\t\t msg->id, otx2_mbox_id2name(msg->id),\n+\t\t\t\t msg->pcifunc);\n+\t\t}\n+\t\toffset = mbox->rx_start + msg->next_msgoff;\n+\t}\n+\totx2_mbox_reset(mbox, vf);\n+\tmdev->msgs_acked = msgs_acked;\n+\trte_wmb();\n+\n+\treturn i;\n+}\n+\n static void\n otx2_vf_pf_mbox_handle_msg(void *param)\n {\n@@ -209,6 +260,8 @@ otx2_vf_pf_mbox_handle_msg(void *param)\n \t\t\totx2_base_dbg(\"Process vf:%d request (pf:%d, vf:%d)\",\n \t\t\t\t vf, dev->pf, dev->vf);\n \t\t\tvf_pf_process_msgs(dev, vf);\n+\t\t\t/* UP messages */\n+\t\t\tvf_pf_process_up_msgs(dev, vf);\n \t\t\tdev->intr.bits[vf/max_bits] &= ~(BIT_ULL(vf%max_bits));\n \t\t}\n \t}\n@@ -291,6 +344,185 @@ otx2_process_msgs(struct otx2_dev *dev, struct otx2_mbox *mbox)\n \trte_wmb();\n }\n \n+/* Copies the message received from AF and sends it to VF */\n+static void\n+pf_vf_mbox_send_up_msg(struct otx2_dev *dev, void *rec_msg)\n+{\n+\tuint16_t max_bits = sizeof(dev->active_vfs[0]) * sizeof(uint64_t);\n+\tstruct otx2_mbox *vf_mbox = &dev->mbox_vfpf_up;\n+\tstruct msg_req *msg = rec_msg;\n+\tstruct mbox_msghdr *vf_msg;\n+\tuint16_t vf;\n+\tsize_t size;\n+\n+\tsize = RTE_ALIGN(otx2_mbox_id2size(msg->hdr.id), MBOX_MSG_ALIGN);\n+\t/* Send UP message to all VF's */\n+\tfor (vf = 0; vf < vf_mbox->ndevs; vf++) {\n+\t\t/* VF active */\n+\t\tif (!(dev->active_vfs[vf / max_bits] & (BIT_ULL(vf))))\n+\t\t\tcontinue;\n+\n+\t\totx2_base_dbg(\"(%s) size: %zx to VF: %d\",\n+\t\t\t otx2_mbox_id2name(msg->hdr.id), size, vf);\n+\n+\t\t/* Reserve PF/VF mbox message */\n+\t\tvf_msg = otx2_mbox_alloc_msg(vf_mbox, vf, size);\n+\t\tif (!vf_msg) {\n+\t\t\totx2_err(\"Failed to alloc VF%d UP message\", vf);\n+\t\t\tcontinue;\n+\t\t}\n+\t\totx2_mbox_req_init(msg->hdr.id, vf_msg);\n+\n+\t\t/*\n+\t\t * Copy message from AF<->PF UP mbox\n+\t\t * to PF<->VF UP mbox\n+\t\t */\n+\t\totx2_mbox_memcpy((uint8_t *)vf_msg +\n+\t\t\t\t sizeof(struct mbox_msghdr), (uint8_t *)msg\n+\t\t\t\t + sizeof(struct mbox_msghdr), size -\n+\t\t\t\t sizeof(struct mbox_msghdr));\n+\n+\t\tvf_msg->rc = msg->hdr.rc;\n+\t\t/* Set PF to be a sender */\n+\t\tvf_msg->pcifunc = dev->pf_func;\n+\n+\t\t/* Send to VF */\n+\t\totx2_mbox_msg_send(vf_mbox, vf);\n+\t}\n+}\n+\n+static int\n+otx2_mbox_up_handler_cgx_link_event(struct otx2_dev *dev,\n+\t\t\t\t struct cgx_link_info_msg *msg,\n+\t\t\t\t struct msg_rsp *rsp)\n+{\n+\tstruct cgx_link_user_info *linfo = &msg->link_info;\n+\n+\totx2_base_dbg(\"pf:%d/vf:%d NIC Link %s --> 0x%x (%s) from: pf:%d/vf:%d\",\n+\t\t otx2_get_pf(dev->pf_func), otx2_get_vf(dev->pf_func),\n+\t\t linfo->link_up ? \"UP\" : \"DOWN\", msg->hdr.id,\n+\t\t otx2_mbox_id2name(msg->hdr.id),\n+\t\t otx2_get_pf(msg->hdr.pcifunc),\n+\t\t otx2_get_vf(msg->hdr.pcifunc));\n+\n+\t/* PF gets link notification from AF */\n+\tif (otx2_get_pf(msg->hdr.pcifunc) == 0) {\n+\t\tif (dev->ops && dev->ops->link_status_update)\n+\t\t\tdev->ops->link_status_update(dev, linfo);\n+\n+\t\t/* Forward the same message as received from AF to VF */\n+\t\tpf_vf_mbox_send_up_msg(dev, msg);\n+\t} else {\n+\t\t/* VF gets link up notification */\n+\t\tif (dev->ops && dev->ops->link_status_update)\n+\t\t\tdev->ops->link_status_update(dev, linfo);\n+\t}\n+\n+\trsp->hdr.rc = 0;\n+\treturn 0;\n+}\n+\n+static int\n+otx2_mbox_up_handler_cgx_ptp_rx_info(struct otx2_dev *dev,\n+\t\t\t\t struct cgx_ptp_rx_info_msg *msg,\n+\t\t\t\t struct msg_rsp *rsp)\n+{\n+\totx2_nix_dbg(\"pf:%d/vf:%d PTP mode %s --> 0x%x (%s) from: pf:%d/vf:%d\",\n+\t\t otx2_get_pf(dev->pf_func),\n+\t\t otx2_get_vf(dev->pf_func),\n+\t\t msg->ptp_en ? \"ENABLED\" : \"DISABLED\",\n+\t\t msg->hdr.id, otx2_mbox_id2name(msg->hdr.id),\n+\t\t otx2_get_pf(msg->hdr.pcifunc),\n+\t\t otx2_get_vf(msg->hdr.pcifunc));\n+\n+\t/* PF gets PTP notification from AF */\n+\tif (otx2_get_pf(msg->hdr.pcifunc) == 0) {\n+\t\tif (dev->ops && dev->ops->ptp_info_update)\n+\t\t\tdev->ops->ptp_info_update(dev, msg->ptp_en);\n+\n+\t\t/* Forward the same message as received from AF to VF */\n+\t\tpf_vf_mbox_send_up_msg(dev, msg);\n+\t} else {\n+\t\t/* VF gets PTP notification */\n+\t\tif (dev->ops && dev->ops->ptp_info_update)\n+\t\t\tdev->ops->ptp_info_update(dev, msg->ptp_en);\n+\t}\n+\n+\trsp->hdr.rc = 0;\n+\treturn 0;\n+}\n+\n+static int\n+mbox_process_msgs_up(struct otx2_dev *dev, struct mbox_msghdr *req)\n+{\n+\t/* Check if valid, if not reply with a invalid msg */\n+\tif (req->sig != OTX2_MBOX_REQ_SIG)\n+\t\treturn -EIO;\n+\n+\tswitch (req->id) {\n+#define M(_name, _id, _fn_name, _req_type, _rsp_type)\t\t\\\n+\tcase _id: {\t\t\t\t\t\t\\\n+\t\tstruct _rsp_type *rsp;\t\t\t\t\\\n+\t\tint err;\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\\\n+\t\trsp = (struct _rsp_type *)otx2_mbox_alloc_msg(\t\\\n+\t\t\t&dev->mbox_up, 0,\t\t\t\\\n+\t\t\tsizeof(struct _rsp_type));\t\t\\\n+\t\tif (!rsp)\t\t\t\t\t\\\n+\t\t\treturn -ENOMEM;\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\\\n+\t\trsp->hdr.id = _id;\t\t\t\t\\\n+\t\trsp->hdr.sig = OTX2_MBOX_RSP_SIG;\t\t\\\n+\t\trsp->hdr.pcifunc = dev->pf_func;\t\t\\\n+\t\trsp->hdr.rc = 0;\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\\\n+\t\terr = otx2_mbox_up_handler_ ## _fn_name(\t\\\n+\t\t\tdev, (struct _req_type *)req, rsp);\t\\\n+\t\treturn err;\t\t\t\t\t\\\n+\t}\n+MBOX_UP_CGX_MESSAGES\n+#undef M\n+\n+\tdefault :\n+\t\totx2_reply_invalid_msg(&dev->mbox_up, 0, 0, req->id);\n+\t}\n+\n+\treturn -ENODEV;\n+}\n+\n+static void\n+otx2_process_msgs_up(struct otx2_dev *dev, struct otx2_mbox *mbox)\n+{\n+\tstruct otx2_mbox_dev *mdev = &mbox->dev[0];\n+\tstruct mbox_hdr *req_hdr;\n+\tstruct mbox_msghdr *msg;\n+\tint i, err, offset;\n+\n+\treq_hdr = (struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->rx_start);\n+\tif (req_hdr->num_msgs == 0)\n+\t\treturn;\n+\n+\toffset = mbox->rx_start + RTE_ALIGN(sizeof(*req_hdr), MBOX_MSG_ALIGN);\n+\tfor (i = 0; i < req_hdr->num_msgs; i++) {\n+\t\tmsg = (struct mbox_msghdr *)((uintptr_t)mdev->mbase + offset);\n+\n+\t\totx2_base_dbg(\"Message 0x%x (%s) pf:%d/vf:%d\",\n+\t\t\t\tmsg->id, otx2_mbox_id2name(msg->id),\n+\t\t\t\totx2_get_pf(msg->pcifunc),\n+\t\t\t\totx2_get_vf(msg->pcifunc));\n+\t\terr = mbox_process_msgs_up(dev, msg);\n+\t\tif (err)\n+\t\t\totx2_err(\"Error %d handling 0x%x (%s)\",\n+\t\t\t\t err, msg->id, otx2_mbox_id2name(msg->id));\n+\t\toffset = mbox->rx_start + msg->next_msgoff;\n+\t}\n+\t/* Send mbox responses */\n+\tif (mdev->num_msgs) {\n+\t\totx2_base_dbg(\"Reply num_msgs:%d\", mdev->num_msgs);\n+\t\totx2_mbox_msg_send(mbox, 0);\n+\t}\n+}\n+\n static void\n otx2_pf_vf_mbox_irq(void *param)\n {\n@@ -303,10 +535,13 @@ otx2_pf_vf_mbox_irq(void *param)\n \n \totx2_write64(intr, dev->bar2 + RVU_VF_INT);\n \totx2_base_dbg(\"Irq 0x%\" PRIx64 \"(pf:%d,vf:%d)\", intr, dev->pf, dev->vf);\n-\tif (intr)\n+\tif (intr) {\n \t\t/* First process all configuration messages */\n \t\totx2_process_msgs(dev, dev->mbox);\n \n+\t\t/* Process Uplink messages */\n+\t\totx2_process_msgs_up(dev, &dev->mbox_up);\n+\t}\n }\n \n static void\n@@ -322,9 +557,13 @@ otx2_af_pf_mbox_irq(void *param)\n \totx2_write64(intr, dev->bar2 + RVU_PF_INT);\n \n \totx2_base_dbg(\"Irq 0x%\" PRIx64 \"(pf:%d,vf:%d)\", intr, dev->pf, dev->vf);\n-\tif (intr)\n+\tif (intr) {\n \t\t/* First process all configuration messages */\n \t\totx2_process_msgs(dev, dev->mbox);\n+\n+\t\t/* Process Uplink messages */\n+\t\totx2_process_msgs_up(dev, &dev->mbox_up);\n+\t}\n }\n \n static int\ndiff --git a/drivers/common/octeontx2/otx2_dev.h b/drivers/common/octeontx2/otx2_dev.h\nindex 70104dfa2..8fa5f32d2 100644\n--- a/drivers/common/octeontx2/otx2_dev.h\n+++ b/drivers/common/octeontx2/otx2_dev.h\n@@ -23,6 +23,17 @@\n \n struct otx2_dev;\n \n+/* Link status callback */\n+typedef void (*otx2_link_status_t)(struct otx2_dev *dev,\n+\t\t\t\t struct cgx_link_user_info *link);\n+/* PTP info callback */\n+typedef int (*otx2_ptp_info_t)(struct otx2_dev *dev, bool ptp_en);\n+\n+struct otx2_dev_ops {\n+\totx2_link_status_t link_status_update;\n+\totx2_ptp_info_t ptp_info_update;\n+};\n+\n #define OTX2_DEV\t\t\t\t\t\\\n \tint node __rte_cache_aligned;\t\t\t\\\n \tuint16_t pf;\t\t\t\t\t\\\n", "prefixes": [ "v2", "13/27" ] }