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GET /api/patches/53683/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 53683,
    "url": "http://patches.dpdk.org/api/patches/53683/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190524144935.18765-4-lance.richardson@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190524144935.18765-4-lance.richardson@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190524144935.18765-4-lance.richardson@broadcom.com",
    "date": "2019-05-24T14:49:28",
    "name": "[v2,03/10] net/bnxt: implement vector mode driver",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "3a5c872a519b5dbb39ea65c01fcad9239b52d970",
    "submitter": {
        "id": 1323,
        "url": "http://patches.dpdk.org/api/people/1323/?format=api",
        "name": "Lance Richardson",
        "email": "lance.richardson@broadcom.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190524144935.18765-4-lance.richardson@broadcom.com/mbox/",
    "series": [
        {
            "id": 4767,
            "url": "http://patches.dpdk.org/api/series/4767/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4767",
            "date": "2019-05-24T14:49:25",
            "name": "bnxt patchset",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/4767/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/53683/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/53683/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 756671B952;\n\tFri, 24 May 2019 16:50:13 +0200 (CEST)",
            "from mail-pl1-f196.google.com (mail-pl1-f196.google.com\n\t[209.85.214.196]) by dpdk.org (Postfix) with ESMTP id 33C4F1B94A\n\tfor <dev@dpdk.org>; Fri, 24 May 2019 16:50:08 +0200 (CEST)",
            "by mail-pl1-f196.google.com with SMTP id go2so4263348plb.9\n\tfor <dev@dpdk.org>; Fri, 24 May 2019 07:50:08 -0700 (PDT)",
            "from localhost.localdomain ([192.19.231.250])\n\tby smtp.gmail.com with ESMTPSA id\n\tx23sm2723705pfn.160.2019.05.24.07.50.05\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 24 May 2019 07:50:06 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com;\n\ts=google; \n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=mf8ZqgGSaJrvR5kM+RQIH3+416cdgBn5U9X4jCF4m60=;\n\tb=MX3cSoX2DG5/sEPT6uQdNPLN2Cw8Cwr0d8iR7fIn37opWHlv/T2oKy6outuoarM1dQ\n\tjIpK132yNaqQ91am2yGdY/E+ilrr9CtTXlsmcR0Ww6zuYrz7gGj8JzC90vvIZbyzzJOI\n\tl8yN0nqq4dJoy3TSw8YjcxFWoe81ien6ypCJk=",
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=mf8ZqgGSaJrvR5kM+RQIH3+416cdgBn5U9X4jCF4m60=;\n\tb=PlvO2UNROA7Q8GYZ1ajDHoyCmpc0+iWZ+S4FRz0Nv00dVFac9d5h6qkY3PibcoeGJy\n\t+bpGzWJkWs5v2O/Dl0SV2SS+Glf7Ba9ZQ64mTg4ecGIDUVc/zFnBCBiwI3PWZUtYXyHD\n\tWIou/7zCk3CxhyEibZ3dKMz+SDerIiBEM/2FBBIfy/6pciL4sVFgMTZmgw6LPwHBVol0\n\tTJOjbK72hvgkIjuTbEo7dIYRYQ4ajAey3WGUQ6wkUBP7vwArq4gHDZc5ECDetDXX7H4m\n\t+jI7l2uWsBQcJnO2y/60/3CXZhDgJJ6APKit80N823phaTuMHBQ+ejHxDAXMbM7p94V8\n\t8j9Q==",
        "X-Gm-Message-State": "APjAAAVTMJbGklBAHk0NZHT17TyUOSa8tda/QXSpYtECsb2T1mxQkhNi\n\tbOR8dVTqg1qHWe+7URYGy13Z87GLCyQ21O6cVPyNHGraD8FlAzmlcFxhKkiXriYpbOr3FsqTNDa\n\tejuYYxpMiwgfJ00AJway2Vzo59xvgIsQ6A9Ymtg2NrjIq8d/643nHKDNPr67BVvvm",
        "X-Google-Smtp-Source": "APXvYqxHUACKHO48ip0fG2arpb90oQykepBYT/CsjojOhTNMEANK8UqJoZQmx1Xiq9ET4/oyu2cwfg==",
        "X-Received": "by 2002:a17:902:8609:: with SMTP id\n\tf9mr48546075plo.252.1558709406872; \n\tFri, 24 May 2019 07:50:06 -0700 (PDT)",
        "From": "Lance Richardson <lance.richardson@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "ajit.khaparde@broadcom.com, ferruh.yigit@intel.com,\n\tmaxime.coquelin@redhat.com,\n\tLance Richardson <lance.richardson@broadcom.com>",
        "Date": "Fri, 24 May 2019 10:49:28 -0400",
        "Message-Id": "<20190524144935.18765-4-lance.richardson@broadcom.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20190524144935.18765-1-lance.richardson@broadcom.com>",
        "References": "<20190521213953.25425-1-ajit.khaparde@broadcom.com>\n\t<20190524144935.18765-1-lance.richardson@broadcom.com>",
        "Subject": "[dpdk-dev] [PATCH v2 03/10] net/bnxt: implement vector mode driver",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Introduce vector mode support for the bnxt pmd.\n\nSigned-off-by: Lance Richardson <lance.richardson@broadcom.com>\nSigned-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\nv2:\n* Squashed with v1 patch 4 (\"fix double counting VLAN tags\").\n* Dropped two unnecessary coding style changes from bnxt_txr.h.\n\n config/common_base                   |   1 +\n drivers/net/bnxt/Makefile            |   1 +\n drivers/net/bnxt/bnxt_ethdev.c       |  95 +++++-\n drivers/net/bnxt/bnxt_ring.h         |   3 +-\n drivers/net/bnxt/bnxt_rxq.c          |   5 +\n drivers/net/bnxt/bnxt_rxq.h          |   4 +\n drivers/net/bnxt/bnxt_rxr.h          |   9 +-\n drivers/net/bnxt/bnxt_rxtx_vec_sse.c | 481 +++++++++++++++++++++++++++\n drivers/net/bnxt/bnxt_txr.h          |   5 +\n drivers/net/bnxt/meson.build         |   5 +\n 10 files changed, 600 insertions(+), 9 deletions(-)\n create mode 100644 drivers/net/bnxt/bnxt_rxtx_vec_sse.c",
    "diff": "diff --git a/config/common_base b/config/common_base\nindex 6b96e0e80..1bbb7c10b 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -212,6 +212,7 @@ CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n\n # Compile burst-oriented Broadcom BNXT PMD driver\n #\n CONFIG_RTE_LIBRTE_BNXT_PMD=y\n+CONFIG_RTE_LIBRTE_BNXT_INC_VECTOR=n\n \n #\n # Compile burst-oriented Chelsio Terminator (CXGBE) PMD\ndiff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile\nindex 8be3cb0e4..9e006b5d1 100644\n--- a/drivers/net/bnxt/Makefile\n+++ b/drivers/net/bnxt/Makefile\n@@ -41,6 +41,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_vnic.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_irq.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_util.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += rte_pmd_bnxt.c\n+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_INC_VECTOR) += bnxt_rxtx_vec_sse.c\n \n #\n # Export include files\ndiff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c\nindex e0e0b72c6..52a6b94e0 100644\n--- a/drivers/net/bnxt/bnxt_ethdev.c\n+++ b/drivers/net/bnxt/bnxt_ethdev.c\n@@ -638,13 +638,73 @@ static int bnxt_scattered_rx(struct rte_eth_dev *eth_dev)\n \n \t\tbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -\n \t\t\t\t      RTE_PKTMBUF_HEADROOM);\n-\t\tif (eth_dev->data->dev_conf.rxmode.max_rx_pkt_len +\n-\t\t    VLAN_TAG_SIZE * BNXT_NUM_VLANS > buf_size)\n+\t\tif (eth_dev->data->dev_conf.rxmode.max_rx_pkt_len > buf_size)\n \t\t\treturn 1;\n \t}\n \treturn 0;\n }\n \n+static eth_rx_burst_t\n+bnxt_receive_function(__rte_unused struct rte_eth_dev *eth_dev)\n+{\n+#ifdef RTE_LIBRTE_BNXT_INC_VECTOR\n+\t/*\n+\t * Vector mode receive can be enabled only if scatter rx is not\n+\t * in use and rx offloads are limited to VLAN stripping and\n+\t * CRC stripping.\n+\t */\n+\tif (!eth_dev->data->scattered_rx &&\n+\t    !(eth_dev->data->dev_conf.rxmode.offloads &\n+\t      ~(DEV_RX_OFFLOAD_VLAN_STRIP |\n+\t\tDEV_RX_OFFLOAD_KEEP_CRC |\n+\t\tDEV_RX_OFFLOAD_JUMBO_FRAME |\n+\t\tDEV_RX_OFFLOAD_IPV4_CKSUM |\n+\t\tDEV_RX_OFFLOAD_UDP_CKSUM |\n+\t\tDEV_RX_OFFLOAD_TCP_CKSUM |\n+\t\tDEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |\n+\t\tDEV_RX_OFFLOAD_VLAN_FILTER))) {\n+\t\tPMD_DRV_LOG(INFO, \"Using vector mode receive for port %d\\n\",\n+\t\t\t    eth_dev->data->port_id);\n+\t\treturn bnxt_recv_pkts_vec;\n+\t}\n+\tPMD_DRV_LOG(INFO, \"Vector mode receive disabled for port %d\\n\",\n+\t\t    eth_dev->data->port_id);\n+\tPMD_DRV_LOG(INFO,\n+\t\t    \"Port %d scatter: %d rx offload: %\" PRIX64 \"\\n\",\n+\t\t    eth_dev->data->port_id,\n+\t\t    eth_dev->data->scattered_rx,\n+\t\t    eth_dev->data->dev_conf.rxmode.offloads);\n+#endif\n+\treturn bnxt_recv_pkts;\n+}\n+\n+static eth_tx_burst_t\n+bnxt_transmit_function(__rte_unused struct rte_eth_dev *eth_dev)\n+{\n+#ifdef RTE_LIBRTE_BNXT_INC_VECTOR\n+\t/*\n+\t * Vector mode receive can be enabled only if scatter tx is not\n+\t * in use and tx offloads other than VLAN insertion are not\n+\t * in use.\n+\t */\n+\tif (!eth_dev->data->scattered_rx &&\n+\t    !(eth_dev->data->dev_conf.txmode.offloads &\n+\t      ~DEV_TX_OFFLOAD_VLAN_INSERT)) {\n+\t\tPMD_DRV_LOG(INFO, \"Using vector mode transmit for port %d\\n\",\n+\t\t\t    eth_dev->data->port_id);\n+\t\treturn bnxt_xmit_pkts_vec;\n+\t}\n+\tPMD_DRV_LOG(INFO, \"Vector mode transmit disabled for port %d\\n\",\n+\t\t    eth_dev->data->port_id);\n+\tPMD_DRV_LOG(INFO,\n+\t\t    \"Port %d scatter: %d tx offload: %\" PRIX64 \"\\n\",\n+\t\t    eth_dev->data->port_id,\n+\t\t    eth_dev->data->scattered_rx,\n+\t\t    eth_dev->data->dev_conf.txmode.offloads);\n+#endif\n+\treturn bnxt_xmit_pkts;\n+}\n+\n static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)\n {\n \tstruct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;\n@@ -675,6 +735,8 @@ static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)\n \tif (rc)\n \t\tgoto error;\n \n+\teth_dev->rx_pkt_burst = bnxt_receive_function(eth_dev);\n+\teth_dev->tx_pkt_burst = bnxt_transmit_function(eth_dev);\n \tbp->flags |= BNXT_FLAG_INIT_DONE;\n \treturn 0;\n \n@@ -1597,6 +1659,8 @@ bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,\n \n static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)\n {\n+\tuint32_t new_pkt_size = new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN +\n+\t\t\t\tVLAN_TAG_SIZE * BNXT_NUM_VLANS;\n \tstruct bnxt *bp = eth_dev->data->dev_private;\n \tstruct rte_eth_dev_info dev_info;\n \tuint32_t rc = 0;\n@@ -1610,6 +1674,23 @@ static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)\n \t\treturn -EINVAL;\n \t}\n \n+#ifdef RTE_LIBRTE_BNXT_INC_VECTOR\n+\t/*\n+\t * If vector-mode tx/rx is active, disallow any MTU change that would\n+\t * require scattered receive support.\n+\t */\n+\tif (eth_dev->data->dev_started &&\n+\t    (eth_dev->rx_pkt_burst == bnxt_recv_pkts_vec ||\n+\t     eth_dev->tx_pkt_burst == bnxt_xmit_pkts_vec) &&\n+\t    (new_pkt_size >\n+\t     eth_dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t    \"MTU change would require scattered rx support. \");\n+\t\tPMD_DRV_LOG(ERR, \"Stop port before changing MTU.\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+#endif\n+\n \tif (new_mtu > ETHER_MTU) {\n \t\tbp->flags |= BNXT_FLAG_JUMBO;\n \t\tbp->eth_dev->data->dev_conf.rxmode.offloads |=\n@@ -1620,8 +1701,7 @@ static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)\n \t\tbp->flags &= ~BNXT_FLAG_JUMBO;\n \t}\n \n-\teth_dev->data->dev_conf.rxmode.max_rx_pkt_len =\n-\t\tnew_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;\n+\teth_dev->data->dev_conf.rxmode.max_rx_pkt_len = new_pkt_size;\n \n \teth_dev->data->mtu = new_mtu;\n \tPMD_DRV_LOG(INFO, \"New MTU is %d\\n\", eth_dev->data->mtu);\n@@ -2655,9 +2735,10 @@ bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)\n \t\tRTE_PTYPE_UNKNOWN\n \t};\n \n-\tif (dev->rx_pkt_burst == bnxt_recv_pkts)\n-\t\treturn ptypes;\n-\treturn NULL;\n+\tif (!dev->rx_pkt_burst)\n+\t\treturn NULL;\n+\n+\treturn ptypes;\n }\n \n static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,\ndiff --git a/drivers/net/bnxt/bnxt_ring.h b/drivers/net/bnxt/bnxt_ring.h\nindex 1446d784f..fd3d0bd73 100644\n--- a/drivers/net/bnxt/bnxt_ring.h\n+++ b/drivers/net/bnxt/bnxt_ring.h\n@@ -10,7 +10,8 @@\n \n #include <rte_memory.h>\n \n-#define RING_NEXT(ring, idx)\t\t(((idx) + 1) & (ring)->ring_mask)\n+#define RING_ADV(ring, idx, n)\t\t(((idx) + (n)) & (ring)->ring_mask)\n+#define RING_NEXT(ring, idx)\t\tRING_ADV(ring, idx, 1)\n \n #define DB_IDX_MASK\t\t\t\t\t\t0xffffff\n #define DB_IDX_VALID\t\t\t\t\t\t(0x1 << 26)\ndiff --git a/drivers/net/bnxt/bnxt_rxq.c b/drivers/net/bnxt/bnxt_rxq.c\nindex 17e2909a7..ff219f4b8 100644\n--- a/drivers/net/bnxt/bnxt_rxq.c\n+++ b/drivers/net/bnxt/bnxt_rxq.c\n@@ -355,6 +355,11 @@ int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,\n \t\t\t\t\t\tRTE_ETH_QUEUE_STATE_STARTED;\n \teth_dev->data->rx_queue_state[queue_idx] = queue_state;\n \trte_spinlock_init(&rxq->lock);\n+\n+#ifdef RTE_LIBRTE_BNXT_INC_VECTOR\n+\tbnxt_rxq_vec_setup(rxq);\n+#endif\n+\n out:\n \treturn rc;\n }\ndiff --git a/drivers/net/bnxt/bnxt_rxq.h b/drivers/net/bnxt/bnxt_rxq.h\nindex e5d6001d3..057a59e2c 100644\n--- a/drivers/net/bnxt/bnxt_rxq.h\n+++ b/drivers/net/bnxt/bnxt_rxq.h\n@@ -22,6 +22,10 @@ struct bnxt_rx_queue {\n \tuint16_t\t\tnb_rx_hold; /* num held free RX desc */\n \tuint16_t\t\trx_free_thresh; /* max free RX desc to hold */\n \tuint16_t\t\tqueue_id; /* RX queue index */\n+#ifdef RTE_LIBRTE_BNXT_INC_VECTOR\n+\tuint16_t\t\trxrearm_nb; /* number of descs to reinit. */\n+\tuint16_t\t\trxrearm_start; /* next desc index to reinit. */\n+#endif\n \tuint16_t\t\treg_idx; /* RX queue register index */\n \tuint16_t\t\tport_id; /* Device port identifier */\n \tuint8_t\t\t\tcrc_len; /* 0 if CRC stripped, 4 otherwise */\ndiff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h\nindex 3815a2199..cf1c7e5cf 100644\n--- a/drivers/net/bnxt/bnxt_rxr.h\n+++ b/drivers/net/bnxt/bnxt_rxr.h\n@@ -7,7 +7,7 @@\n #define _BNXT_RXR_H_\n \n #define B_RX_DB(db, prod)\t\t\t\t\t\t\\\n-\t\t(*(uint32_t *)db = (DB_KEY_RX | prod))\n+\t\t(*(uint32_t *)db = (DB_KEY_RX | (prod)))\n \n #define BNXT_TPA_L4_SIZE(x)\t\\\n \t{ \\\n@@ -110,4 +110,11 @@ int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id);\n int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq);\n int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n+\n+#ifdef RTE_LIBRTE_BNXT_INC_VECTOR\n+uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t    uint16_t nb_pkts);\n+int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);\n+#endif\n+\n #endif\ndiff --git a/drivers/net/bnxt/bnxt_rxtx_vec_sse.c b/drivers/net/bnxt/bnxt_rxtx_vec_sse.c\nnew file mode 100644\nindex 000000000..1c32c986c\n--- /dev/null\n+++ b/drivers/net/bnxt/bnxt_rxtx_vec_sse.c\n@@ -0,0 +1,481 @@\n+// SPDX-License-Identifier: BSD-3-Clause\n+/* Copyright(c) 2019 Broadcom All rights reserved. */\n+\n+#include <inttypes.h>\n+#include <stdbool.h>\n+\n+#include <rte_bitmap.h>\n+#include <rte_byteorder.h>\n+#include <rte_malloc.h>\n+#include <rte_memory.h>\n+#if defined(RTE_ARCH_X86)\n+#include <tmmintrin.h>\n+#else\n+#error \"bnxt vector pmd: unsupported target.\"\n+#endif\n+\n+#include \"bnxt.h\"\n+#include \"bnxt_cpr.h\"\n+#include \"bnxt_ring.h\"\n+#include \"bnxt_rxr.h\"\n+#include \"bnxt_rxq.h\"\n+#include \"hsi_struct_def_dpdk.h\"\n+\n+#include \"bnxt_txq.h\"\n+#include \"bnxt_txr.h\"\n+\n+/*\n+ * RX Ring handling\n+ */\n+\n+#define RTE_BNXT_MAX_RX_BURST\t\t32\n+#define RTE_BNXT_MAX_TX_BURST\t\t32\n+#define RTE_BNXT_RXQ_REARM_THRESH\t32\n+#define RTE_BNXT_DESCS_PER_LOOP\t\t4\n+\n+static inline void\n+bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)\n+{\n+\tstruct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];\n+\tstruct bnxt_sw_rx_bd *rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];\n+\tstruct rte_mbuf *mb0, *mb1;\n+\tint i;\n+\n+\tconst __m128i hdr_room = _mm_set_epi64x(RTE_PKTMBUF_HEADROOM, 0);\n+\tconst __m128i addrmask = _mm_set_epi64x(UINT64_MAX, 0);\n+\n+\t/* Pull RTE_BNXT_RXQ_REARM_THRESH more mbufs into the software ring */\n+\tif (rte_mempool_get_bulk(rxq->mb_pool,\n+\t\t\t\t (void *)rx_bufs,\n+\t\t\t\t RTE_BNXT_RXQ_REARM_THRESH) < 0) {\n+\t\trte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=\n+\t\t\tRTE_BNXT_RXQ_REARM_THRESH;\n+\n+\t\treturn;\n+\t}\n+\n+\t/* Initialize the mbufs in vector, process 2 mbufs in one loop */\n+\tfor (i = 0; i < RTE_BNXT_RXQ_REARM_THRESH; i += 2, rx_bufs += 2) {\n+\t\t__m128i buf_addr0, buf_addr1;\n+\t\t__m128i rxbd0, rxbd1;\n+\n+\t\tmb0 = rx_bufs[0].mbuf;\n+\t\tmb1 = rx_bufs[1].mbuf;\n+\n+\t\t/* Load address fields from both mbufs */\n+\t\tbuf_addr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n+\t\tbuf_addr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n+\n+\t\t/* Load both rx descriptors (preserving some existing fields) */\n+\t\trxbd0 = _mm_loadu_si128((__m128i *)(rxbds + 0));\n+\t\trxbd1 = _mm_loadu_si128((__m128i *)(rxbds + 1));\n+\n+\t\t/* Add default offset to buffer address. */\n+\t\tbuf_addr0 = _mm_add_epi64(buf_addr0, hdr_room);\n+\t\tbuf_addr1 = _mm_add_epi64(buf_addr1, hdr_room);\n+\n+\t\t/* Clear all fields except address. */\n+\t\tbuf_addr0 =  _mm_and_si128(buf_addr0, addrmask);\n+\t\tbuf_addr1 =  _mm_and_si128(buf_addr1, addrmask);\n+\n+\t\t/* Clear address field in descriptor. */\n+\t\trxbd0 = _mm_andnot_si128(addrmask, rxbd0);\n+\t\trxbd1 = _mm_andnot_si128(addrmask, rxbd1);\n+\n+\t\t/* Set address field in descriptor. */\n+\t\trxbd0 = _mm_add_epi64(rxbd0, buf_addr0);\n+\t\trxbd1 = _mm_add_epi64(rxbd1, buf_addr1);\n+\n+\t\t/* Store descriptors to memory. */\n+\t\t_mm_store_si128((__m128i *)(rxbds++), rxbd0);\n+\t\t_mm_store_si128((__m128i *)(rxbds++), rxbd1);\n+\t}\n+\n+\trxq->rxrearm_start += RTE_BNXT_RXQ_REARM_THRESH;\n+\tB_RX_DB(rxr->rx_doorbell, rxq->rxrearm_start - 1);\n+\tif (rxq->rxrearm_start >= rxq->nb_rx_desc)\n+\t\trxq->rxrearm_start = 0;\n+\n+\trxq->rxrearm_nb -= RTE_BNXT_RXQ_REARM_THRESH;\n+}\n+\n+static uint32_t\n+bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)\n+{\n+\tuint32_t l3, pkt_type = 0;\n+\tuint32_t t_ipcs = 0, ip6 = 0, vlan = 0;\n+\tuint32_t flags_type;\n+\n+\tvlan = !!(rxcmp1->flags2 &\n+\t\trte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN));\n+\tpkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;\n+\n+\tt_ipcs = !!(rxcmp1->flags2 &\n+\t\trte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC));\n+\tip6 = !!(rxcmp1->flags2 &\n+\t\t rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_TYPE));\n+\n+\tflags_type = rxcmp->flags_type &\n+\t\trte_cpu_to_le_32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);\n+\n+\tif (!t_ipcs && !ip6)\n+\t\tl3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;\n+\telse if (!t_ipcs && ip6)\n+\t\tl3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;\n+\telse if (t_ipcs && !ip6)\n+\t\tl3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;\n+\telse\n+\t\tl3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;\n+\n+\tswitch (flags_type) {\n+\tcase RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_ICMP):\n+\t\tif (!t_ipcs)\n+\t\t\tpkt_type |= l3 | RTE_PTYPE_L4_ICMP;\n+\t\telse\n+\t\t\tpkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;\n+\t\tbreak;\n+\n+\tcase RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_TCP):\n+\t\tif (!t_ipcs)\n+\t\t\tpkt_type |= l3 | RTE_PTYPE_L4_TCP;\n+\t\telse\n+\t\t\tpkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;\n+\t\tbreak;\n+\n+\tcase RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_UDP):\n+\t\tif (!t_ipcs)\n+\t\t\tpkt_type |= l3 | RTE_PTYPE_L4_UDP;\n+\t\telse\n+\t\t\tpkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;\n+\t\tbreak;\n+\n+\tcase RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_IP):\n+\t\tpkt_type |= l3;\n+\t\tbreak;\n+\t}\n+\n+\treturn pkt_type;\n+}\n+\n+uint16_t\n+bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t   uint16_t nb_pkts)\n+{\n+\tstruct bnxt_rx_queue *rxq = rx_queue;\n+\tstruct bnxt_cp_ring_info *cpr = rxq->cp_ring;\n+\tstruct bnxt_rx_ring_info *rxr = rxq->rx_ring;\n+\tuint32_t raw_cons = cpr->cp_raw_cons;\n+\tuint32_t cons;\n+\tint nb_rx_pkts = 0;\n+\tstruct rx_pkt_cmpl *rxcmp;\n+\tbool evt = false;\n+\tconst __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);\n+\tconst __m128i shuf_msk =\n+\t\t_mm_set_epi8(15, 14, 13, 12,          /* rss */\n+\t\t\t     0xFF, 0xFF,              /* vlan_tci (zeroes) */\n+\t\t\t     3, 2,                    /* data_len */\n+\t\t\t     0xFF, 0xFF, 3, 2,        /* pkt_len */\n+\t\t\t     0xFF, 0xFF, 0xFF, 0xFF); /* pkt_type (zeroes) */\n+\n+\t/* If Rx Q was stopped return */\n+\tif (rxq->rx_deferred_start)\n+\t\treturn 0;\n+\n+\tif (rxq->rxrearm_nb >= RTE_BNXT_RXQ_REARM_THRESH)\n+\t\tbnxt_rxq_rearm(rxq, rxr);\n+\n+\t/* Return no more than RTE_BNXT_MAX_RX_BURST per call. */\n+\tnb_pkts = RTE_MIN(nb_pkts, RTE_BNXT_MAX_RX_BURST);\n+\n+\t/* Make nb_pkts an integer multiple of RTE_BNXT_DESCS_PER_LOOP */\n+\tnb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_BNXT_DESCS_PER_LOOP);\n+\n+\t/* Handle RX burst request */\n+\twhile (1) {\n+\t\tcons = RING_CMP(cpr->cp_ring_struct, raw_cons);\n+\n+\t\trxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];\n+\n+\t\tif (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))\n+\t\t\tbreak;\n+\n+\t\tcpr->valid = FLIP_VALID(cons,\n+\t\t\t\t\tcpr->cp_ring_struct->ring_mask,\n+\t\t\t\t\tcpr->valid);\n+\n+\t\tif (likely(CMP_TYPE(rxcmp) == RX_PKT_CMPL_TYPE_RX_L2)) {\n+\t\t\tstruct rx_pkt_cmpl_hi *rxcmp1;\n+\t\t\tuint32_t tmp_raw_cons;\n+\t\t\tuint16_t cp_cons;\n+\t\t\tstruct rte_mbuf *mbuf;\n+\t\t\t__m128i mm_rxcmp, pkt_mb;\n+\n+\t\t\ttmp_raw_cons = NEXT_RAW_CMP(raw_cons);\n+\t\t\tcp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);\n+\t\t\trxcmp1 = (struct rx_pkt_cmpl_hi *)\n+\t\t\t\t\t\t&cpr->cp_desc_ring[cp_cons];\n+\n+\t\t\tif (!CMP_VALID(rxcmp1, tmp_raw_cons,\n+\t\t\t\t       cpr->cp_ring_struct))\n+\t\t\t\tbreak;\n+\n+\t\t\traw_cons = tmp_raw_cons;\n+\t\t\tcons = rxcmp->opaque;\n+\n+\t\t\tmbuf = rxr->rx_buf_ring[cons].mbuf;\n+\t\t\trte_prefetch0(mbuf);\n+\t\t\trxr->rx_buf_ring[cons].mbuf = NULL;\n+\n+\t\t\tcpr->valid = FLIP_VALID(cp_cons,\n+\t\t\t\t\t\tcpr->cp_ring_struct->ring_mask,\n+\t\t\t\t\t\tcpr->valid);\n+\n+\t\t\t/* Set constant fields from mbuf initializer. */\n+\t\t\t_mm_store_si128((__m128i *)&mbuf->rearm_data,\n+\t\t\t\t\tmbuf_init);\n+\n+\t\t\t/* Set mbuf pkt_len, data_len, and rss_hash fields. */\n+\t\t\tmm_rxcmp = _mm_load_si128((__m128i *)rxcmp);\n+\t\t\tpkt_mb = _mm_shuffle_epi8(mm_rxcmp, shuf_msk);\n+\t\t\t_mm_storeu_si128((void *)&mbuf->rx_descriptor_fields1,\n+\t\t\t\t\t pkt_mb);\n+\n+\t\t\trte_compiler_barrier();\n+\n+\t\t\tif (rxcmp->flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID)\n+\t\t\t\tmbuf->ol_flags |= PKT_RX_RSS_HASH;\n+\n+\t\t\tif (rxcmp1->flags2 &\n+\t\t\t    RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {\n+\t\t\t\tmbuf->vlan_tci = rxcmp1->metadata &\n+\t\t\t\t\t(RX_PKT_CMPL_METADATA_VID_MASK |\n+\t\t\t\t\tRX_PKT_CMPL_METADATA_DE |\n+\t\t\t\t\tRX_PKT_CMPL_METADATA_PRI_MASK);\n+\t\t\t\tmbuf->ol_flags |= PKT_RX_VLAN;\n+\t\t\t}\n+\n+\t\t\tmbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);\n+\n+\t\t\trx_pkts[nb_rx_pkts++] = mbuf;\n+\t\t} else {\n+\t\t\tevt =\n+\t\t\tbnxt_event_hwrm_resp_handler(rxq->bp,\n+\t\t\t\t\t\t     (struct cmpl_base *)rxcmp);\n+\t\t}\n+\n+\t\traw_cons = NEXT_RAW_CMP(raw_cons);\n+\t\tif (nb_rx_pkts == nb_pkts || evt)\n+\t\t\tbreak;\n+\t}\n+\trxr->rx_prod = RING_ADV(rxr->rx_ring_struct, rxr->rx_prod, nb_rx_pkts);\n+\n+\trxq->rxrearm_nb += nb_rx_pkts;\n+\tcpr->cp_raw_cons = raw_cons;\n+\tif (nb_rx_pkts || evt)\n+\t\tB_CP_DIS_DB(cpr, cpr->cp_raw_cons);\n+\n+\treturn nb_rx_pkts;\n+}\n+\n+static inline void bnxt_next_cmpl(struct bnxt_cp_ring_info *cpr, uint32_t *idx,\n+\t\t\t\t  bool *v, uint32_t inc)\n+{\n+\t*idx += inc;\n+\tif (unlikely(*idx == cpr->cp_ring_struct->ring_size)) {\n+\t\t*v = !*v;\n+\t\t*idx = 0;\n+\t}\n+}\n+\n+static void\n+bnxt_tx_cmp_vec(struct bnxt_tx_queue *txq, int nr_pkts)\n+{\n+\tstruct bnxt_tx_ring_info *txr = txq->tx_ring;\n+\tstruct rte_mbuf **free = txq->free;\n+\tuint16_t cons = txr->tx_cons;\n+\tunsigned int blk = 0;\n+\n+\twhile (nr_pkts--) {\n+\t\tstruct bnxt_sw_tx_bd *tx_buf;\n+\t\tstruct rte_mbuf *mbuf;\n+\n+\t\ttx_buf = &txr->tx_buf_ring[cons];\n+\t\tcons = RING_NEXT(txr->tx_ring_struct, cons);\n+\t\tmbuf = rte_pktmbuf_prefree_seg(tx_buf->mbuf);\n+\t\ttx_buf->mbuf = NULL;\n+\n+\t\tif (blk && mbuf->pool != free[0]->pool) {\n+\t\t\trte_mempool_put_bulk(free[0]->pool, (void **)free, blk);\n+\t\t\tblk = 0;\n+\t\t}\n+\t\tfree[blk++] = mbuf;\n+\t}\n+\tif (blk)\n+\t\trte_mempool_put_bulk(free[0]->pool, (void **)free, blk);\n+\n+\ttxr->tx_cons = cons;\n+}\n+\n+static void\n+bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq)\n+{\n+\tstruct bnxt_cp_ring_info *cpr = txq->cp_ring;\n+\tuint32_t raw_cons = cpr->cp_raw_cons;\n+\tuint32_t cons;\n+\tuint32_t nb_tx_pkts = 0;\n+\tstruct tx_cmpl *txcmp;\n+\tstruct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;\n+\tstruct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;\n+\tuint32_t ring_mask = cp_ring_struct->ring_mask;\n+\n+\tdo {\n+\t\tcons = RING_CMPL(ring_mask, raw_cons);\n+\t\ttxcmp = (struct tx_cmpl *)&cp_desc_ring[cons];\n+\n+\t\tif (!CMPL_VALID(txcmp, cpr->valid))\n+\t\t\tbreak;\n+\t\tbnxt_next_cmpl(cpr, &cons, &cpr->valid, 1);\n+\t\trte_prefetch0(&cp_desc_ring[cons]);\n+\n+\t\tif (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2))\n+\t\t\tnb_tx_pkts += txcmp->opaque;\n+\t\telse\n+\t\t\tRTE_LOG_DP(ERR, PMD,\n+\t\t\t\t   \"Unhandled CMP type %02x\\n\",\n+\t\t\t\t   CMP_TYPE(txcmp));\n+\t\traw_cons = cons;\n+\t} while (nb_tx_pkts < ring_mask);\n+\n+\tif (nb_tx_pkts) {\n+\t\tbnxt_tx_cmp_vec(txq, nb_tx_pkts);\n+\t\tcpr->cp_raw_cons = raw_cons;\n+\t\tB_CP_DB(cpr, raw_cons, ring_mask);\n+\t}\n+}\n+\n+#define TX_BD_FLAGS_CMPL ((1 << TX_BD_LONG_FLAGS_BD_CNT_SFT) | \\\n+\t\t\t  TX_BD_SHORT_FLAGS_COAL_NOW | \\\n+\t\t\t  TX_BD_SHORT_TYPE_TX_BD_SHORT | \\\n+\t\t\t  TX_BD_LONG_FLAGS_PACKET_END)\n+\n+#define TX_BD_FLAGS_NOCMPL (TX_BD_FLAGS_CMPL | TX_BD_LONG_FLAGS_NO_CMPL)\n+\n+static inline uint32_t\n+bnxt_xmit_flags_len(uint16_t len, uint16_t flags)\n+{\n+\tswitch (len >> 9) {\n+\tcase 0:\n+\t\treturn flags | TX_BD_LONG_FLAGS_LHINT_LT512;\n+\tcase 1:\n+\t\treturn flags | TX_BD_LONG_FLAGS_LHINT_LT1K;\n+\tcase 2:\n+\t\treturn flags | TX_BD_LONG_FLAGS_LHINT_LT2K;\n+\tcase 3:\n+\t\treturn flags | TX_BD_LONG_FLAGS_LHINT_LT2K;\n+\tdefault:\n+\t\treturn flags | TX_BD_LONG_FLAGS_LHINT_GTE2K;\n+\t}\n+}\n+\n+static uint16_t\n+bnxt_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t  uint16_t nb_pkts)\n+{\n+\tstruct bnxt_tx_queue *txq = tx_queue;\n+\tstruct bnxt_tx_ring_info *txr = txq->tx_ring;\n+\tuint16_t prod = txr->tx_prod;\n+\tstruct rte_mbuf *tx_mbuf;\n+\tstruct tx_bd_long *txbd = NULL;\n+\tstruct bnxt_sw_tx_bd *tx_buf;\n+\tuint16_t to_send;\n+\n+\tnb_pkts = RTE_MIN(nb_pkts, bnxt_tx_avail(txq));\n+\n+\tif (unlikely(nb_pkts == 0))\n+\t\treturn 0;\n+\n+\t/* Handle TX burst request */\n+\tto_send = nb_pkts;\n+\twhile (to_send) {\n+\t\ttx_mbuf = *tx_pkts++;\n+\t\trte_prefetch0(tx_mbuf);\n+\n+\t\ttx_buf = &txr->tx_buf_ring[prod];\n+\t\ttx_buf->mbuf = tx_mbuf;\n+\t\ttx_buf->nr_bds = 1;\n+\n+\t\ttxbd = &txr->tx_desc_ring[prod];\n+\t\ttxbd->address = tx_mbuf->buf_iova + tx_mbuf->data_off;\n+\t\ttxbd->len = tx_mbuf->data_len;\n+\t\ttxbd->flags_type = bnxt_xmit_flags_len(tx_mbuf->data_len,\n+\t\t\t\t\t\t       TX_BD_FLAGS_NOCMPL);\n+\t\tprod = RING_NEXT(txr->tx_ring_struct, prod);\n+\t\tto_send--;\n+\t}\n+\n+\t/* Request a completion for last packet in burst */\n+\tif (txbd) {\n+\t\ttxbd->opaque = nb_pkts;\n+\t\ttxbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;\n+\t}\n+\n+\trte_compiler_barrier();\n+\tB_TX_DB(txr->tx_doorbell, prod);\n+\n+\ttxr->tx_prod = prod;\n+\n+\treturn nb_pkts;\n+}\n+\n+uint16_t\n+bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t   uint16_t nb_pkts)\n+{\n+\tint nb_sent = 0;\n+\tstruct bnxt_tx_queue *txq = tx_queue;\n+\n+\t/* Tx queue was stopped; wait for it to be restarted */\n+\tif (unlikely(txq->tx_deferred_start)) {\n+\t\tPMD_DRV_LOG(DEBUG, \"Tx q stopped;return\\n\");\n+\t\treturn 0;\n+\t}\n+\n+\t/* Handle TX completions */\n+\tif (bnxt_tx_bds_in_hw(txq) >= txq->tx_free_thresh)\n+\t\tbnxt_handle_tx_cp_vec(txq);\n+\n+\twhile (nb_pkts) {\n+\t\tuint16_t ret, num;\n+\n+\t\tnum = RTE_MIN(nb_pkts, RTE_BNXT_MAX_TX_BURST);\n+\t\tret = bnxt_xmit_fixed_burst_vec(tx_queue,\n+\t\t\t\t\t\t&tx_pkts[nb_sent],\n+\t\t\t\t\t\tnum);\n+\t\tnb_sent += ret;\n+\t\tnb_pkts -= ret;\n+\t\tif (ret < num)\n+\t\t\tbreak;\n+\t}\n+\n+\treturn nb_sent;\n+}\n+\n+int __attribute__((cold))\n+bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq)\n+{\n+\tuintptr_t p;\n+\tstruct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */\n+\n+\tmb_def.nb_segs = 1;\n+\tmb_def.data_off = RTE_PKTMBUF_HEADROOM;\n+\tmb_def.port = rxq->port_id;\n+\trte_mbuf_refcnt_set(&mb_def, 1);\n+\n+\t/* prevent compiler reordering: rearm_data covers previous fields */\n+\trte_compiler_barrier();\n+\tp = (uintptr_t)&mb_def.rearm_data;\n+\trxq->mbuf_initializer = *(uint64_t *)p;\n+\trxq->rxrearm_nb = 0;\n+\trxq->rxrearm_start = 0;\n+\treturn 0;\n+}\ndiff --git a/drivers/net/bnxt/bnxt_txr.h b/drivers/net/bnxt/bnxt_txr.h\nindex 13ca04676..5d6a531a6 100644\n--- a/drivers/net/bnxt/bnxt_txr.h\n+++ b/drivers/net/bnxt/bnxt_txr.h\n@@ -57,6 +57,11 @@ int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq);\n int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id);\n uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t       uint16_t nb_pkts);\n+#ifdef RTE_LIBRTE_BNXT_INC_VECTOR\n+uint16_t bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t    uint16_t nb_pkts);\n+#endif\n+\n int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n \ndiff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build\nindex e130f2712..0d2e24848 100644\n--- a/drivers/net/bnxt/meson.build\n+++ b/drivers/net/bnxt/meson.build\n@@ -18,3 +18,8 @@ sources = files('bnxt_cpr.c',\n \t'bnxt_util.c',\n \t'bnxt_vnic.c',\n \t'rte_pmd_bnxt.c')\n+\n+if arch_subdir == 'x86'\n+\tdpdk_conf.set('RTE_LIBRTE_BNXT_INC_VECTOR', 1)\n+\tsources += files('bnxt_rxtx_vec_sse.c')\n+endif\n",
    "prefixes": [
        "v2",
        "03/10"
    ]
}