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GET /api/patches/53601/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 53601,
    "url": "http://patches.dpdk.org/api/patches/53601/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190521213953.25425-11-ajit.khaparde@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190521213953.25425-11-ajit.khaparde@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190521213953.25425-11-ajit.khaparde@broadcom.com",
    "date": "2019-05-21T21:39:52",
    "name": "[10/11] net/bnxt: HWRM version update",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "04eda6cf83120ee1171a3a9e70735e6431dd8c00",
    "submitter": {
        "id": 501,
        "url": "http://patches.dpdk.org/api/people/501/?format=api",
        "name": "Ajit Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190521213953.25425-11-ajit.khaparde@broadcom.com/mbox/",
    "series": [
        {
            "id": 4736,
            "url": "http://patches.dpdk.org/api/series/4736/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4736",
            "date": "2019-05-21T21:39:43",
            "name": "bnxt patchset",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/4736/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/53601/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/53601/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2C311683E;\n\tTue, 21 May 2019 23:40:23 +0200 (CEST)",
            "from rnd-relay.smtp.broadcom.com (rnd-relay.smtp.broadcom.com\n\t[192.19.229.170]) by dpdk.org (Postfix) with ESMTP id E0ACB4CAB\n\tfor <dev@dpdk.org>; Tue, 21 May 2019 23:39:58 +0200 (CEST)",
            "from nis-sj1-27.broadcom.com (nis-sj1-27.lvn.broadcom.net\n\t[10.75.144.136])\n\tby rnd-relay.smtp.broadcom.com (Postfix) with ESMTP id 08E5430C0E2;\n\tTue, 21 May 2019 14:39:57 -0700 (PDT)",
            "from C02VPB22HTD6.wifi.broadcom.net (c02vpb22htd6.wifi.broadcom.net\n\t[10.69.74.102])\n\tby nis-sj1-27.broadcom.com (Postfix) with ESMTP id A92FAAC074E;\n\tTue, 21 May 2019 14:39:56 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.10.3 rnd-relay.smtp.broadcom.com 08E5430C0E2",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n\ts=dkimrelay; t=1558474797;\n\tbh=rBOo4x4DsvcoZTSMZh539TjDQsCON+hewsxlDiYVLdw=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=P3/cv3mK4pb3bATQCzviJ9ZMvd7hqfmKr9UXhe8qXZ8ariEVqTsv8iB/Grv8u1Cvv\n\tVk9SC2Bxly++buu8hzB9fSnSEGIFD9UGg03A93fqbn93PIaaxEHkB4FBhYSVqIC5JV\n\tqKo64DZWxxIddq3UtkIewnnk8aWB2I4pPQnnFirY=",
        "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com, Lance Richardson <lance.richardson@broadcom.com>",
        "Date": "Tue, 21 May 2019 14:39:52 -0700",
        "Message-Id": "<20190521213953.25425-11-ajit.khaparde@broadcom.com>",
        "X-Mailer": "git-send-email 2.20.1 (Apple Git-117)",
        "In-Reply-To": "<20190521213953.25425-1-ajit.khaparde@broadcom.com>",
        "References": "<20190521213953.25425-1-ajit.khaparde@broadcom.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=UTF-8",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 10/11] net/bnxt: HWRM version update",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Update HWRM API to version 1.10.0.74\n\nSigned-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\nReviewed-by: Lance Richardson <lance.richardson@broadcom.com>\n---\n drivers/net/bnxt/hsi_struct_def_dpdk.h | 1399 ++++++++++++++++++++----\n 1 file changed, 1168 insertions(+), 231 deletions(-)",
    "diff": "diff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h b/drivers/net/bnxt/hsi_struct_def_dpdk.h\nindex 00a8ff87e..305ee09bc 100644\n--- a/drivers/net/bnxt/hsi_struct_def_dpdk.h\n+++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h\n@@ -1,5 +1,5 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright (c) 2014-2019 Broadcom Limited\n+ * Copyright (c) 2014-2019 Broadcom Inc.\n  * All rights reserved.\n  *\n  * DO NOT MODIFY!!! This file is automatically generated.\n@@ -27,7 +27,8 @@ struct hwrm_cmd_hdr {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -221,8 +222,14 @@ struct hwrm_short_input {\n \t#define HWRM_SHORT_INPUT_SIGNATURE_SHORT_CMD UINT32_C(0x4321)\n \t#define HWRM_SHORT_INPUT_SIGNATURE_LAST \\\n \t\tHWRM_SHORT_INPUT_SIGNATURE_SHORT_CMD\n-\t/* Reserved for future use. */\n-\tuint16_t\tunused_0;\n+\t/* The target ID of the command */\n+\tuint16_t\ttarget_id;\n+\t/* Default target_id (0x0) to maintain compatibility with old driver */\n+\t#define HWRM_SHORT_INPUT_TARGET_ID_DEFAULT UINT32_C(0x0)\n+\t/* Reserved for user-space HWRM interface */\n+\t#define HWRM_SHORT_INPUT_TARGET_ID_TOOLS   UINT32_C(0xfffd)\n+\t#define HWRM_SHORT_INPUT_TARGET_ID_LAST \\\n+\t\tHWRM_SHORT_INPUT_TARGET_ID_TOOLS\n \t/* This value indicates the length of the request. */\n \tuint16_t\tsize;\n \t/*\n@@ -394,6 +401,8 @@ struct cmd_nums {\n \t#define HWRM_FWD_RESP                             UINT32_C(0xd2)\n \t#define HWRM_FWD_ASYNC_EVENT_CMPL                 UINT32_C(0xd3)\n \t#define HWRM_OEM_CMD                              UINT32_C(0xd4)\n+\t/* Tells the fw to run PRBS test on a given port and lane. */\n+\t#define HWRM_PORT_PRBS_TEST                       UINT32_C(0xd5)\n \t#define HWRM_TEMP_MONITOR_QUERY                   UINT32_C(0xe0)\n \t#define HWRM_WOL_FILTER_ALLOC                     UINT32_C(0xf0)\n \t#define HWRM_WOL_FILTER_FREE                      UINT32_C(0xf1)\n@@ -486,6 +495,8 @@ struct cmd_nums {\n \t#define HWRM_CFA_EEM_OP                           UINT32_C(0x123)\n \t/* Experimental */\n \t#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS              UINT32_C(0x124)\n+\t/* Experimental */\n+\t#define HWRM_CFA_TFLIB                            UINT32_C(0x125)\n \t/* Engine CKV - Ping the device and SRT firmware to get the public key. */\n \t#define HWRM_ENGINE_CKV_HELLO                     UINT32_C(0x12d)\n \t/* Engine CKV - Get the current allocation status of keys provisioned in the key vault. */\n@@ -506,6 +517,8 @@ struct cmd_nums {\n \t#define HWRM_ENGINE_CKV_KEY_GEN                   UINT32_C(0x135)\n \t/* Engine CKV - Configure a label index with a label value. */\n \t#define HWRM_ENGINE_CKV_KEY_LABEL_CFG             UINT32_C(0x136)\n+\t/* Engine CKV - Query a label */\n+\t#define HWRM_ENGINE_CKV_KEY_LABEL_QCFG            UINT32_C(0x137)\n \t/* Engine - Query the available queue groups configuration. */\n \t#define HWRM_ENGINE_QG_CONFIG_QUERY               UINT32_C(0x13c)\n \t/* Engine - Query the queue groups assigned to a function. */\n@@ -587,6 +600,19 @@ struct cmd_nums {\n \t/* Experimental */\n \t#define HWRM_PCIE_QSTATS                          UINT32_C(0x204)\n \t/* Experimental */\n+\t#define HWRM_MFG_FRU_WRITE_CONTROL                UINT32_C(0x205)\n+\t/* Returns the current value of a free running counter from the device. */\n+\t#define HWRM_MFG_TIMERS_QUERY                     UINT32_C(0x206)\n+\t/* Experimental */\n+\t#define HWRM_MFG_OTP_CFG                          UINT32_C(0x207)\n+\t/* Experimental */\n+\t#define HWRM_MFG_OTP_QCFG                         UINT32_C(0x208)\n+\t/*\n+\t * Tells the fw to run the DMA read from the host and DMA write\n+\t * to the host test.\n+\t */\n+\t#define HWRM_MFG_HDMA_TEST                        UINT32_C(0x209)\n+\t/* Experimental */\n \t#define HWRM_DBG_READ_DIRECT                      UINT32_C(0xff10)\n \t/* Experimental */\n \t#define HWRM_DBG_READ_INDIRECT                    UINT32_C(0xff11)\n@@ -643,67 +669,85 @@ struct cmd_nums {\n struct ret_codes {\n \tuint16_t\terror_code;\n \t/* Request was successfully executed by the HWRM. */\n-\t#define HWRM_ERR_CODE_SUCCESS                   UINT32_C(0x0)\n+\t#define HWRM_ERR_CODE_SUCCESS                      UINT32_C(0x0)\n \t/* The HWRM failed to execute the request. */\n-\t#define HWRM_ERR_CODE_FAIL                      UINT32_C(0x1)\n+\t#define HWRM_ERR_CODE_FAIL                         UINT32_C(0x1)\n \t/*\n \t * The request contains invalid argument(s) or input\n \t * parameters.\n \t */\n-\t#define HWRM_ERR_CODE_INVALID_PARAMS            UINT32_C(0x2)\n+\t#define HWRM_ERR_CODE_INVALID_PARAMS               UINT32_C(0x2)\n \t/*\n \t * The requester is not allowed to access the requested\n \t * resource. This error code shall be provided in a\n \t * response to a request to query or modify an existing\n \t * resource that is not accessible by the requester.\n \t */\n-\t#define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED    UINT32_C(0x3)\n+\t#define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED       UINT32_C(0x3)\n \t/*\n \t * The HWRM is unable to allocate the requested resource.\n \t * This code only applies to requests for HWRM resource\n \t * allocations.\n \t */\n-\t#define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR      UINT32_C(0x4)\n+\t#define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR         UINT32_C(0x4)\n \t/*\n \t * Invalid combination of flags is specified in the\n \t * request.\n \t */\n-\t#define HWRM_ERR_CODE_INVALID_FLAGS             UINT32_C(0x5)\n+\t#define HWRM_ERR_CODE_INVALID_FLAGS                UINT32_C(0x5)\n \t/*\n \t * Invalid combination of enables fields is specified in\n \t * the request.\n \t */\n-\t#define HWRM_ERR_CODE_INVALID_ENABLES           UINT32_C(0x6)\n+\t#define HWRM_ERR_CODE_INVALID_ENABLES              UINT32_C(0x6)\n \t/*\n \t * Request contains a required TLV that is not supported by\n \t * the installed version of firmware.\n \t */\n-\t#define HWRM_ERR_CODE_UNSUPPORTED_TLV           UINT32_C(0x7)\n+\t#define HWRM_ERR_CODE_UNSUPPORTED_TLV              UINT32_C(0x7)\n \t/*\n \t * No firmware buffer available to accept the request. Driver\n \t * should retry the request.\n \t */\n-\t#define HWRM_ERR_CODE_NO_BUFFER                 UINT32_C(0x8)\n+\t#define HWRM_ERR_CODE_NO_BUFFER                    UINT32_C(0x8)\n \t/*\n \t * This error code is only reported by firmware when some\n \t * sub-option of a supported HWRM command is unsupported.\n \t */\n-\t#define HWRM_ERR_CODE_UNSUPPORTED_OPTION_ERR    UINT32_C(0x9)\n+\t#define HWRM_ERR_CODE_UNSUPPORTED_OPTION_ERR       UINT32_C(0x9)\n \t/*\n \t * This error code is only reported by firmware when the specific\n \t * request is not able to process when the HOT reset in progress.\n \t */\n-\t#define HWRM_ERR_CODE_HOT_RESET_PROGRESS        UINT32_C(0xa)\n+\t#define HWRM_ERR_CODE_HOT_RESET_PROGRESS           UINT32_C(0xa)\n \t/*\n \t * This error code is only reported by firmware when the registered\n \t * driver instances are not capable of hot reset.\n \t */\n-\t#define HWRM_ERR_CODE_HOT_RESET_FAIL            UINT32_C(0xb)\n+\t#define HWRM_ERR_CODE_HOT_RESET_FAIL               UINT32_C(0xb)\n+\t/*\n+\t * This error code is only reported by the firmware when during\n+\t * flow allocation when a requeest for a flow counter fails because\n+\t * the number of flow counters are exhausted.\n+\t */\n+\t#define HWRM_ERR_CODE_NO_FLOW_COUNTER_DURING_ALLOC UINT32_C(0xc)\n+\t/*\n+\t * This error code is only reported by firmware when the registered\n+\t * driver instances requested to offloaded a flow but was unable to because\n+\t * the requested key's hash collides with the installed keys.\n+\t */\n+\t#define HWRM_ERR_CODE_KEY_HASH_COLLISION           UINT32_C(0xd)\n+\t/*\n+\t * This error code is only reported by firmware when the registered\n+\t * driver instances requested to offloaded a flow but was unable to because\n+\t * the same key has already been installed.\n+\t */\n+\t#define HWRM_ERR_CODE_KEY_ALREADY_EXISTS           UINT32_C(0xe)\n \t/*\n \t * Generic HWRM execution error that represents an\n \t * internal error.\n \t */\n-\t#define HWRM_ERR_CODE_HWRM_ERROR                UINT32_C(0xf)\n+\t#define HWRM_ERR_CODE_HWRM_ERROR                   UINT32_C(0xf)\n \t/*\n \t * This value indicates that the HWRM response is in TLV format and\n \t * should be interpreted as one or more TLVs starting with the\n@@ -711,11 +755,11 @@ struct ret_codes {\n \t * by itself, just an indicatation that the response should be parsed\n \t * as TLV and the actual error code will be in the hwrm_resp_hdr TLV.\n \t */\n-\t#define HWRM_ERR_CODE_TLV_ENCAPSULATED_RESPONSE UINT32_C(0x8000)\n+\t#define HWRM_ERR_CODE_TLV_ENCAPSULATED_RESPONSE    UINT32_C(0x8000)\n \t/* Unknown error */\n-\t#define HWRM_ERR_CODE_UNKNOWN_ERR               UINT32_C(0xfffe)\n+\t#define HWRM_ERR_CODE_UNKNOWN_ERR                  UINT32_C(0xfffe)\n \t/* Unsupported or invalid command */\n-\t#define HWRM_ERR_CODE_CMD_NOT_SUPPORTED         UINT32_C(0xffff)\n+\t#define HWRM_ERR_CODE_CMD_NOT_SUPPORTED            UINT32_C(0xffff)\n \t#define HWRM_ERR_CODE_LAST \\\n \t\tHWRM_ERR_CODE_CMD_NOT_SUPPORTED\n \tuint16_t\tunused_0[3];\n@@ -774,12 +818,25 @@ struct hwrm_err_output {\n #define HW_HASH_KEY_SIZE 40\n /* valid key for HWRM response */\n #define HWRM_RESP_VALID_KEY 1\n+/* Reserved for BONO processor */\n+#define HWRM_TARGET_ID_BONO 0xFFF8\n+/* Reserved for KONG processor */\n+#define HWRM_TARGET_ID_KONG 0xFFF9\n+/* Reserved for APE processor */\n+#define HWRM_TARGET_ID_APE 0xFFFA\n+/*\n+ * This value will be used by tools for User-space HWRM Interface.\n+ * When tool execute any HWRM command with this target_id, firmware\n+ * will copy the response and/or data payload via register space instead\n+ * of DMAing it.\n+ */\n+#define HWRM_TARGET_ID_TOOLS 0xFFFD\n #define HWRM_VERSION_MAJOR 1\n #define HWRM_VERSION_MINOR 10\n #define HWRM_VERSION_UPDATE 0\n /* non-zero means beta version */\n-#define HWRM_VERSION_RSVD 48\n-#define HWRM_VERSION_STR \"1.10.0.48\"\n+#define HWRM_VERSION_RSVD 74\n+#define HWRM_VERSION_STR \"1.10.0.74\"\n \n /****************\n  * hwrm_ver_get *\n@@ -804,7 +861,8 @@ struct hwrm_ver_get_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -1062,6 +1120,13 @@ struct hwrm_ver_get_output {\n \t */\n \t#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_ADV_FLOW_MGNT_SUPPORTED \\\n \t\tUINT32_C(0x1000)\n+\t/*\n+\t * If set to 1, the firmware is able to support TFLIB features.\n+\t * If set to 0, then the firmware doesn’t support TFLIB features.\n+\t * By default, this flag should be 0 for older version of core firmware.\n+\t */\n+\t#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_TFLIB_SUPPORTED \\\n+\t\tUINT32_C(0x2000)\n \t/*\n \t * This field represents the major version of RoCE firmware.\n \t * A change in major version represents a major release.\n@@ -1099,12 +1164,8 @@ struct hwrm_ver_get_output {\n \t * firmware (ASCII chars with NULL at the end).\n \t */\n \tchar\tnetctrl_fw_name[16];\n-\t/*\n-\t * This field is reserved for future use.\n-\t * The responder should set it to 0.\n-\t * The requester should ignore this field.\n-\t */\n-\tuint8_t\treserved2[16];\n+\t/* This field represents the active board package name. */\n+\tchar\tactive_pkg_name[16];\n \t/*\n \t * This field represents the name of RoCE FW (ASCII chars\n \t * with NULL at the end).\n@@ -3845,6 +3906,12 @@ struct hwrm_async_event_cmpl {\n \t */\n \t#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_EEM_CFG_CHANGE \\\n \t\tUINT32_C(0x3c)\n+\t/* TFLIB unique default VNIC Configuration Change */\n+\t#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_TFLIB_DEFAULT_VNIC_CHANGE \\\n+\t\tUINT32_C(0x3d)\n+\t/* TFLIB unique link status changed */\n+\t#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_TFLIB_LINK_STATUS_CHANGE \\\n+\t\tUINT32_C(0x3e)\n \t/*\n \t * A trace log message. This contains firmware trace logs string\n \t * embedded in the asynchronous message. This is an experimental\n@@ -5859,7 +5926,8 @@ struct hwrm_func_reset_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -5962,7 +6030,8 @@ struct hwrm_func_getfid_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -6038,7 +6107,8 @@ struct hwrm_func_vf_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -6110,7 +6180,8 @@ struct hwrm_func_vf_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -6183,7 +6254,8 @@ struct hwrm_func_vf_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -6446,7 +6518,8 @@ struct hwrm_func_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -6663,6 +6736,13 @@ struct hwrm_func_qcaps_output {\n \t */\n \t#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ERROR_RECOVERY_CAPABLE \\\n \t\tUINT32_C(0x800000)\n+\t/*\n+\t * If the query is for a VF, then this flag shall be ignored.\n+\t * If this query is for a PF and this flag is set to 1, then\n+\t * the PF has the capability to support extended stats.\n+\t */\n+\t#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT_STATS_SUPPORTED \\\n+\t\tUINT32_C(0x1000000)\n \t/*\n \t * This value is current MAC address configured for this\n \t * function. A value of 00-00-00-00-00-00 indicates no\n@@ -6807,7 +6887,8 @@ struct hwrm_func_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -7247,7 +7328,8 @@ struct hwrm_func_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -7889,7 +7971,8 @@ struct hwrm_func_qstats_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8014,7 +8097,8 @@ struct hwrm_func_clr_stats_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8078,7 +8162,8 @@ struct hwrm_func_vf_resc_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8141,7 +8226,8 @@ struct hwrm_func_drv_rgtr_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8382,7 +8468,8 @@ struct hwrm_func_drv_unrgtr_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8447,7 +8534,8 @@ struct hwrm_func_buf_rgtr_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8581,7 +8669,8 @@ struct hwrm_func_buf_unrgtr_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8650,7 +8739,8 @@ struct hwrm_func_drv_qver_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8757,7 +8847,8 @@ struct hwrm_func_resource_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8886,7 +8977,8 @@ struct hwrm_func_backing_store_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -8973,7 +9065,10 @@ struct hwrm_func_backing_store_qcaps_output {\n \t * the backing store.\n \t */\n \tuint32_t\ttqm_max_entries_per_ring;\n-\t/* Maximum number of MR/AV context entries supported for this function. */\n+\t/*\n+\t * Maximum number of MR plus AV context entries supported for this\n+\t * function.\n+\t */\n \tuint32_t\tmrav_max_entries;\n \t/* Number of bytes that must be allocated for each context entry. */\n \tuint16_t\tmrav_entry_size;\n@@ -8981,7 +9076,22 @@ struct hwrm_func_backing_store_qcaps_output {\n \tuint16_t\ttim_entry_size;\n \t/* Maximum number of Timer context entries supported for this function. */\n \tuint32_t\ttim_max_entries;\n-\tuint8_t\tunused_0[2];\n+\t/*\n+\t * When this field is zero, the 32b `mrav_num_entries` field in the\n+\t * `backing_store_cfg` and `backing_store_qcfg` commands represents\n+\t * the total number of MR plus AV entries allowed in the MR/AV backing\n+\t * store PBL.\n+\t *\n+\t * When this field is non-zero, the 32b `mrav_num_entries` field in\n+\t * the `backing_store_cfg` and `backing_store_qcfg` commands is\n+\t * logically divided into two 16b fields. Bits `[31:16]` represents\n+\t * the `mr_num_entries` and bits `[15:0]` represents `av_num_entries`.\n+\t * Both of these values are represented in a unit granularity\n+\t * specified by this field. For example, if this field is 16 and\n+\t * `mrav_num_entries` is `0x02000100`, then the number of MR entries\n+\t * is 8192 and the number of AV entries is 4096.\n+\t */\n+\tuint16_t\tmrav_num_entries_units;\n \t/*\n \t * The number of entries specified for any TQM ring must be a\n \t * multiple of this value to prevent any resource allocation\n@@ -9021,7 +9131,8 @@ struct hwrm_func_backing_store_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -9041,6 +9152,12 @@ struct hwrm_func_backing_store_cfg_input {\n \t */\n \t#define HWRM_FUNC_BACKING_STORE_CFG_INPUT_FLAGS_PREBOOT_MODE \\\n \t\tUINT32_C(0x1)\n+\t/*\n+\t * When set, the 32b `mrav_num_entries` field is logically divided\n+\t * into two 16b fields, `mr_num_entries` and `av_num_entries`.\n+\t */\n+\t#define HWRM_FUNC_BACKING_STORE_CFG_INPUT_FLAGS_MRAV_RESERVATION_SPLIT \\\n+\t\tUINT32_C(0x2)\n \tuint32_t\tenables;\n \t/*\n \t * This bit must be '1' for the qp fields to be\n@@ -9958,7 +10075,20 @@ struct hwrm_func_backing_store_cfg_input {\n \t * the backing store.\n \t */\n \tuint32_t\ttqm_ring7_num_entries;\n-\t/* Number of MR/AV entries. */\n+\t/*\n+\t * If the MR/AV split reservation flag is not set, then this field\n+\t * represents the total number of MR plus AV entries. For versions\n+\t * of firmware that support the split reservation, when it is not\n+\t * specified half of the entries will be reserved for MRs and the\n+\t * other half for AVs.\n+\t *\n+\t * If the MR/AV split reservation flag is set, then this\n+\t * field is logically divided into two 16b fields. Bits `[31:16]`\n+\t * represents the `mr_num_entries` and bits `[15:0]` represents\n+\t * `av_num_entries`. The granularity of these values is defined by\n+\t * the `mrav_num_entries_unit` field returned by the\n+\t * `backing_store_qcaps` command.\n+\t */\n \tuint32_t\tmrav_num_entries;\n \t/* Number of Timer entries. */\n \tuint32_t\ttim_num_entries;\n@@ -10036,7 +10166,8 @@ struct hwrm_func_backing_store_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -10068,6 +10199,12 @@ struct hwrm_func_backing_store_qcfg_output {\n \t */\n \t#define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_FLAGS_PREBOOT_MODE \\\n \t\tUINT32_C(0x1)\n+\t/*\n+\t * When set, the 32b `mrav_num_entries` field is logically divided\n+\t * into two 16b fields, `mr_num_entries` and `av_num_entries`.\n+\t */\n+\t#define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_FLAGS_MRAV_RESERVATION_SPLIT \\\n+\t\tUINT32_C(0x2)\n \tuint8_t\tunused_0[4];\n \t/*\n \t * This bit must be '1' for the qp fields to be\n@@ -10891,7 +11028,20 @@ struct hwrm_func_backing_store_qcfg_output {\n \tuint32_t\ttqm_ring6_num_entries;\n \t/* Number of TQM ring 7 entries. */\n \tuint32_t\ttqm_ring7_num_entries;\n-\t/* Number of MR/AV entries. */\n+\t/*\n+\t * If the MR/AV split reservation flag is not set, then this field\n+\t * represents the total number of MR plus AV entries. For versions\n+\t * of firmware that support the split reservation, when it is not\n+\t * specified half of the entries will be reserved for MRs and the\n+\t * other half for AVs.\n+\t *\n+\t * If the MR/AV split reservation flag is set, then this\n+\t * field is logically divided into two 16b fields. Bits `[31:16]`\n+\t * represents the `mr_num_entries` and bits `[15:0]` represents\n+\t * `av_num_entries`. The granularity of these values is defined by\n+\t * the `mrav_num_entries_unit` field returned by the\n+\t * `backing_store_qcaps` command.\n+\t */\n \tuint32_t\tmrav_num_entries;\n \t/* Number of Timer entries. */\n \tuint32_t\ttim_num_entries;\n@@ -10930,7 +11080,8 @@ struct hwrm_error_recovery_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -11296,7 +11447,8 @@ struct hwrm_func_vlan_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -11386,7 +11538,8 @@ struct hwrm_func_vlan_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -11507,7 +11660,8 @@ struct hwrm_func_vf_vnic_ids_query_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -11580,7 +11734,8 @@ struct hwrm_func_vf_bw_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -11704,7 +11859,8 @@ struct hwrm_func_vf_bw_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -11841,7 +11997,8 @@ struct hwrm_func_drv_if_change_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -11929,7 +12086,8 @@ struct hwrm_port_phy_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -12520,7 +12678,8 @@ struct hwrm_port_phy_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -13389,7 +13548,7 @@ struct hwrm_port_phy_qcfg_output {\n  *********************/\n \n \n-/* hwrm_port_mac_cfg_input (size:320b/40B) */\n+/* hwrm_port_mac_cfg_input (size:384b/48B) */\n struct hwrm_port_mac_cfg_input {\n \t/* The HWRM command request type. */\n \tuint16_t\treq_type;\n@@ -13407,7 +13566,8 @@ struct hwrm_port_mac_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -13527,6 +13687,13 @@ struct hwrm_port_mac_cfg_input {\n \t */\n \t#define HWRM_PORT_MAC_CFG_INPUT_FLAGS_IP_DSCP2COS_DISABLE \\\n \t\tUINT32_C(0x1000)\n+\t/*\n+\t * When this bit is set to '1', and the ptp_tx_ts_capture_enable\n+\t * bit is set, then the device uses one step Tx timestamping.\n+\t * This bit is temporary and used for experimental purposes.\n+\t */\n+\t#define HWRM_PORT_MAC_CFG_INPUT_FLAGS_PTP_ONE_STEP_TX_TS \\\n+\t\tUINT32_C(0x2000)\n \tuint32_t\tenables;\n \t/*\n \t * This bit must be '1' for the ipg field to be\n@@ -13576,6 +13743,12 @@ struct hwrm_port_mac_cfg_input {\n \t */\n \t#define HWRM_PORT_MAC_CFG_INPUT_ENABLES_COS_FIELD_CFG \\\n \t\tUINT32_C(0x100)\n+\t/*\n+\t * This bit must be '1' for the ptp_freq_adj_ppb field to be\n+\t * configured.\n+\t */\n+\t#define HWRM_PORT_MAC_CFG_INPUT_ENABLES_PTP_FREQ_ADJ_PPB \\\n+\t\tUINT32_C(0x200)\n \t/* Port ID of port that is to be configured. */\n \tuint16_t\tport_id;\n \t/*\n@@ -13763,6 +13936,12 @@ struct hwrm_port_mac_cfg_input {\n \t#define HWRM_PORT_MAC_CFG_INPUT_COS_FIELD_CFG_DEFAULT_COS_SFT \\\n \t\t5\n \tuint8_t\tunused_0[3];\n+\t/*\n+\t * This signed field specifies by how much to adjust the frequency\n+\t * of sync timer updates (measured in parts per billion).\n+\t */\n+\tint32_t\tptp_freq_adj_ppb;\n+\tuint8_t\tunused_1[4];\n } __attribute__((packed));\n \n /* hwrm_port_mac_cfg_output (size:128b/16B) */\n@@ -13842,7 +14021,8 @@ struct hwrm_port_mac_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -14131,7 +14311,8 @@ struct hwrm_port_mac_ptp_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -14174,6 +14355,12 @@ struct hwrm_port_mac_ptp_qcfg_output {\n \t */\n \t#define HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_HWRM_ACCESS \\\n \t\tUINT32_C(0x2)\n+\t/*\n+\t * When this bit is set to '1', the device supports one-step\n+\t * Tx timestamping.\n+\t */\n+\t#define HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_ONE_STEP_TX_TS \\\n+\t\tUINT32_C(0x4)\n \tuint8_t\tunused_0[3];\n \t/* Offset of the PTP register for the lower 32 bits of timestamp for RX. */\n \tuint32_t\trx_ts_reg_off_lower;\n@@ -14595,7 +14782,8 @@ struct hwrm_port_qstats_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -14716,7 +14904,7 @@ struct tx_port_stats_ext {\n } __attribute__((packed));\n \n /* Port Rx Statistics extended Formats */\n-/* rx_port_stats_ext (size:2368b/296B) */\n+/* rx_port_stats_ext (size:3648b/456B) */\n struct rx_port_stats_ext {\n \t/* Number of times link state changed to down */\n \tuint64_t\tlink_down_events;\n@@ -14792,6 +14980,49 @@ struct rx_port_stats_ext {\n \tuint64_t\tpfc_pri7_rx_duration_us;\n \t/* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 7 */\n \tuint64_t\tpfc_pri7_rx_transitions;\n+\t/* Total number of received bits */\n+\tuint64_t\trx_bits;\n+\t/* The number of events where the port receive buffer was over 85% full */\n+\tuint64_t\trx_buffer_passed_threshold;\n+\t/*\n+\t * The number of symbol errors that wasn't corrected by FEC correction\n+\t * alogirithm\n+\t */\n+\tuint64_t\trx_pcs_symbol_err;\n+\t/* The number of corrected bits on the port according to active FEC */\n+\tuint64_t\trx_corrected_bits;\n+\t/* Total number of rx discard bytes count on cos queue 0 */\n+\tuint64_t\trx_discard_bytes_cos0;\n+\t/* Total number of rx discard bytes count on cos queue 1 */\n+\tuint64_t\trx_discard_bytes_cos1;\n+\t/* Total number of rx discard bytes count on cos queue 2 */\n+\tuint64_t\trx_discard_bytes_cos2;\n+\t/* Total number of rx discard bytes count on cos queue 3 */\n+\tuint64_t\trx_discard_bytes_cos3;\n+\t/* Total number of rx discard bytes count on cos queue 4 */\n+\tuint64_t\trx_discard_bytes_cos4;\n+\t/* Total number of rx discard bytes count on cos queue 5 */\n+\tuint64_t\trx_discard_bytes_cos5;\n+\t/* Total number of rx discard bytes count on cos queue 6 */\n+\tuint64_t\trx_discard_bytes_cos6;\n+\t/* Total number of rx discard bytes count on cos queue 7 */\n+\tuint64_t\trx_discard_bytes_cos7;\n+\t/* Total number of rx discard packets count on cos queue 0 */\n+\tuint64_t\trx_discard_packets_cos0;\n+\t/* Total number of rx discard packets count on cos queue 1 */\n+\tuint64_t\trx_discard_packets_cos1;\n+\t/* Total number of rx discard packets count on cos queue 2 */\n+\tuint64_t\trx_discard_packets_cos2;\n+\t/* Total number of rx discard packets count on cos queue 3 */\n+\tuint64_t\trx_discard_packets_cos3;\n+\t/* Total number of rx discard packets count on cos queue 4 */\n+\tuint64_t\trx_discard_packets_cos4;\n+\t/* Total number of rx discard packets count on cos queue 5 */\n+\tuint64_t\trx_discard_packets_cos5;\n+\t/* Total number of rx discard packets count on cos queue 6 */\n+\tuint64_t\trx_discard_packets_cos6;\n+\t/* Total number of rx discard packets count on cos queue 7 */\n+\tuint64_t\trx_discard_packets_cos7;\n } __attribute__((packed));\n \n /************************\n@@ -14817,7 +15048,8 @@ struct hwrm_port_qstats_ext_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -14909,7 +15141,8 @@ struct hwrm_port_lpbk_qstats_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -14986,7 +15219,8 @@ struct hwrm_port_clr_stats_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -15057,7 +15291,8 @@ struct hwrm_port_phy_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -15311,7 +15546,8 @@ struct hwrm_port_phy_mdio_write_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -15387,7 +15623,8 @@ struct hwrm_port_phy_mdio_read_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -15463,7 +15700,8 @@ struct hwrm_port_led_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -15886,7 +16124,8 @@ struct hwrm_port_led_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -16191,7 +16430,8 @@ struct hwrm_port_led_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -16519,6 +16759,137 @@ struct hwrm_port_led_qcaps_output {\n \tuint8_t\tvalid;\n } __attribute__((packed));\n \n+/***********************\n+ * hwrm_port_prbs_test *\n+ ***********************/\n+\n+\n+/* hwrm_port_prbs_test_input (size:384b/48B) */\n+struct hwrm_port_prbs_test_input {\n+\t/* The HWRM command request type. */\n+\tuint16_t\treq_type;\n+\t/*\n+\t * The completion ring to send the completion event on. This should\n+\t * be the NQ ID returned from the `nq_alloc` HWRM command.\n+\t */\n+\tuint16_t\tcmpl_ring;\n+\t/*\n+\t * The sequence ID is used by the driver for tracking multiple\n+\t * commands. This ID is treated as opaque data by the firmware and\n+\t * the value is returned in the `hwrm_resp_hdr` upon completion.\n+\t */\n+\tuint16_t\tseq_id;\n+\t/*\n+\t * The target ID of the command:\n+\t * * 0x0-0xFFF8 - The function ID\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n+\t * * 0xFFFF - HWRM\n+\t */\n+\tuint16_t\ttarget_id;\n+\t/*\n+\t * A physical address pointer pointing to a host buffer that the\n+\t * command's response data will be written. This can be either a host\n+\t * physical address (HPA) or a guest physical address (GPA) and must\n+\t * point to a physically contiguous block of memory.\n+\t */\n+\tuint64_t\tresp_addr;\n+\t/* Host address data is to DMA'd to. */\n+\tuint64_t\tresp_data_addr;\n+\t/*\n+\t * Size of the buffer pointed to by resp_data_addr. The firmware may\n+\t * use this entire buffer or less than the entire buffer, but never more.\n+\t */\n+\tuint16_t\tdata_len;\n+\tuint16_t\tunused_0;\n+\tuint32_t\tunused_1;\n+\t/* Port ID of port where PRBS test to be run. */\n+\tuint16_t\tport_id;\n+\t/* Polynomial selection for PRBS test. */\n+\tuint16_t\tpoly;\n+\t/* PRBS7 */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS7   UINT32_C(0x0)\n+\t/* PRBS9 */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS9   UINT32_C(0x1)\n+\t/* PRBS11 */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS11  UINT32_C(0x2)\n+\t/* PRBS15 */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS15  UINT32_C(0x3)\n+\t/* PRBS23 */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS23  UINT32_C(0x4)\n+\t/* PRBS31 */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS31  UINT32_C(0x5)\n+\t/* PRBS58 */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS58  UINT32_C(0x6)\n+\t/* Invalid */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_INVALID UINT32_C(0xff)\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_POLY_LAST \\\n+\t\tHWRM_PORT_PRBS_TEST_INPUT_POLY_INVALID\n+\t/*\n+\t * Configuration bits for PRBS test.\n+\t * Use enable bit to start/stop test.\n+\t * Use tx/rx lane map bits to run test on specific lanes,\n+\t * if set to 0 test will be run on all lanes.\n+\t */\n+\tuint16_t\tprbs_config;\n+\t/*\n+\t * Set 0 to stop test currently in progress\n+\t * Set 1 to start test with configuration provided.\n+\t */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_PRBS_CONFIG_START_STOP \\\n+\t\tUINT32_C(0x1)\n+\t/*\n+\t * If set to 1, tx_lane_map bitmap should have lane bits set.\n+\t * If set to 0, test will be run on all lanes for this port.\n+\t */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_PRBS_CONFIG_TX_LANE_MAP_VALID \\\n+\t\tUINT32_C(0x2)\n+\t/*\n+\t * If set to 1, rx_lane_map bitmap should have lane bits set.\n+\t * If set to 0, test will be run on all lanes for this port.\n+\t */\n+\t#define HWRM_PORT_PRBS_TEST_INPUT_PRBS_CONFIG_RX_LANE_MAP_VALID \\\n+\t\tUINT32_C(0x4)\n+\t/* Duration in seconds to run the PRBS test. */\n+\tuint16_t\ttimeout;\n+\t/*\n+\t * If tx_lane_map_valid is set to 1, this field is a bitmap\n+\t * of tx lanes to run PRBS test. bit0 = lane0,\n+\t * bit1 = lane1 ..bit31 = lane31\n+\t */\n+\tuint32_t\ttx_lane_map;\n+\t/*\n+\t * If rx_lane_map_valid is set to 1, this field is a bitmap\n+\t * of rx lanes to run PRBS test. bit0 = lane0,\n+\t * bit1 = lane1 ..bit31 = lane31\n+\t */\n+\tuint32_t\trx_lane_map;\n+} __attribute__((packed));\n+\n+/* hwrm_port_prbs_test_output (size:128b/16B) */\n+struct hwrm_port_prbs_test_output {\n+\t/* The specific error status for the command. */\n+\tuint16_t\terror_code;\n+\t/* The HWRM command request type. */\n+\tuint16_t\treq_type;\n+\t/* The sequence ID from the original command. */\n+\tuint16_t\tseq_id;\n+\t/* The length of the response data in number of bytes. */\n+\tuint16_t\tresp_len;\n+\t/* Total length of stored data. */\n+\tuint16_t\ttotal_data_len;\n+\tuint16_t\tunused_0;\n+\tuint8_t\tunused_1[3];\n+\t/*\n+\t * This field is used in Output records to indicate that the output\n+\t * is completely written to RAM.  This field should be read as '1'\n+\t * to indicate that the output has been completely written.\n+\t * When writing a command completion or response to an internal processor,\n+\t * the order of writes has to be such that this field is written last.\n+\t */\n+\tuint8_t\tvalid;\n+} __attribute__((packed));\n+\n /***********************\n  * hwrm_queue_qportcfg *\n  ***********************/\n@@ -16542,7 +16913,8 @@ struct hwrm_queue_qportcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -16994,7 +17366,8 @@ struct hwrm_queue_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -17091,7 +17464,8 @@ struct hwrm_queue_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -17194,7 +17568,8 @@ struct hwrm_queue_pfcenable_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -17283,7 +17658,8 @@ struct hwrm_queue_pfcenable_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -17372,7 +17748,8 @@ struct hwrm_queue_pri2cos_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -17522,7 +17899,8 @@ struct hwrm_queue_pri2cos_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -17698,7 +18076,8 @@ struct hwrm_queue_cos2bw_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -18740,7 +19119,8 @@ struct hwrm_queue_cos2bw_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -19831,7 +20211,8 @@ struct hwrm_vnic_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -19897,7 +20278,8 @@ struct hwrm_vnic_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -19957,7 +20339,8 @@ struct hwrm_vnic_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -20172,7 +20555,8 @@ struct hwrm_vnic_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -20327,7 +20711,8 @@ struct hwrm_vnic_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -20419,7 +20804,13 @@ struct hwrm_vnic_qcaps_output {\n \t */\n \t#define HWRM_VNIC_QCAPS_OUTPUT_FLAGS_OUTERMOST_RSS_CAP \\\n \t\tUINT32_C(0x80)\n-\tuint8_t\tunused_1[7];\n+\t/*\n+\t * This field advertises the maximum concurrent TPA aggregations\n+\t * supported by the VNIC on new devices that support TPA v2.\n+\t * '0' means that TPA v2 is not supported.\n+\t */\n+\tuint16_t\tmax_aggs_supported;\n+\tuint8_t\tunused_1[5];\n \t/*\n \t * This field is used in Output records to indicate that the output\n \t * is completely written to RAM.  This field should be read as '1'\n@@ -20453,7 +20844,8 @@ struct hwrm_vnic_tpa_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -20529,6 +20921,15 @@ struct hwrm_vnic_tpa_cfg_input {\n \t */\n \t#define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_TTL_CHECK \\\n \t\tUINT32_C(0x80)\n+\t/*\n+\t * When this bit is '1' and the GRO mode is enabled,\n+\t * the VNIC shall DMA payload data using GRO rules.\n+\t * When this bit is '0', the VNIC shall DMA payload data\n+\t * using the more efficient LRO rules of filling all\n+\t * aggregation buffers.\n+\t */\n+\t#define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_PACK_AS_GRO \\\n+\t\tUINT32_C(0x100)\n \tuint32_t\tenables;\n \t/*\n \t * This bit must be '1' for the max_agg_segs field to be\n@@ -20545,16 +20946,15 @@ struct hwrm_vnic_tpa_cfg_input {\n \t * configured.\n \t */\n \t#define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER     UINT32_C(0x4)\n-\t/*\n-\t * This bit must be '1' for the min_agg_len field to be\n-\t * configured.\n-\t */\n+\t/* deprecated bit.  Do not use!!! */\n \t#define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN       UINT32_C(0x8)\n \t/* Logical vnic ID */\n \tuint16_t\tvnic_id;\n \t/*\n \t * This is the maximum number of TCP segments that can\n-\t * be aggregated (unit is Log2). Max value is 31.\n+\t * be aggregated (unit is Log2). Max value is 31. On new\n+\t * devices supporting TPA v2, the unit is multiples of 4 and\n+\t * valid values are > 0 and <= 63.\n \t */\n \tuint16_t\tmax_agg_segs;\n \t/* 1 segment */\n@@ -20571,7 +20971,10 @@ struct hwrm_vnic_tpa_cfg_input {\n \t\tHWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX\n \t/*\n \t * This is the maximum number of aggregations this VNIC is\n-\t * allowed (unit is Log2). Max value is 7\n+\t * allowed (unit is Log2). Max value is 7. On new devices\n+\t * supporting TPA v2, this is in unit of 1 and must be > 0\n+\t * and <= max_aggs_supported in the hwrm_vnic_qcaps response\n+\t * to enable TPA v2.\n \t */\n \tuint16_t\tmax_aggs;\n \t/* 1 aggregation */\n@@ -20596,7 +20999,9 @@ struct hwrm_vnic_tpa_cfg_input {\n \tuint32_t\tmax_agg_timer;\n \t/*\n \t * This is the minimum amount of payload length required to\n-\t * start an aggregation context.\n+\t * start an aggregation context. This field is deprecated and\n+\t * should be set to 0.  The minimum length is set by firmware\n+\t * and can be queried using hwrm_vnic_tpa_qcfg.\n \t */\n \tuint32_t\tmin_agg_len;\n } __attribute__((packed));\n@@ -20645,7 +21050,8 @@ struct hwrm_vnic_rss_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -20795,7 +21201,8 @@ struct hwrm_vnic_rss_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -20937,7 +21344,8 @@ struct hwrm_vnic_plcmodes_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -21100,7 +21508,8 @@ struct hwrm_vnic_plcmodes_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -21228,7 +21637,8 @@ struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -21287,7 +21697,8 @@ struct hwrm_vnic_rss_cos_lb_ctx_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -21347,7 +21758,8 @@ struct hwrm_ring_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -21687,7 +22099,8 @@ struct hwrm_ring_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -21764,7 +22177,8 @@ struct hwrm_ring_reset_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -21839,7 +22253,8 @@ struct hwrm_ring_aggint_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -21988,7 +22403,8 @@ struct hwrm_ring_cmpl_ring_qaggint_params_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -22094,7 +22510,8 @@ struct hwrm_ring_cmpl_ring_cfg_aggint_params_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -22250,7 +22667,8 @@ struct hwrm_ring_grp_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -22334,7 +22752,8 @@ struct hwrm_ring_grp_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -22414,7 +22833,8 @@ struct hwrm_cfa_l2_filter_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -22476,6 +22896,22 @@ struct hwrm_cfa_l2_filter_alloc_input {\n \t\t(UINT32_C(0x2) << 4)\n \t#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_TRAFFIC_LAST \\\n \t\tHWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_TRAFFIC_ROCE\n+\t/*\n+\t * Setting of this flag indicates that no XDP filter is created with\n+\t * L2 filter.\n+\t * 0 - legacy behavior, XDP filter is created with L2 filter\n+\t * 1 - XDP filter won't be created with L2 filter\n+\t */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_XDP_DISABLE \\\n+\t\tUINT32_C(0x40)\n+\t/*\n+\t * Setting this flag to 1 indicate the L2 fields in this command\n+\t * pertain to source fields.  Setting this flag to 0 indicate the\n+\t * L2 fields in this command pertain to the destination fields\n+\t * and this is the default/legacy behavior.\n+\t */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_SOURCE_VALID \\\n+\t\tUINT32_C(0x80)\n \tuint32_t\tenables;\n \t/*\n \t * This bit must be '1' for the l2_addr field to be\n@@ -22579,13 +23015,31 @@ struct hwrm_cfa_l2_filter_alloc_input {\n \t */\n \t#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \\\n \t\tUINT32_C(0x10000)\n+\t/*\n+\t * This bit must be '1' for the num_vlans field to be\n+\t * configured.\n+\t */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_NUM_VLANS \\\n+\t\tUINT32_C(0x20000)\n+\t/*\n+\t * This bit must be '1' for the t_num_vlans field to be\n+\t * configured.\n+\t */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_NUM_VLANS \\\n+\t\tUINT32_C(0x40000)\n \t/*\n \t * This value sets the match value for the L2 MAC address.\n \t * Destination MAC address for RX path.\n \t * Source MAC address for TX path.\n \t */\n \tuint8_t\tl2_addr[6];\n-\tuint8_t\tunused_0[2];\n+\t/* This value sets the match value for the number of VLANs. */\n+\tuint8_t\tnum_vlans;\n+\t/*\n+\t * This value sets the match value for the number of VLANs\n+\t * in the tunnel headers.\n+\t */\n+\tuint8_t\tt_num_vlans;\n \t/*\n \t * This value sets the mask value for the L2 address.\n \t * A value of 0 will mask the corresponding bit from\n@@ -22784,13 +23238,45 @@ struct hwrm_cfa_l2_filter_alloc_output {\n \t */\n \tuint64_t\tl2_filter_id;\n \t/*\n-\t * This is the ID of the flow associated with this\n-\t * filter.\n-\t * This value shall be used to match and associate the\n-\t * flow identifier returned in completion records.\n-\t * A value of 0xFFFFFFFF shall indicate no flow id.\n+\t * The flow id value in bit 0-29 is the actual ID of the flow\n+\t * associated with this filter and it shall be used to match\n+\t * and associate the flow identifier returned in completion\n+\t * records. A value of 0xFFFFFFFF in the 32-bit flow_id field\n+\t * shall indicate no valid flow id.\n \t */\n \tuint32_t\tflow_id;\n+\t/* Indicate the flow id value. */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \\\n+\t\tUINT32_C(0x3fffffff)\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0\n+\t/* Indicate type of the flow. */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE \\\n+\t\tUINT32_C(0x40000000)\n+\t/*\n+\t * If this bit set to 0, then it indicates that the flow is\n+\t * internal flow.\n+\t */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \\\n+\t\t(UINT32_C(0x0) << 30)\n+\t/*\n+\t * If this bit is set to 1, then it indicates that the flow is\n+\t * external flow.\n+\t */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \\\n+\t\t(UINT32_C(0x1) << 30)\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \\\n+\t\tHWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT\n+\t/* Indicate the flow direction. */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR \\\n+\t\tUINT32_C(0x80000000)\n+\t/* If this bit set to 0, then it indicates rx flow. */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_RX \\\n+\t\t(UINT32_C(0x0) << 31)\n+\t/* If this bit is set to 1, then it indicates that tx flow. */\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX \\\n+\t\t(UINT32_C(0x1) << 31)\n+\t#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \\\n+\t\tHWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX\n \tuint8_t\tunused_0[3];\n \t/*\n \t * This field is used in Output records to indicate that the output\n@@ -22825,7 +23311,8 @@ struct hwrm_cfa_l2_filter_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -22887,7 +23374,8 @@ struct hwrm_cfa_l2_filter_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -23014,7 +23502,8 @@ struct hwrm_cfa_l2_set_rx_mask_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -23213,7 +23702,8 @@ struct hwrm_cfa_vlan_antispoof_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -23287,7 +23777,8 @@ struct hwrm_cfa_vlan_antispoof_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -23366,7 +23857,8 @@ struct hwrm_cfa_tunnel_filter_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -23602,13 +24094,45 @@ struct hwrm_cfa_tunnel_filter_alloc_output {\n \t/* This value is an opaque id into CFA data structures. */\n \tuint64_t\ttunnel_filter_id;\n \t/*\n-\t * This is the ID of the flow associated with this\n-\t * filter.\n-\t * This value shall be used to match and associate the\n-\t * flow identifier returned in completion records.\n-\t * A value of 0xFFFFFFFF shall indicate no flow id.\n+\t * The flow id value in bit 0-29 is the actual ID of the flow\n+\t * associated with this filter and it shall be used to match\n+\t * and associate the flow identifier returned in completion\n+\t * records. A value of 0xFFFFFFFF in the 32-bit flow_id field\n+\t * shall indicate no valid flow id.\n \t */\n \tuint32_t\tflow_id;\n+\t/* Indicate the flow id value. */\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \\\n+\t\tUINT32_C(0x3fffffff)\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0\n+\t/* Indicate type of the flow. */\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE \\\n+\t\tUINT32_C(0x40000000)\n+\t/*\n+\t * If this bit set to 0, then it indicates that the flow is\n+\t * internal flow.\n+\t */\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \\\n+\t\t(UINT32_C(0x0) << 30)\n+\t/*\n+\t * If this bit is set to 1, then it indicates that the flow is\n+\t * external flow.\n+\t */\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \\\n+\t\t(UINT32_C(0x1) << 30)\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \\\n+\t\tHWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT\n+\t/* Indicate the flow direction. */\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR \\\n+\t\tUINT32_C(0x80000000)\n+\t/* If this bit set to 0, then it indicates rx flow. */\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_RX \\\n+\t\t(UINT32_C(0x0) << 31)\n+\t/* If this bit is set to 1, then it indicates that tx flow. */\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX \\\n+\t\t(UINT32_C(0x1) << 31)\n+\t#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \\\n+\t\tHWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX\n \tuint8_t\tunused_0[3];\n \t/*\n \t * This field is used in Output records to indicate that the output\n@@ -23643,7 +24167,8 @@ struct hwrm_cfa_tunnel_filter_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -23702,7 +24227,8 @@ struct hwrm_cfa_redirect_tunnel_type_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -23813,7 +24339,8 @@ struct hwrm_cfa_redirect_tunnel_type_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -23919,7 +24446,8 @@ struct hwrm_cfa_redirect_tunnel_type_info_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -24134,7 +24662,8 @@ struct hwrm_cfa_encap_record_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -24247,7 +24776,8 @@ struct hwrm_cfa_encap_record_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -24289,7 +24819,7 @@ struct hwrm_cfa_encap_record_free_output {\n  ********************************/\n \n \n-/* hwrm_cfa_ntuple_filter_alloc_input (size:1024b/128B) */\n+/* hwrm_cfa_ntuple_filter_alloc_input (size:1088b/136B) */\n struct hwrm_cfa_ntuple_filter_alloc_input {\n \t/* The HWRM command request type. */\n \tuint16_t\treq_type;\n@@ -24307,7 +24837,8 @@ struct hwrm_cfa_ntuple_filter_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -24456,6 +24987,12 @@ struct hwrm_cfa_ntuple_filter_alloc_input {\n \t */\n \t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR \\\n \t\tUINT32_C(0x40000)\n+\t/*\n+\t * This bit must be '1' for the rfs_ring_tbl_idx field to be\n+\t * configured.\n+\t */\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_RFS_RING_TBL_IDX \\\n+\t\tUINT32_C(0x80000)\n \t/*\n \t * This value identifies a set of CFA data structures used for an L2\n \t * context.\n@@ -24639,6 +25176,13 @@ struct hwrm_cfa_ntuple_filter_alloc_input {\n \t * the pri_hint.\n \t */\n \tuint64_t\tntuple_filter_id_hint;\n+\t/*\n+\t * The value of rfs_ring_tbl_idx to be used for RFS for this filter.\n+\t * This index is used in lieu of the RSS hash when selecting the\n+\t * index into the RSS table to determine the rx ring.\n+\t */\n+\tuint16_t\trfs_ring_tbl_idx;\n+\tuint8_t\tunused_0[6];\n } __attribute__((packed));\n \n /* hwrm_cfa_ntuple_filter_alloc_output (size:192b/24B) */\n@@ -24654,13 +25198,45 @@ struct hwrm_cfa_ntuple_filter_alloc_output {\n \t/* This value is an opaque id into CFA data structures. */\n \tuint64_t\tntuple_filter_id;\n \t/*\n-\t * This is the ID of the flow associated with this\n-\t * filter.\n-\t * This value shall be used to match and associate the\n-\t * flow identifier returned in completion records.\n-\t * A value of 0xFFFFFFFF shall indicate no flow id.\n+\t * The flow id value in bit 0-29 is the actual ID of the flow\n+\t * associated with this filter and it shall be used to match\n+\t * and associate the flow identifier returned in completion\n+\t * records. A value of 0xFFFFFFFF in the 32-bit flow_id field\n+\t * shall indicate no valid flow id.\n \t */\n \tuint32_t\tflow_id;\n+\t/* Indicate the flow id value. */\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \\\n+\t\tUINT32_C(0x3fffffff)\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0\n+\t/* Indicate type of the flow. */\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE \\\n+\t\tUINT32_C(0x40000000)\n+\t/*\n+\t * If this bit set to 0, then it indicates that the flow is\n+\t * internal flow.\n+\t */\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \\\n+\t\t(UINT32_C(0x0) << 30)\n+\t/*\n+\t * If this bit is set to 1, then it indicates that the flow is\n+\t * external flow.\n+\t */\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \\\n+\t\t(UINT32_C(0x1) << 30)\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \\\n+\t\tHWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT\n+\t/* Indicate the flow direction. */\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR \\\n+\t\tUINT32_C(0x80000000)\n+\t/* If this bit set to 0, then it indicates rx flow. */\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_RX \\\n+\t\t(UINT32_C(0x0) << 31)\n+\t/* If this bit is set to 1, then it indicates that tx flow. */\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX \\\n+\t\t(UINT32_C(0x1) << 31)\n+\t#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \\\n+\t\tHWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX\n \tuint8_t\tunused_0[3];\n \t/*\n \t * This field is used in Output records to indicate that the output\n@@ -24713,7 +25289,8 @@ struct hwrm_cfa_ntuple_filter_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -24772,7 +25349,8 @@ struct hwrm_cfa_ntuple_filter_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -24884,7 +25462,8 @@ struct hwrm_cfa_em_flow_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -25216,13 +25795,45 @@ struct hwrm_cfa_em_flow_alloc_output {\n \t/* This value is an opaque id into CFA data structures. */\n \tuint64_t\tem_filter_id;\n \t/*\n-\t * This is the ID of the flow associated with this\n-\t * filter.\n-\t * This value shall be used to match and associate the\n-\t * flow identifier returned in completion records.\n-\t * A value of 0xFFFFFFFF shall indicate no flow id.\n+\t * The flow id value in bit 0-29 is the actual ID of the flow\n+\t * associated with this filter and it shall be used to match\n+\t * and associate the flow identifier returned in completion\n+\t * records. A value of 0xFFFFFFFF in the 32-bit flow_id field\n+\t * shall indicate no valid flow id.\n \t */\n \tuint32_t\tflow_id;\n+\t/* Indicate the flow id value. */\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \\\n+\t\tUINT32_C(0x3fffffff)\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0\n+\t/* Indicate type of the flow. */\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE \\\n+\t\tUINT32_C(0x40000000)\n+\t/*\n+\t * If this bit set to 0, then it indicates that the flow is\n+\t * internal flow.\n+\t */\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \\\n+\t\t(UINT32_C(0x0) << 30)\n+\t/*\n+\t * If this bit is set to 1, then it indicates that the flow is\n+\t * external flow.\n+\t */\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \\\n+\t\t(UINT32_C(0x1) << 30)\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \\\n+\t\tHWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT\n+\t/* Indicate the flow direction. */\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR \\\n+\t\tUINT32_C(0x80000000)\n+\t/* If this bit set to 0, then it indicates rx flow. */\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_RX \\\n+\t\t(UINT32_C(0x0) << 31)\n+\t/* If this bit is set to 1, then it indicates that tx flow. */\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_TX \\\n+\t\t(UINT32_C(0x1) << 31)\n+\t#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \\\n+\t\tHWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_TX\n \tuint8_t\tunused_0[3];\n \t/*\n \t * This field is used in Output records to indicate that the output\n@@ -25257,7 +25868,8 @@ struct hwrm_cfa_em_flow_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -25316,7 +25928,8 @@ struct hwrm_cfa_meter_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -25428,7 +26041,8 @@ struct hwrm_cfa_meter_profile_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -25705,7 +26319,8 @@ struct hwrm_cfa_meter_profile_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -25789,7 +26404,8 @@ struct hwrm_cfa_meter_profile_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -26059,7 +26675,8 @@ struct hwrm_cfa_meter_instance_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -26154,7 +26771,8 @@ struct hwrm_cfa_meter_instance_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -26246,7 +26864,8 @@ struct hwrm_cfa_meter_instance_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -26330,7 +26949,8 @@ struct hwrm_cfa_decap_filter_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -26654,7 +27274,8 @@ struct hwrm_cfa_decap_filter_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -26714,7 +27335,8 @@ struct hwrm_cfa_flow_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -26847,6 +27469,15 @@ struct hwrm_cfa_flow_alloc_input {\n \t */\n \t#define HWRM_CFA_FLOW_ALLOC_INPUT_ACTION_FLAGS_PRI_HINT \\\n \t\tUINT32_C(0x1000)\n+\t/*\n+\t * If set to 1 there will be no attempt to allocate an on-chip try to\n+\t * offload this flow. If set to 0, which will keep compatibility with the\n+\t * older drivers, will cause the FW to attempt to allocate an on-chip flow\n+\t * counter for the newly created flow.  This will keep the existing behavior\n+\t * with EM flows which always had an associated flow counter.\n+\t */\n+\t#define HWRM_CFA_FLOW_ALLOC_INPUT_ACTION_FLAGS_NO_FLOW_COUNTER_ALLOC \\\n+\t\tUINT32_C(0x2000)\n \t/*\n \t * Tx Flow: pf or vf fid.\n \t * Rx Flow: vf fid.\n@@ -26977,13 +27608,45 @@ struct hwrm_cfa_flow_alloc_output {\n \tuint16_t\tflow_handle;\n \tuint8_t\tunused_0[2];\n \t/*\n-\t * This is the ID of the flow associated with this\n-\t * filter.\n-\t * This value shall be used to match and associate the\n-\t * flow identifier returned in completion records.\n-\t * A value of 0xFFFFFFFF shall indicate no flow id.\n+\t * The flow id value in bit 0-29 is the actual ID of the flow\n+\t * associated with this filter and it shall be used to match\n+\t * and associate the flow identifier returned in completion\n+\t * records. A value of 0xFFFFFFFF in the 32-bit flow_id field\n+\t * shall indicate no valid flow id.\n \t */\n \tuint32_t\tflow_id;\n+\t/* Indicate the flow id value. */\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \\\n+\t\tUINT32_C(0x3fffffff)\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0\n+\t/* Indicate type of the flow. */\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE \\\n+\t\tUINT32_C(0x40000000)\n+\t/*\n+\t * If this bit set to 0, then it indicates that the flow is\n+\t * internal flow.\n+\t */\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \\\n+\t\t(UINT32_C(0x0) << 30)\n+\t/*\n+\t * If this bit is set to 1, then it indicates that the flow is\n+\t * external flow.\n+\t */\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \\\n+\t\t(UINT32_C(0x1) << 30)\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \\\n+\t\tHWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT\n+\t/* Indicate the flow direction. */\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR \\\n+\t\tUINT32_C(0x80000000)\n+\t/* If this bit set to 0, then it indicates rx flow. */\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_RX \\\n+\t\t(UINT32_C(0x0) << 31)\n+\t/* If this bit is set to 1, then it indicates that tx flow. */\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_TX \\\n+\t\t(UINT32_C(0x1) << 31)\n+\t#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \\\n+\t\tHWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_TX\n \t/* This value identifies a set of CFA data structures used for a flow. */\n \tuint64_t\text_flow_handle;\n \tuint32_t\tflow_counter_id;\n@@ -26998,6 +27661,34 @@ struct hwrm_cfa_flow_alloc_output {\n \tuint8_t\tvalid;\n } __attribute__((packed));\n \n+/* hwrm_cfa_flow_alloc_cmd_err (size:64b/8B) */\n+struct hwrm_cfa_flow_alloc_cmd_err {\n+\t/*\n+\t * command specific error codes that goes to\n+\t * the cmd_err field in Common HWRM Error Response.\n+\t */\n+\tuint8_t\tcode;\n+\t/* Unknown error */\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_UNKNOWN         UINT32_C(0x0)\n+\t/* No more L2 Context TCAM */\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_L2_CONTEXT_TCAM UINT32_C(0x1)\n+\t/* No more action records */\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_ACTION_RECORD   UINT32_C(0x2)\n+\t/* No more flow counters */\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_COUNTER    UINT32_C(0x3)\n+\t/* No more wild-card TCAM */\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_WILD_CARD_TCAM  UINT32_C(0x4)\n+\t/* Hash collsion in exact match tables */\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_HASH_COLLISION  UINT32_C(0x5)\n+\t/* Key is already installed */\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_KEY_EXISTS      UINT32_C(0x6)\n+\t/* Flow Context DB is out of resource */\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_CTXT_DB    UINT32_C(0x7)\n+\t#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_LAST \\\n+\t\tHWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_CTXT_DB\n+\tuint8_t\tunused_0[7];\n+} __attribute__((packed));\n+\n /**********************\n  * hwrm_cfa_flow_free *\n  **********************/\n@@ -27021,7 +27712,8 @@ struct hwrm_cfa_flow_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -27034,7 +27726,9 @@ struct hwrm_cfa_flow_free_input {\n \tuint64_t\tresp_addr;\n \t/* Flow record index. */\n \tuint16_t\tflow_handle;\n-\tuint8_t\tunused_0[6];\n+\tuint16_t\tunused_0;\n+\t/* Flow counter id to be freed. */\n+\tuint32_t\tflow_counter_id;\n \t/* This value identifies a set of CFA data structures used for a flow. */\n \tuint64_t\text_flow_handle;\n } __attribute__((packed));\n@@ -27310,7 +28004,8 @@ struct hwrm_cfa_flow_info_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -27420,7 +28115,8 @@ struct hwrm_cfa_flow_flush_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -27448,6 +28144,9 @@ struct hwrm_cfa_flow_flush_input {\n \t */\n \t#define HWRM_CFA_FLOW_FLUSH_INPUT_FLAGS_FLOW_RESET_ALL \\\n \t\tUINT32_C(0x2)\n+\t/* Set to 1 to indicate the flow counter IDs are included in the flow table. */\n+\t#define HWRM_CFA_FLOW_FLUSH_INPUT_FLAGS_FLOW_HANDLE_INCL_FC \\\n+\t\tUINT32_C(0x8000000)\n \t/*\n \t * This specifies the size of flow handle entries provided by the driver\n \t * in the flow table specified below. Only two flow handle size enums are defined.\n@@ -27544,7 +28243,8 @@ struct hwrm_cfa_flow_stats_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -27684,7 +28384,8 @@ struct hwrm_cfa_flow_aging_timer_reset_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -27733,7 +28434,7 @@ struct hwrm_cfa_flow_aging_timer_reset_output {\n  ***************************/\n \n \n-/* hwrm_cfa_flow_aging_cfg_input (size:256b/32B) */\n+/* hwrm_cfa_flow_aging_cfg_input (size:384b/48B) */\n struct hwrm_cfa_flow_aging_cfg_input {\n \t/* The HWRM command request type. */\n \tuint16_t\treq_type;\n@@ -27751,7 +28452,8 @@ struct hwrm_cfa_flow_aging_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -27773,16 +28475,40 @@ struct hwrm_cfa_flow_aging_cfg_input {\n \t/* This bit must be '1' for the udp flow timer field to be configured */\n \t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_UDP_FLOW_TIMER \\\n \t\tUINT32_C(0x4)\n-\t/* The direction for the flow aging configuration, 1 is rx path, 2 is tx path. */\n+\t/* This bit must be '1' for the eem dma interval field to be configured */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_DMA_INTERVAL \\\n+\t\tUINT32_C(0x8)\n+\t/* This bit must be '1' for the eem notice interval field to be configured */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_NOTICE_INTERVAL \\\n+\t\tUINT32_C(0x10)\n+\t/* This bit must be '1' for the eem context memory maximum entries field to be configured */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_CTX_MAX_ENTRIES \\\n+\t\tUINT32_C(0x20)\n+\t/* This bit must be '1' for the eem context memory ID field to be configured */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_CTX_ID \\\n+\t\tUINT32_C(0x40)\n+\t/* This bit must be '1' for the eem context memory type field to be configured */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_CTX_MEM_TYPE \\\n+\t\tUINT32_C(0x80)\n \tuint8_t\tflags;\n \t/* Enumeration denoting the RX, TX type of the resource. */\n-\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH     UINT32_C(0x1)\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH       UINT32_C(0x1)\n \t/* tx path */\n-\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_TX    UINT32_C(0x0)\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_TX      UINT32_C(0x0)\n \t/* rx path */\n-\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_RX    UINT32_C(0x1)\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_RX      UINT32_C(0x1)\n \t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_LAST \\\n \t\tHWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_RX\n+\t/* Enumeration denoting the enable, disable eem flow aging configuration. */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM        UINT32_C(0x2)\n+\t/* tx path */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM_DISABLE \\\n+\t\t(UINT32_C(0x0) << 1)\n+\t/* rx path */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM_ENABLE \\\n+\t\t(UINT32_C(0x1) << 1)\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM_LAST \\\n+\t\tHWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM_ENABLE\n \tuint8_t\tunused_0;\n \t/* The flow aging timer for all TCP flows, the unit is 100 milliseconds. */\n \tuint32_t\ttcp_flow_timer;\n@@ -27790,6 +28516,21 @@ struct hwrm_cfa_flow_aging_cfg_input {\n \tuint32_t\ttcp_fin_timer;\n \t/* The flow aging timer for all UDP flows, the unit is 100 milliseconds. */\n \tuint32_t\tudp_flow_timer;\n+\t/* The interval to dma eem ejection data to host memory, the unit is milliseconds. */\n+\tuint16_t\teem_dma_interval;\n+\t/* The interval to notify driver to read the eem ejection data, the unit is milliseconds. */\n+\tuint16_t\teem_notice_interval;\n+\t/* The maximum entries number in the eem context memory. */\n+\tuint32_t\teem_ctx_max_entries;\n+\t/* The context memory ID for eem flow aging. */\n+\tuint16_t\teem_ctx_id;\n+\tuint16_t\teem_ctx_mem_type;\n+\t/* The content of context memory is eem ejection data, the size of each entry is 4 bytes. */\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_EEM_CTX_MEM_TYPE_EJECTION_DATA \\\n+\t\tUINT32_C(0x0)\n+\t#define HWRM_CFA_FLOW_AGING_CFG_INPUT_EEM_CTX_MEM_TYPE_LAST \\\n+\t\tHWRM_CFA_FLOW_AGING_CFG_INPUT_EEM_CTX_MEM_TYPE_EJECTION_DATA\n+\tuint8_t\tunused_1[4];\n } __attribute__((packed));\n \n /* hwrm_cfa_flow_aging_cfg_output (size:128b/16B) */\n@@ -27836,7 +28577,8 @@ struct hwrm_cfa_flow_aging_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -27860,7 +28602,7 @@ struct hwrm_cfa_flow_aging_qcfg_input {\n \tuint8_t\tunused_0[7];\n } __attribute__((packed));\n \n-/* hwrm_cfa_flow_aging_qcfg_output (size:192b/24B) */\n+/* hwrm_cfa_flow_aging_qcfg_output (size:320b/40B) */\n struct hwrm_cfa_flow_aging_qcfg_output {\n \t/* The specific error status for the command. */\n \tuint16_t\terror_code;\n@@ -27876,7 +28618,17 @@ struct hwrm_cfa_flow_aging_qcfg_output {\n \tuint32_t\ttcp_fin_timer;\n \t/* The current flow aging timer for all UDP flows, the unit is 100 millisecond. */\n \tuint32_t\tudp_flow_timer;\n-\tuint8_t\tunused_0[3];\n+\t/* The interval to dma eem ejection data to host memory, the unit is milliseconds. */\n+\tuint16_t\teem_dma_interval;\n+\t/* The interval to notify driver to read the eem ejection data, the unit is milliseconds. */\n+\tuint16_t\teem_notice_interval;\n+\t/* The maximum entries number in the eem context memory. */\n+\tuint32_t\teem_ctx_max_entries;\n+\t/* The context memory ID for eem flow aging. */\n+\tuint16_t\teem_ctx_id;\n+\t/* The context memory type for eem flow aging. */\n+\tuint16_t\teem_ctx_mem_type;\n+\tuint8_t\tunused_0[7];\n \t/*\n \t * This field is used in Output records to indicate that the output\n \t * is completely written to RAM.  This field should be read as '1'\n@@ -27910,7 +28662,8 @@ struct hwrm_cfa_flow_aging_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -27986,7 +28739,8 @@ struct hwrm_cfa_tcp_flag_process_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28051,7 +28805,8 @@ struct hwrm_cfa_pair_info_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28171,7 +28926,8 @@ struct hwrm_cfa_redirect_query_tunnel_type_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28275,7 +29031,8 @@ struct hwrm_cfa_ctx_mem_rgtr_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28371,7 +29128,8 @@ struct hwrm_cfa_ctx_mem_unrgtr_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28434,7 +29192,8 @@ struct hwrm_cfa_ctx_mem_qctx_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28531,7 +29290,8 @@ struct hwrm_cfa_ctx_mem_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28582,7 +29342,8 @@ struct hwrm_cfa_eem_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28630,13 +29391,31 @@ struct hwrm_cfa_eem_qcaps_output {\n \t * which are to be offloaded.\n \t * Note if this bit is set then the path_rx bit can't be set.\n \t */\n-\t#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_PATH_TX     UINT32_C(0x1)\n+\t#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_PATH_TX \\\n+\t\tUINT32_C(0x1)\n \t/*\n \t * When set to 1, indicates the configuration will apply to RX flows\n \t * which are to be offloaded.\n \t * Note if this bit is set then the path_tx bit can't be set.\n \t */\n-\t#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_PATH_RX     UINT32_C(0x2)\n+\t#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_PATH_RX \\\n+\t\tUINT32_C(0x2)\n+\t/*\n+\t * When set to 1, indicates the the FW supports the Centralized\n+\t * Memory Model.  The concept designates one entity for the\n+\t * memory allocation while all others ‘subscribe’ to it.\n+\t */\n+\t#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_CENTRALIZED_MEMORY_MODEL_SUPPORTED \\\n+\t\tUINT32_C(0x4)\n+\t/*\n+\t * When set to 1, indicates the the FW supports the Detached\n+\t * Centralized Memory Model.  The memory is allocated and managed\n+\t * as a separate entity.  All PFs and VFs will be granted direct\n+\t * or semi-direct access to the allocated memory while none of\n+\t * which can interfere with the management of the memory.\n+\t */\n+\t#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_DETACHED_CENTRALIZED_MEMORY_MODEL_SUPPORTED \\\n+\t\tUINT32_C(0x8)\n \tuint32_t\tunused_0;\n \tuint32_t\tsupported;\n \t/*\n@@ -28712,7 +29491,8 @@ struct hwrm_cfa_eem_cfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28741,7 +29521,15 @@ struct hwrm_cfa_eem_cfg_input {\n \t/* When set to 1, all offloaded flows will be sent to EEM. */\n \t#define HWRM_CFA_EEM_CFG_INPUT_FLAGS_PREFERRED_OFFLOAD \\\n \t\tUINT32_C(0x4)\n-\tuint32_t\tunused_0;\n+\t/* When set to 1, secondary, 0 means primary. */\n+\t#define HWRM_CFA_EEM_CFG_INPUT_FLAGS_SECONDARY_PF \\\n+\t\tUINT32_C(0x8)\n+\t/*\n+\t * Group_id which used by Firmware to identify memory pools belonging\n+\t * to certain group.\n+\t */\n+\tuint16_t\tgroup_id;\n+\tuint16_t\tunused_0;\n \t/*\n \t * Configured EEM with the given number of entries.  All the EEM tables KEY0, KEY1,\n \t * RECORD, EFC all have the same number of entries and all tables will be configured\n@@ -28803,7 +29591,8 @@ struct hwrm_cfa_eem_qcfg_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28878,7 +29667,8 @@ struct hwrm_cfa_eem_op_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -28974,7 +29764,8 @@ struct hwrm_cfa_adv_flow_mgnt_qcaps_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29045,6 +29836,42 @@ struct hwrm_cfa_adv_flow_mgnt_qcaps_output {\n \t */\n \t#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_RX_EEM_FLOW_SUPPORTED \\\n \t\tUINT32_C(0x40)\n+\t/*\n+\t * Value of 1 to indicate that firmware supports the dynamic allocation of an\n+\t * on-chip flow counter which can be used for EEM flows.\n+\t * Value of 0 indicates firmware does not support the dynamic allocation of an\n+\t * on-chip flow counter.\n+\t */\n+\t#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_FLOW_COUNTER_ALLOC_SUPPORTED \\\n+\t\tUINT32_C(0x80)\n+\t/*\n+\t * Value of 1 to indicate that firmware supports setting of\n+\t * rfs_ring_tbl_idx in HWRM_CFA_NTUPLE_ALLOC command.\n+\t * Value of 0 indicates firmware does not support rfs_ring_tbl_idx.\n+\t */\n+\t#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_RFS_RING_TBL_IDX_SUPPORTED \\\n+\t\tUINT32_C(0x100)\n+\t/*\n+\t * Value of 1 to indicate that firmware supports untagged matching\n+\t * criteria on HWRM_CFA_L2_FILTER_ALLOC command. Value of 0\n+\t * indicates firmware does not support untagged matching.\n+\t */\n+\t#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_UNTAGGED_VLAN_SUPPORTED \\\n+\t\tUINT32_C(0x200)\n+\t/*\n+\t * Value of 1 to indicate that firmware supports XDP filter. Value\n+\t * of 0 indicates firmware does not support XDP filter.\n+\t */\n+\t#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_XDP_SUPPORTED \\\n+\t\tUINT32_C(0x400)\n+\t/*\n+\t * Value of 1 to indicate that the firmware support L2 header source\n+\t * fields matching criteria on HWRM_CFA_L2_FILTER_ALLOC command.\n+\t * Value of 0 indicates firmware does not support L2 header source\n+\t * fields matching.\n+\t */\n+\t#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_L2_HEADER_SOURCE_FIELDS_SUPPORTED \\\n+\t\tUINT32_C(0x800)\n \tuint8_t\tunused_0[3];\n \t/*\n \t * This field is used in Output records to indicate that the output\n@@ -29056,6 +29883,81 @@ struct hwrm_cfa_adv_flow_mgnt_qcaps_output {\n \tuint8_t\tvalid;\n } __attribute__((packed));\n \n+/******************\n+ * hwrm_cfa_tflib *\n+ ******************/\n+\n+\n+/* hwrm_cfa_tflib_input (size:1024b/128B) */\n+struct hwrm_cfa_tflib_input {\n+\t/* The HWRM command request type. */\n+\tuint16_t\treq_type;\n+\t/*\n+\t * The completion ring to send the completion event on. This should\n+\t * be the NQ ID returned from the `nq_alloc` HWRM command.\n+\t */\n+\tuint16_t\tcmpl_ring;\n+\t/*\n+\t * The sequence ID is used by the driver for tracking multiple\n+\t * commands. This ID is treated as opaque data by the firmware and\n+\t * the value is returned in the `hwrm_resp_hdr` upon completion.\n+\t */\n+\tuint16_t\tseq_id;\n+\t/*\n+\t * The target ID of the command:\n+\t * * 0x0-0xFFF8 - The function ID\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n+\t * * 0xFFFF - HWRM\n+\t */\n+\tuint16_t\ttarget_id;\n+\t/*\n+\t * A physical address pointer pointing to a host buffer that the\n+\t * command's response data will be written. This can be either a host\n+\t * physical address (HPA) or a guest physical address (GPA) and must\n+\t * point to a physically contiguous block of memory.\n+\t */\n+\tuint64_t\tresp_addr;\n+\t/* TFLIB message type. */\n+\tuint16_t\ttf_type;\n+\t/* TFLIB message subtype. */\n+\tuint16_t\ttf_subtype;\n+\t/* unused. */\n+\tuint8_t\tunused0[4];\n+\t/* TFLIB request data. */\n+\tuint32_t\ttf_req[26];\n+} __attribute__((packed));\n+\n+/* hwrm_cfa_tflib_output (size:5632b/704B) */\n+struct hwrm_cfa_tflib_output {\n+\t/* The specific error status for the command. */\n+\tuint16_t\terror_code;\n+\t/* The HWRM command request type. */\n+\tuint16_t\treq_type;\n+\t/* The sequence ID from the original command. */\n+\tuint16_t\tseq_id;\n+\t/* The length of the response data in number of bytes. */\n+\tuint16_t\tresp_len;\n+\t/* TFLIB message type. */\n+\tuint16_t\ttf_type;\n+\t/* TFLIB message subtype. */\n+\tuint16_t\ttf_subtype;\n+\t/* TFLIB response code */\n+\tuint32_t\ttf_resp_code;\n+\t/* TFLIB response data. */\n+\tuint32_t\ttf_resp[170];\n+\t/* unused. */\n+\tuint8_t\tunused1[7];\n+\t/*\n+\t * This field is used in Output records to indicate that the output\n+\t * is completely written to RAM.  This field should be read as '1'\n+\t * to indicate that the output has been completely written.\n+\t * When writing a command completion or response to an internal processor,\n+\t * the order of writes has to be such that this field is written last.\n+\t */\n+\tuint8_t\tvalid;\n+} __attribute__((packed));\n+\n /******************************\n  * hwrm_tunnel_dst_port_query *\n  ******************************/\n@@ -29079,7 +29981,8 @@ struct hwrm_tunnel_dst_port_query_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29177,7 +30080,8 @@ struct hwrm_tunnel_dst_port_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29274,7 +30178,8 @@ struct hwrm_tunnel_dst_port_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29451,7 +30356,8 @@ struct hwrm_stat_ctx_alloc_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29540,7 +30446,8 @@ struct hwrm_stat_ctx_free_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29602,7 +30509,8 @@ struct hwrm_stat_ctx_query_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29702,7 +30610,8 @@ struct hwrm_stat_ctx_eng_query_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29803,7 +30712,8 @@ struct hwrm_stat_ctx_clr_stats_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29863,7 +30773,8 @@ struct hwrm_pcie_qstats_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -29970,7 +30881,8 @@ struct hwrm_exec_fwd_resp_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30043,7 +30955,8 @@ struct hwrm_reject_fwd_resp_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30116,7 +31029,8 @@ struct hwrm_fwd_resp_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30204,7 +31118,8 @@ struct hwrm_fwd_async_event_cmpl_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30273,7 +31188,8 @@ struct hwrm_nvm_raw_write_blk_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30342,7 +31258,8 @@ struct hwrm_nvm_read_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30412,7 +31329,8 @@ struct hwrm_nvm_raw_dump_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30478,7 +31396,8 @@ struct hwrm_nvm_get_dir_entries_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30540,7 +31459,8 @@ struct hwrm_nvm_get_dir_info_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30601,7 +31521,8 @@ struct hwrm_nvm_write_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30722,7 +31643,8 @@ struct hwrm_nvm_modify_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30795,7 +31717,8 @@ struct hwrm_nvm_find_dir_entry_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30897,7 +31820,8 @@ struct hwrm_nvm_erase_dir_entry_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30957,7 +31881,8 @@ struct hwrm_nvm_get_dev_info_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -30991,7 +31916,12 @@ struct hwrm_nvm_get_dev_info_output {\n \tuint32_t\treserved_size;\n \t/* Available size that can be used, in bytes.  Available size is the NVRAM size take away the used size and reserved size. */\n \tuint32_t\tavailable_size;\n-\tuint8_t\tunused_0[3];\n+\t/* This field represents the major version of NVM cfg */\n+\tuint8_t\tnvm_cfg_ver_maj;\n+\t/* This field represents the minor version of NVM cfg */\n+\tuint8_t\tnvm_cfg_ver_min;\n+\t/* This field represents the update version of NVM cfg */\n+\tuint8_t\tnvm_cfg_ver_upd;\n \t/*\n \t * This field is used in Output records to indicate that the output\n \t * is completely written to RAM.  This field should be read as '1'\n@@ -31025,7 +31955,8 @@ struct hwrm_nvm_mod_dir_entry_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -31104,7 +32035,8 @@ struct hwrm_nvm_verify_update_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -31177,7 +32109,8 @@ struct hwrm_nvm_install_update_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -31340,7 +32273,8 @@ struct hwrm_nvm_flush_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -31413,7 +32347,8 @@ struct hwrm_nvm_get_variable_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -31548,7 +32483,8 @@ struct hwrm_nvm_set_variable_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n@@ -31678,7 +32614,8 @@ struct hwrm_nvm_validate_option_input {\n \t/*\n \t * The target ID of the command:\n \t * * 0x0-0xFFF8 - The function ID\n-\t * * 0xFFF8-0xFFFE - Reserved for internal processors\n+\t * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors\n+\t * * 0xFFFD - Reserved for user-space HWRM interface\n \t * * 0xFFFF - HWRM\n \t */\n \tuint16_t\ttarget_id;\n",
    "prefixes": [
        "10/11"
    ]
}