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GET /api/patches/52694/?format=api
{ "id": 52694, "url": "http://patches.dpdk.org/api/patches/52694/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190412105105.24351-11-g.singh@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190412105105.24351-11-g.singh@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190412105105.24351-11-g.singh@nxp.com", "date": "2019-04-12T11:01:46", "name": "[v3,10/13] net/enetc: enable Rx-Tx queue start/stop feature", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a8a519afa892ca8d4be15b04ec83a4b093bf9c52", "submitter": { "id": 1068, "url": "http://patches.dpdk.org/api/people/1068/?format=api", "name": "Gagandeep Singh", "email": "g.singh@nxp.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190412105105.24351-11-g.singh@nxp.com/mbox/", "series": [ { "id": 4280, "url": "http://patches.dpdk.org/api/series/4280/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4280", "date": "2019-04-12T11:01:11", "name": "ENETC PMD basic features and bug fixes", "version": 3, "mbox": "http://patches.dpdk.org/series/4280/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/52694/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/52694/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0EEC41B12D;\n\tFri, 12 Apr 2019 13:01:58 +0200 (CEST)", "from EUR03-VE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr50040.outbound.protection.outlook.com [40.107.5.40])\n\tby dpdk.org (Postfix) with ESMTP id 026905F2C\n\tfor <dev@dpdk.org>; Fri, 12 Apr 2019 13:01:47 +0200 (CEST)", "from VE1PR04MB6365.eurprd04.prod.outlook.com (10.255.118.78) by\n\tVE1PR04MB6384.eurprd04.prod.outlook.com (20.179.232.15) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1792.18; Fri, 12 Apr 2019 11:01:46 +0000", "from VE1PR04MB6365.eurprd04.prod.outlook.com\n\t([fe80::f5ad:f178:4c55:13e0]) by\n\tVE1PR04MB6365.eurprd04.prod.outlook.com\n\t([fe80::f5ad:f178:4c55:13e0%3]) with mapi id 15.20.1792.016;\n\tFri, 12 Apr 2019 11:01:46 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=fcjELVAI2tp6iN6v5l0oNgfE+fOEp7TbWUkmCqAzhLE=;\n\tb=few4V84loWDFHO4xtIzsP8r5/v5QROwCXtHeDKBCArAXA/d8or0niXlCGEjTq0GVqezuVSt9ubJKwNy8nkuKyhnbGMBAWDsZpWJuP5WNDyLDygy22GZcuTj2M/CX+OW8uPCKOOXlTAsN/lMMxSKm+JhD9yOc5LspFmBVApB3NUI=", "From": "Gagandeep Singh <G.Singh@nxp.com>", "To": "\"dev@dpdk.org\" <dev@dpdk.org>, \"ferruh.yigit@intel.com\"\n\t<ferruh.yigit@intel.com>", "CC": "Gagandeep Singh <G.Singh@nxp.com>", "Thread-Topic": "[PATCH v3 10/13] net/enetc: enable Rx-Tx queue start/stop\n\tfeature", "Thread-Index": "AQHU8R8e+oQ9Fpb6HEKwrNHsl1uLNg==", "Date": "Fri, 12 Apr 2019 11:01:46 +0000", "Message-ID": "<20190412105105.24351-11-g.singh@nxp.com>", "References": "<1555075598-4988-1-git-send-email-g.singh@nxp.com>\n\t<20190412105105.24351-1-g.singh@nxp.com>", "In-Reply-To": "<20190412105105.24351-1-g.singh@nxp.com>", "Accept-Language": "en-US", "Content-Language": "en-US", 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"zHd+K0ejoO8T0mq07DaC1p87knRhZ58m3g0BlwGJOs2R9qXE88i7BeB4X0XLIwUL/NxwbOK//oufFPrEgmwedtRjgCY1ywc8FiUdBYvPIGFDBldfHOtFMpLsLzEUD67uyre0iBKnUvAE3t/fpJLitYCGAHVxwcvhz4qEfQIhJqJxQKTTkx670GX9xCZLAaAh4ftQ4dc7e15IrbPlWfIy6JzJtXCWRO1EHgq4tm222p+9ecQ1rgKe0y917DrXXuu4doyVcK7u/VldAROSd2fvsg6oQ9vUShuWxEfC/wVGmus/HJm1nxpdCajEGl0mY3IRUCckaeREVI8DvUi/eyQb0zLmR/8vn/sbTVz5vfVdNpRU82uZy6+o5M2Ws26ZFkCpTO/MfZytz0wKOHLVFcWqq1Kh+Q7XgROZMzh9tAXsxo4=", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "MIME-Version": "1.0", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "75afa1d9-ac48-456f-ea86-08d6bf364103", "X-MS-Exchange-CrossTenant-originalarrivaltime": "12 Apr 2019 11:01:46.6773\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "VE1PR04MB6384", "Subject": "[dpdk-dev] [PATCH v3 10/13] net/enetc: enable Rx-Tx queue\n\tstart/stop feature", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Rx and Tx queue start-stop and deferred queue start\nfeatures enabled.\n\nSigned-off-by: Gagandeep Singh <g.singh@nxp.com>\n---\n doc/guides/nics/enetc.rst | 2 +\n doc/guides/nics/features/enetc.ini | 1 +\n drivers/net/enetc/enetc_ethdev.c | 185 ++++++++++++++++++++++++++-----------\n 3 files changed, 134 insertions(+), 54 deletions(-)", "diff": "diff --git a/doc/guides/nics/enetc.rst b/doc/guides/nics/enetc.rst\r\nindex eeb0752..26d61f6 100644\r\n--- a/doc/guides/nics/enetc.rst\r\n+++ b/doc/guides/nics/enetc.rst\r\n@@ -50,6 +50,8 @@ ENETC Features\r\n - Promiscuous\r\n - Multicast\r\n - Jumbo packets\r\n+- Queue Start/Stop\r\n+- Deferred Queue Start\r\n \r\n NIC Driver (PMD)\r\n ~~~~~~~~~~~~~~~~\r\ndiff --git a/doc/guides/nics/features/enetc.ini b/doc/guides/nics/features/enetc.ini\r\nindex 0eed2cb..bd901fa 100644\r\n--- a/doc/guides/nics/features/enetc.ini\r\n+++ b/doc/guides/nics/features/enetc.ini\r\n@@ -11,6 +11,7 @@ Promiscuous mode = Y\r\n Allmulticast mode = Y\r\n MTU update = Y\r\n Jumbo frame = Y\r\n+Queue start/stop = Y\r\n Linux VFIO = Y\r\n ARMv8 = Y\r\n Usage doc = Y\r\ndiff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c\r\nindex 66cbf74..ff9301e 100644\r\n--- a/drivers/net/enetc/enetc_ethdev.c\r\n+++ b/drivers/net/enetc/enetc_ethdev.c\r\n@@ -203,7 +203,6 @@\r\n enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)\r\n {\r\n \tint idx = tx_ring->index;\r\n-\tuint32_t tbmr;\r\n \tphys_addr_t bd_address;\r\n \r\n \tbd_address = (phys_addr_t)\r\n@@ -215,9 +214,6 @@\r\n \tenetc_txbdr_wr(hw, idx, ENETC_TBLENR,\r\n \t\t ENETC_RTBLENR_LEN(tx_ring->bd_count));\r\n \r\n-\ttbmr = ENETC_TBMR_EN;\r\n-\t/* enable ring */\r\n-\tenetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);\r\n \tenetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);\r\n \tenetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);\r\n \ttx_ring->tcir = (void *)((size_t)hw->reg +\r\n@@ -227,16 +223,22 @@\r\n }\r\n \r\n static int\r\n-enetc_alloc_tx_resources(struct rte_eth_dev *dev,\r\n-\t\t\t uint16_t queue_idx,\r\n-\t\t\t uint16_t nb_desc)\r\n+enetc_tx_queue_setup(struct rte_eth_dev *dev,\r\n+\t\t uint16_t queue_idx,\r\n+\t\t uint16_t nb_desc,\r\n+\t\t unsigned int socket_id __rte_unused,\r\n+\t\t const struct rte_eth_txconf *tx_conf)\r\n {\r\n-\tint err;\r\n+\tint err = 0;\r\n \tstruct enetc_bdr *tx_ring;\r\n \tstruct rte_eth_dev_data *data = dev->data;\r\n \tstruct enetc_eth_adapter *priv =\r\n \t\t\tENETC_DEV_PRIVATE(data->dev_private);\r\n \r\n+\tPMD_INIT_FUNC_TRACE();\r\n+\tif (nb_desc > MAX_BD_COUNT)\r\n+\t\treturn -1;\r\n+\r\n \ttx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);\r\n \tif (tx_ring == NULL) {\r\n \t\tENETC_PMD_ERR(\"Failed to allocate TX ring memory\");\r\n@@ -253,6 +255,17 @@\r\n \tenetc_setup_txbdr(&priv->hw.hw, tx_ring);\r\n \tdata->tx_queues[queue_idx] = tx_ring;\r\n \r\n+\tif (!tx_conf->tx_deferred_start) {\r\n+\t\t/* enable ring */\r\n+\t\tenetc_txbdr_wr(&priv->hw.hw, tx_ring->index,\r\n+\t\t\t ENETC_TBMR, ENETC_TBMR_EN);\r\n+\t\tdev->data->tx_queue_state[tx_ring->index] =\r\n+\t\t\t RTE_ETH_QUEUE_STATE_STARTED;\r\n+\t} else {\r\n+\t\tdev->data->tx_queue_state[tx_ring->index] =\r\n+\t\t\t RTE_ETH_QUEUE_STATE_STOPPED;\r\n+\t}\r\n+\r\n \treturn 0;\r\n fail:\r\n \trte_free(tx_ring);\r\n@@ -260,24 +273,6 @@\r\n \treturn err;\r\n }\r\n \r\n-static int\r\n-enetc_tx_queue_setup(struct rte_eth_dev *dev,\r\n-\t\t uint16_t queue_idx,\r\n-\t\t uint16_t nb_desc,\r\n-\t\t unsigned int socket_id __rte_unused,\r\n-\t\t const struct rte_eth_txconf *tx_conf __rte_unused)\r\n-{\r\n-\tint err = 0;\r\n-\r\n-\tPMD_INIT_FUNC_TRACE();\r\n-\tif (nb_desc > MAX_BD_COUNT)\r\n-\t\treturn -1;\r\n-\r\n-\terr = enetc_alloc_tx_resources(dev, queue_idx, nb_desc);\r\n-\r\n-\treturn err;\r\n-}\r\n-\r\n static void\r\n enetc_tx_queue_release(void *txq)\r\n {\r\n@@ -367,23 +362,27 @@\r\n \tbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -\r\n \t\t RTE_PKTMBUF_HEADROOM);\r\n \tenetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);\r\n-\t/* enable ring */\r\n-\tenetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN);\r\n \tenetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);\r\n }\r\n \r\n static int\r\n-enetc_alloc_rx_resources(struct rte_eth_dev *dev,\r\n-\t\t\t uint16_t rx_queue_id,\r\n-\t\t\t uint16_t nb_rx_desc,\r\n-\t\t\t struct rte_mempool *mb_pool)\r\n+enetc_rx_queue_setup(struct rte_eth_dev *dev,\r\n+\t\t uint16_t rx_queue_id,\r\n+\t\t uint16_t nb_rx_desc,\r\n+\t\t unsigned int socket_id __rte_unused,\r\n+\t\t const struct rte_eth_rxconf *rx_conf,\r\n+\t\t struct rte_mempool *mb_pool)\r\n {\r\n-\tint err;\r\n+\tint err = 0;\r\n \tstruct enetc_bdr *rx_ring;\r\n \tstruct rte_eth_dev_data *data = dev->data;\r\n \tstruct enetc_eth_adapter *adapter =\r\n \t\t\tENETC_DEV_PRIVATE(data->dev_private);\r\n \r\n+\tPMD_INIT_FUNC_TRACE();\r\n+\tif (nb_rx_desc > MAX_BD_COUNT)\r\n+\t\treturn -1;\r\n+\r\n \trx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);\r\n \tif (rx_ring == NULL) {\r\n \t\tENETC_PMD_ERR(\"Failed to allocate RX ring memory\");\r\n@@ -400,6 +399,17 @@\r\n \tenetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);\r\n \tdata->rx_queues[rx_queue_id] = rx_ring;\r\n \r\n+\tif (!rx_conf->rx_deferred_start) {\r\n+\t\t/* enable ring */\r\n+\t\tenetc_rxbdr_wr(&adapter->hw.hw, rx_ring->index, ENETC_RBMR,\r\n+\t\t\t ENETC_RBMR_EN);\r\n+\t\tdev->data->rx_queue_state[rx_ring->index] =\r\n+\t\t\t RTE_ETH_QUEUE_STATE_STARTED;\r\n+\t} else {\r\n+\t\tdev->data->rx_queue_state[rx_ring->index] =\r\n+\t\t\t RTE_ETH_QUEUE_STATE_STOPPED;\r\n+\t}\r\n+\r\n \treturn 0;\r\n fail:\r\n \trte_free(rx_ring);\r\n@@ -407,27 +417,6 @@\r\n \treturn err;\r\n }\r\n \r\n-static int\r\n-enetc_rx_queue_setup(struct rte_eth_dev *dev,\r\n-\t\t uint16_t rx_queue_id,\r\n-\t\t uint16_t nb_rx_desc,\r\n-\t\t unsigned int socket_id __rte_unused,\r\n-\t\t const struct rte_eth_rxconf *rx_conf __rte_unused,\r\n-\t\t struct rte_mempool *mb_pool)\r\n-{\r\n-\tint err = 0;\r\n-\r\n-\tPMD_INIT_FUNC_TRACE();\r\n-\tif (nb_rx_desc > MAX_BD_COUNT)\r\n-\t\treturn -1;\r\n-\r\n-\terr = enetc_alloc_rx_resources(dev, rx_queue_id,\r\n-\t\t\t\t nb_rx_desc,\r\n-\t\t\t\t mb_pool);\r\n-\r\n-\treturn err;\r\n-}\r\n-\r\n static void\r\n enetc_rx_queue_release(void *rxq)\r\n {\r\n@@ -661,6 +650,90 @@ int enetc_stats_get(struct rte_eth_dev *dev,\r\n \treturn 0;\r\n }\r\n \r\n+static int\r\n+enetc_rx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)\r\n+{\r\n+\tstruct enetc_eth_adapter *priv =\r\n+\t\t\tENETC_DEV_PRIVATE(dev->data->dev_private);\r\n+\tstruct enetc_bdr *rx_ring;\r\n+\tuint32_t rx_data;\r\n+\r\n+\trx_ring = dev->data->rx_queues[qidx];\r\n+\tif (dev->data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) {\r\n+\t\trx_data = enetc_rxbdr_rd(&priv->hw.hw, rx_ring->index,\r\n+\t\t\t\t\t ENETC_RBMR);\r\n+\t\trx_data = rx_data | ENETC_RBMR_EN;\r\n+\t\tenetc_rxbdr_wr(&priv->hw.hw, rx_ring->index, ENETC_RBMR,\r\n+\t\t\t rx_data);\r\n+\t\tdev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;\r\n+\t}\r\n+\r\n+\treturn 0;\r\n+}\r\n+\r\n+static int\r\n+enetc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)\r\n+{\r\n+\tstruct enetc_eth_adapter *priv =\r\n+\t\t\tENETC_DEV_PRIVATE(dev->data->dev_private);\r\n+\tstruct enetc_bdr *rx_ring;\r\n+\tuint32_t rx_data;\r\n+\r\n+\trx_ring = dev->data->rx_queues[qidx];\r\n+\tif (dev->data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) {\r\n+\t\trx_data = enetc_rxbdr_rd(&priv->hw.hw, rx_ring->index,\r\n+\t\t\t\t\t ENETC_RBMR);\r\n+\t\trx_data = rx_data & (~ENETC_RBMR_EN);\r\n+\t\tenetc_rxbdr_wr(&priv->hw.hw, rx_ring->index, ENETC_RBMR,\r\n+\t\t\t rx_data);\r\n+\t\tdev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;\r\n+\t}\r\n+\r\n+\treturn 0;\r\n+}\r\n+\r\n+static int\r\n+enetc_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)\r\n+{\r\n+\tstruct enetc_eth_adapter *priv =\r\n+\t\t\tENETC_DEV_PRIVATE(dev->data->dev_private);\r\n+\tstruct enetc_bdr *tx_ring;\r\n+\tuint32_t tx_data;\r\n+\r\n+\ttx_ring = dev->data->tx_queues[qidx];\r\n+\tif (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) {\r\n+\t\ttx_data = enetc_txbdr_rd(&priv->hw.hw, tx_ring->index,\r\n+\t\t\t\t\t ENETC_TBMR);\r\n+\t\ttx_data = tx_data | ENETC_TBMR_EN;\r\n+\t\tenetc_txbdr_wr(&priv->hw.hw, tx_ring->index, ENETC_TBMR,\r\n+\t\t\t tx_data);\r\n+\t\tdev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;\r\n+\t}\r\n+\r\n+\treturn 0;\r\n+}\r\n+\r\n+static int\r\n+enetc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)\r\n+{\r\n+\tstruct enetc_eth_adapter *priv =\r\n+\t\t\tENETC_DEV_PRIVATE(dev->data->dev_private);\r\n+\tstruct enetc_bdr *tx_ring;\r\n+\tuint32_t tx_data;\r\n+\r\n+\ttx_ring = dev->data->tx_queues[qidx];\r\n+\tif (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) {\r\n+\t\ttx_data = enetc_txbdr_rd(&priv->hw.hw, tx_ring->index,\r\n+\t\t\t\t\t ENETC_TBMR);\r\n+\t\ttx_data = tx_data & (~ENETC_TBMR_EN);\r\n+\t\tenetc_txbdr_wr(&priv->hw.hw, tx_ring->index, ENETC_TBMR,\r\n+\t\t\t tx_data);\r\n+\t\tdev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;\r\n+\t}\r\n+\r\n+\treturn 0;\r\n+}\r\n+\r\n /*\r\n * The set of PCI devices this driver supports\r\n */\r\n@@ -686,8 +759,12 @@ int enetc_stats_get(struct rte_eth_dev *dev,\r\n \t.dev_infos_get = enetc_dev_infos_get,\r\n \t.mtu_set = enetc_mtu_set,\r\n \t.rx_queue_setup = enetc_rx_queue_setup,\r\n+\t.rx_queue_start = enetc_rx_queue_start,\r\n+\t.rx_queue_stop = enetc_rx_queue_stop,\r\n \t.rx_queue_release = enetc_rx_queue_release,\r\n \t.tx_queue_setup = enetc_tx_queue_setup,\r\n+\t.tx_queue_start = enetc_tx_queue_start,\r\n+\t.tx_queue_stop = enetc_tx_queue_stop,\r\n \t.tx_queue_release = enetc_tx_queue_release,\r\n \t.dev_supported_ptypes_get = enetc_supported_ptypes_get,\r\n };\r\n", "prefixes": [ "v3", "10/13" ] }