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{
    "id": 52475,
    "url": "http://patches.dpdk.org/api/patches/52475/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1554813689-26834-6-git-send-email-rosen.xu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1554813689-26834-6-git-send-email-rosen.xu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1554813689-26834-6-git-send-email-rosen.xu@intel.com",
    "date": "2019-04-09T12:41:20",
    "name": "[v6,05/14] net/ipn3ke: add IPN3KE TM of PMD driver",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "996b88ea18d0460538c6e0c9d63c3808c2ea77e7",
    "submitter": {
        "id": 946,
        "url": "http://patches.dpdk.org/api/people/946/?format=api",
        "name": "Xu, Rosen",
        "email": "rosen.xu@intel.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1554813689-26834-6-git-send-email-rosen.xu@intel.com/mbox/",
    "series": [
        {
            "id": 4203,
            "url": "http://patches.dpdk.org/api/series/4203/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4203",
            "date": "2019-04-09T12:41:15",
            "name": "Add patch set for IPN3KE",
            "version": 6,
            "mbox": "http://patches.dpdk.org/series/4203/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/52475/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/52475/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D3A535920;\n\tTue,  9 Apr 2019 14:40:49 +0200 (CEST)",
            "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id 04CED58EC\n\tfor <dev@dpdk.org>; Tue,  9 Apr 2019 14:40:47 +0200 (CEST)",
            "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t09 Apr 2019 05:40:47 -0700",
            "from dpdkx8602.sh.intel.com ([10.67.110.200])\n\tby orsmga003.jf.intel.com with ESMTP; 09 Apr 2019 05:40:44 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.60,329,1549958400\"; d=\"scan'208\";a=\"141243836\"",
        "From": "Rosen Xu <rosen.xu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com, tianfei.zhang@intel.com, dan.wei@intel.com,\n\trosen.xu@intel.com, andy.pei@intel.com, qiming.yang@intel.com,\n\thaiyue.wang@intel.com, santos.chen@intel.com, zhang.zhang@intel.com, \n\tdavid.lomartire@intel.com, jia.hu@intel.com",
        "Date": "Tue,  9 Apr 2019 20:41:20 +0800",
        "Message-Id": "<1554813689-26834-6-git-send-email-rosen.xu@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1554813689-26834-1-git-send-email-rosen.xu@intel.com>",
        "References": "<1551338000-120348-1-git-send-email-rosen.xu@intel.com>\n\t<1554813689-26834-1-git-send-email-rosen.xu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v6 05/14] net/ipn3ke: add IPN3KE TM of PMD driver",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add Intel FPGA Acceleration NIC IPN3KE TM of PMD driver.\n\nSigned-off-by: Rosen Xu <rosen.xu@intel.com>\nSigned-off-by: Andy Pei <andy.pei@intel.com>\nSigned-off-by: Dan Wei <dan.wei@intel.com>\n---\n drivers/net/ipn3ke/Makefile             |    1 +\n drivers/net/ipn3ke/ipn3ke_ethdev.c      |    3 +\n drivers/net/ipn3ke/ipn3ke_ethdev.h      |    7 +\n drivers/net/ipn3ke/ipn3ke_representor.c |    5 +\n drivers/net/ipn3ke/ipn3ke_tm.c          | 2068 +++++++++++++++++++++++++++++++\n drivers/net/ipn3ke/meson.build          |    3 +-\n 6 files changed, 2086 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/ipn3ke/ipn3ke_tm.c",
    "diff": "diff --git a/drivers/net/ipn3ke/Makefile b/drivers/net/ipn3ke/Makefile\nindex 221567d..38d9384 100644\n--- a/drivers/net/ipn3ke/Makefile\n+++ b/drivers/net/ipn3ke/Makefile\n@@ -34,5 +34,6 @@ LIBABIVER := 1\n #\n SRCS-$(CONFIG_RTE_LIBRTE_IPN3KE_PMD) += ipn3ke_ethdev.c\n SRCS-$(CONFIG_RTE_LIBRTE_IPN3KE_PMD) += ipn3ke_representor.c\n+SRCS-$(CONFIG_RTE_LIBRTE_IPN3KE_PMD) += ipn3ke_tm.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c\nindex 146d796..29828f3 100644\n--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c\n+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c\n@@ -274,6 +274,9 @@\n \thw->flow_hw_enable = 0;\n \tif (afu_dev->id.uuid.uuid_low == IPN3KE_UUID_VBNG_LOW &&\n \t\tafu_dev->id.uuid.uuid_high == IPN3KE_UUID_VBNG_HIGH) {\n+\t\tret = ipn3ke_hw_tm_init(hw);\n+\t\tif (ret)\n+\t\t\treturn ret;\n \t\thw->tm_hw_enable = 1;\n \t\thw->flow_hw_enable = 1;\n \t}\ndiff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke_ethdev.h\nindex 4c2c94b..6985a25 100644\n--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h\n+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h\n@@ -555,6 +555,13 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_hw *hw,\n ipn3ke_rpst_init(struct rte_eth_dev *ethdev, void *init_params);\n int\n ipn3ke_rpst_uninit(struct rte_eth_dev *ethdev);\n+int\n+ipn3ke_hw_tm_init(struct ipn3ke_hw *hw);\n+void\n+ipn3ke_tm_init(struct ipn3ke_rpst *rpst);\n+int\n+ipn3ke_tm_ops_get(struct rte_eth_dev *ethdev,\n+\t\tvoid *arg);\n \n \n /* IPN3KE_MASK is a macro used on 32 bit registers */\ndiff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c\nindex 3831982..63098bf 100644\n--- a/drivers/net/ipn3ke/ipn3ke_representor.c\n+++ b/drivers/net/ipn3ke/ipn3ke_representor.c\n@@ -801,6 +801,8 @@\n \t.allmulticast_disable = ipn3ke_rpst_allmulticast_disable,\n \t.mac_addr_set         = ipn3ke_rpst_mac_addr_set,\n \t.mtu_set              = ipn3ke_rpst_mtu_set,\n+\n+\t.tm_ops_get           = ipn3ke_tm_ops_get,\n };\n \n static uint16_t ipn3ke_rpst_recv_pkts(__rte_unused void *rx_q,\n@@ -840,6 +842,9 @@ static uint16_t ipn3ke_rpst_recv_pkts(__rte_unused void *rx_q,\n \t\treturn -ENODEV;\n \t}\n \n+\tif (rpst->hw->tm_hw_enable)\n+\t\tipn3ke_tm_init(rpst);\n+\n \t/* Set representor device ops */\n \tethdev->dev_ops = &ipn3ke_rpst_dev_ops;\n \ndiff --git a/drivers/net/ipn3ke/ipn3ke_tm.c b/drivers/net/ipn3ke/ipn3ke_tm.c\nnew file mode 100644\nindex 0000000..4ca4c97\n--- /dev/null\n+++ b/drivers/net/ipn3ke/ipn3ke_tm.c\n@@ -0,0 +1,2068 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019 Intel Corporation\n+ */\n+\n+#include <stdint.h>\n+#include <stdlib.h>\n+#include <string.h>\n+\n+#include <rte_bus_pci.h>\n+#include <rte_ethdev.h>\n+#include <rte_pci.h>\n+#include <rte_malloc.h>\n+#include <rte_tm_driver.h>\n+\n+#include <rte_mbuf.h>\n+#include <rte_sched.h>\n+#include <rte_ethdev_driver.h>\n+\n+#include <rte_io.h>\n+#include <rte_rawdev.h>\n+#include <rte_rawdev_pmd.h>\n+#include <rte_bus_ifpga.h>\n+#include <ifpga_logs.h>\n+\n+#include \"ipn3ke_rawdev_api.h\"\n+#include \"ipn3ke_logs.h\"\n+#include \"ipn3ke_ethdev.h\"\n+\n+#define BYTES_IN_MBPS     (1000 * 1000 / 8)\n+#define SUBPORT_TC_PERIOD 10\n+#define PIPE_TC_PERIOD    40\n+\n+struct ipn3ke_tm_shaper_params_range_type {\n+\tuint32_t m1;\n+\tuint32_t m2;\n+\tuint32_t exp;\n+\tuint32_t exp2;\n+\tuint32_t low;\n+\tuint32_t high;\n+};\n+struct ipn3ke_tm_shaper_params_range_type ipn3ke_tm_shaper_params_rang[] = {\n+\t{  0,       1,     0,        1,           0,            4},\n+\t{  2,       3,     0,        1,           8,           12},\n+\t{  4,       7,     0,        1,          16,           28},\n+\t{  8,      15,     0,        1,          32,           60},\n+\t{ 16,      31,     0,        1,          64,          124},\n+\t{ 32,      63,     0,        1,         128,          252},\n+\t{ 64,     127,     0,        1,         256,          508},\n+\t{128,     255,     0,        1,         512,         1020},\n+\t{256,     511,     0,        1,        1024,         2044},\n+\t{512,    1023,     0,        1,        2048,         4092},\n+\t{512,    1023,     1,        2,        4096,         8184},\n+\t{512,    1023,     2,        4,        8192,        16368},\n+\t{512,    1023,     3,        8,       16384,        32736},\n+\t{512,    1023,     4,       16,       32768,        65472},\n+\t{512,    1023,     5,       32,       65536,       130944},\n+\t{512,    1023,     6,       64,      131072,       261888},\n+\t{512,    1023,     7,      128,      262144,       523776},\n+\t{512,    1023,     8,      256,      524288,      1047552},\n+\t{512,    1023,     9,      512,     1048576,      2095104},\n+\t{512,    1023,    10,     1024,     2097152,      4190208},\n+\t{512,    1023,    11,     2048,     4194304,      8380416},\n+\t{512,    1023,    12,     4096,     8388608,     16760832},\n+\t{512,    1023,    13,     8192,    16777216,     33521664},\n+\t{512,    1023,    14,    16384,    33554432,     67043328},\n+\t{512,    1023,    15,    32768,    67108864,    134086656},\n+};\n+\n+#define IPN3KE_TM_SHAPER_RANGE_NUM (sizeof(ipn3ke_tm_shaper_params_rang) / \\\n+\tsizeof(struct ipn3ke_tm_shaper_params_range_type))\n+\n+#define IPN3KE_TM_SHAPER_COMMITTED_RATE_MAX \\\n+\t(ipn3ke_tm_shaper_params_rang[IPN3KE_TM_SHAPER_RANGE_NUM - 1].high)\n+\n+#define IPN3KE_TM_SHAPER_PEAK_RATE_MAX \\\n+\t(ipn3ke_tm_shaper_params_rang[IPN3KE_TM_SHAPER_RANGE_NUM - 1].high)\n+\n+int\n+ipn3ke_hw_tm_init(struct ipn3ke_hw *hw)\n+{\n+#define SCRATCH_DATA 0xABCDEF\n+\tstruct ipn3ke_tm_node *nodes;\n+\tstruct ipn3ke_tm_tdrop_profile *tdrop_profile;\n+\tint node_num;\n+\tint i;\n+\n+\tif (hw == NULL)\n+\t\treturn -EINVAL;\n+#if IPN3KE_TM_SCRATCH_RW\n+\tuint32_t scratch_data;\n+\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\t\tIPN3KE_TM_SCRATCH,\n+\t\t\t\t\t0,\n+\t\t\t\t\tSCRATCH_DATA,\n+\t\t\t\t\t0xFFFFFFFF);\n+\tscratch_data = IPN3KE_MASK_READ_REG(hw,\n+\t\t\t\t\tIPN3KE_TM_SCRATCH,\n+\t\t\t\t\t0,\n+\t\t\t\t\t0xFFFFFFFF);\n+\tif (scratch_data != SCRATCH_DATA)\n+\t\treturn -EINVAL;\n+#endif\n+\t/* alloc memory for all hierarchy nodes */\n+\tnode_num = hw->port_num +\n+\t\tIPN3KE_TM_VT_NODE_NUM +\n+\t\tIPN3KE_TM_COS_NODE_NUM;\n+\n+\tnodes = rte_zmalloc(\"ipn3ke_tm_nodes\",\n+\t\t\tsizeof(struct ipn3ke_tm_node) * node_num,\n+\t\t\t0);\n+\tif (!nodes)\n+\t\treturn -ENOMEM;\n+\n+\t/* alloc memory for Tail Drop Profile */\n+\ttdrop_profile = rte_zmalloc(\"ipn3ke_tm_tdrop_profile\",\n+\t\t\t\tsizeof(struct ipn3ke_tm_tdrop_profile) *\n+\t\t\t\tIPN3KE_TM_TDROP_PROFILE_NUM,\n+\t\t\t\t0);\n+\tif (!tdrop_profile) {\n+\t\trte_free(nodes);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\thw->nodes = nodes;\n+\thw->port_nodes = nodes;\n+\thw->vt_nodes = hw->port_nodes + hw->port_num;\n+\thw->cos_nodes = hw->vt_nodes + IPN3KE_TM_VT_NODE_NUM;\n+\thw->tdrop_profile = tdrop_profile;\n+\thw->tdrop_profile_num = IPN3KE_TM_TDROP_PROFILE_NUM;\n+\n+\tfor (i = 0, nodes = hw->port_nodes;\n+\t\ti < hw->port_num;\n+\t\ti++, nodes++) {\n+\t\tnodes->node_index = i;\n+\t\tnodes->level = IPN3KE_TM_NODE_LEVEL_PORT;\n+\t\tnodes->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\tnodes->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\tnodes->parent_node_id = RTE_TM_NODE_ID_NULL;\n+\t\tnodes->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\tnodes->weight = 0;\n+\t\tnodes->parent_node = NULL;\n+\t\tnodes->shaper_profile.valid = 0;\n+\t\tnodes->tdrop_profile = NULL;\n+\t\tnodes->n_children = 0;\n+\t\tTAILQ_INIT(&nodes->children_node_list);\n+\t}\n+\n+\tfor (i = 0, nodes = hw->vt_nodes;\n+\t\ti < IPN3KE_TM_VT_NODE_NUM;\n+\t\ti++, nodes++) {\n+\t\tnodes->node_index = i;\n+\t\tnodes->level = IPN3KE_TM_NODE_LEVEL_VT;\n+\t\tnodes->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\tnodes->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\tnodes->parent_node_id = RTE_TM_NODE_ID_NULL;\n+\t\tnodes->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\tnodes->weight = 0;\n+\t\tnodes->parent_node = NULL;\n+\t\tnodes->shaper_profile.valid = 0;\n+\t\tnodes->tdrop_profile = NULL;\n+\t\tnodes->n_children = 0;\n+\t\tTAILQ_INIT(&nodes->children_node_list);\n+\t}\n+\n+\tfor (i = 0, nodes = hw->cos_nodes;\n+\t\ti < IPN3KE_TM_COS_NODE_NUM;\n+\t\ti++, nodes++) {\n+\t\tnodes->node_index = i;\n+\t\tnodes->level = IPN3KE_TM_NODE_LEVEL_COS;\n+\t\tnodes->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\tnodes->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\tnodes->parent_node_id = RTE_TM_NODE_ID_NULL;\n+\t\tnodes->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\tnodes->weight = 0;\n+\t\tnodes->parent_node = NULL;\n+\t\tnodes->shaper_profile.valid = 0;\n+\t\tnodes->tdrop_profile = NULL;\n+\t\tnodes->n_children = 0;\n+\t\tTAILQ_INIT(&nodes->children_node_list);\n+\t}\n+\n+\tfor (i = 0, tdrop_profile = hw->tdrop_profile;\n+\t\ti < IPN3KE_TM_TDROP_PROFILE_NUM;\n+\t\ti++, tdrop_profile++) {\n+\t\ttdrop_profile->tdrop_profile_id = i;\n+\t\ttdrop_profile->n_users = 0;\n+\t\ttdrop_profile->valid = 0;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void\n+ipn3ke_tm_init(struct ipn3ke_rpst *rpst)\n+{\n+\tstruct ipn3ke_tm_internals *tm;\n+\tstruct ipn3ke_tm_node *port_node;\n+\n+\ttm = &rpst->tm;\n+\n+\tport_node = &rpst->hw->port_nodes[rpst->port_id];\n+\ttm->h.port_node = port_node;\n+\n+\ttm->h.n_shaper_profiles = 0;\n+\ttm->h.n_tdrop_profiles = 0;\n+\ttm->h.n_vt_nodes = 0;\n+\ttm->h.n_cos_nodes = 0;\n+\n+\ttm->h.port_commit_node = NULL;\n+\tTAILQ_INIT(&tm->h.vt_commit_node_list);\n+\tTAILQ_INIT(&tm->h.cos_commit_node_list);\n+\n+\ttm->hierarchy_frozen = 0;\n+\ttm->tm_started = 1;\n+\ttm->tm_id = rpst->port_id;\n+}\n+\n+static struct ipn3ke_tm_shaper_profile *\n+ipn3ke_hw_tm_shaper_profile_search(struct ipn3ke_hw *hw,\n+\tuint32_t shaper_profile_id, struct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_tm_shaper_profile *sp = NULL;\n+\tuint32_t level_of_node_id;\n+\tuint32_t node_index;\n+\n+\t/* Shaper profile ID must not be NONE. */\n+\tif (shaper_profile_id == RTE_TM_SHAPER_PROFILE_ID_NONE) {\n+\t\trte_tm_error_set(error,\n+\t\t\t\tEINVAL,\n+\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,\n+\t\t\t\tNULL,\n+\t\t\t\trte_strerror(EINVAL));\n+\n+\t\treturn NULL;\n+\t}\n+\n+\tlevel_of_node_id = shaper_profile_id / IPN3KE_TM_NODE_LEVEL_MOD;\n+\tnode_index = shaper_profile_id % IPN3KE_TM_NODE_LEVEL_MOD;\n+\n+\tswitch (level_of_node_id) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tif (node_index >= hw->port_num)\n+\t\t\trte_tm_error_set(error,\n+\t\t\t\t\tEEXIST,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EEXIST));\n+\t\telse\n+\t\t\tsp = &hw->port_nodes[node_index].shaper_profile;\n+\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tif (node_index >= IPN3KE_TM_VT_NODE_NUM)\n+\t\t\trte_tm_error_set(error,\n+\t\t\t\t\tEEXIST,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EEXIST));\n+\t\telse\n+\t\t\tsp = &hw->vt_nodes[node_index].shaper_profile;\n+\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tif (node_index >= IPN3KE_TM_COS_NODE_NUM)\n+\t\t\trte_tm_error_set(error,\n+\t\t\t\t\tEEXIST,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EEXIST));\n+\t\telse\n+\t\t\tsp = &hw->cos_nodes[node_index].shaper_profile;\n+\n+\t\tbreak;\n+\tdefault:\n+\t\trte_tm_error_set(error,\n+\t\t\t\tEEXIST,\n+\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,\n+\t\t\t\tNULL,\n+\t\t\t\trte_strerror(EEXIST));\n+\t}\n+\n+\treturn sp;\n+}\n+\n+static struct ipn3ke_tm_tdrop_profile *\n+ipn3ke_hw_tm_tdrop_profile_search(struct ipn3ke_hw *hw,\n+\tuint32_t tdrop_profile_id)\n+{\n+\tstruct ipn3ke_tm_tdrop_profile *tdrop_profile;\n+\n+\tif (tdrop_profile_id >= hw->tdrop_profile_num)\n+\t\treturn NULL;\n+\n+\ttdrop_profile = &hw->tdrop_profile[tdrop_profile_id];\n+\tif (tdrop_profile->valid)\n+\t\treturn tdrop_profile;\n+\n+\treturn NULL;\n+}\n+\n+static struct ipn3ke_tm_node *\n+ipn3ke_hw_tm_node_search(struct ipn3ke_hw *hw, uint32_t tm_id,\n+\tuint32_t node_id, uint32_t state_mask)\n+{\n+\tuint32_t level_of_node_id;\n+\tuint32_t node_index;\n+\tstruct ipn3ke_tm_node *n;\n+\n+\tlevel_of_node_id = node_id / IPN3KE_TM_NODE_LEVEL_MOD;\n+\tnode_index = node_id % IPN3KE_TM_NODE_LEVEL_MOD;\n+\n+\tswitch (level_of_node_id) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tif (node_index >= hw->port_num)\n+\t\t\treturn NULL;\n+\t\tn = &hw->port_nodes[node_index];\n+\n+\t\tbreak;\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tif (node_index >= IPN3KE_TM_VT_NODE_NUM)\n+\t\t\treturn NULL;\n+\t\tn = &hw->vt_nodes[node_index];\n+\n+\t\tbreak;\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tif (node_index >= IPN3KE_TM_COS_NODE_NUM)\n+\t\t\treturn NULL;\n+\t\tn = &hw->cos_nodes[node_index];\n+\n+\t\tbreak;\n+\tdefault:\n+\t\treturn NULL;\n+\t}\n+\n+\t/* Check tm node status */\n+\tif (n->node_state == IPN3KE_TM_NODE_STATE_IDLE) {\n+\t\tif (n->tm_id != RTE_TM_NODE_ID_NULL ||\n+\t\tn->parent_node_id != RTE_TM_NODE_ID_NULL ||\n+\t\tn->parent_node != NULL ||\n+\t\tn->n_children > 0) {\n+\t\t\tIPN3KE_AFU_PMD_ERR(\"tm node check error %d\", 1);\n+\t\t}\n+\t} else if (n->node_state < IPN3KE_TM_NODE_STATE_MAX) {\n+\t\tif (n->tm_id == RTE_TM_NODE_ID_NULL ||\n+\t\t(level_of_node_id != IPN3KE_TM_NODE_LEVEL_PORT &&\n+\t\t\tn->parent_node_id == RTE_TM_NODE_ID_NULL) ||\n+\t\t(level_of_node_id != IPN3KE_TM_NODE_LEVEL_PORT &&\n+\t\t\tn->parent_node == NULL)) {\n+\t\t\tIPN3KE_AFU_PMD_ERR(\"tm node check error %d\", 1);\n+\t\t}\n+\t} else {\n+\t\tIPN3KE_AFU_PMD_ERR(\"tm node check error %d\", 1);\n+\t}\n+\n+\tif (IPN3KE_BIT_ISSET(state_mask, n->node_state)) {\n+\t\tif (n->node_state == IPN3KE_TM_NODE_STATE_IDLE)\n+\t\t\treturn n;\n+\t\telse if (n->tm_id == tm_id)\n+\t\t\treturn n;\n+\t\telse\n+\t\t\treturn NULL;\n+\t} else {\n+\t\treturn NULL;\n+\t}\n+}\n+\n+/* Traffic manager node type get */\n+static int\n+ipn3ke_pmd_tm_node_type_get(struct rte_eth_dev *dev,\n+\tuint32_t node_id, int *is_leaf, struct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tuint32_t tm_id;\n+\tstruct ipn3ke_tm_node *node;\n+\tuint32_t state_mask;\n+\n+\tif (is_leaf == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\ttm_id = tm->tm_id;\n+\n+\tstate_mask = 0;\n+\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_COMMITTED);\n+\tnode = ipn3ke_hw_tm_node_search(hw, tm_id, node_id, state_mask);\n+\tif (node_id == RTE_TM_NODE_ID_NULL ||\n+\t\tnode == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t*is_leaf = (node->level == IPN3KE_TM_NODE_LEVEL_COS) ? 1 : 0;\n+\n+\treturn 0;\n+}\n+\n+#define WRED_SUPPORTED    0\n+\n+#define STATS_MASK_DEFAULT \\\n+\t(RTE_TM_STATS_N_PKTS | \\\n+\tRTE_TM_STATS_N_BYTES | \\\n+\tRTE_TM_STATS_N_PKTS_GREEN_DROPPED | \\\n+\tRTE_TM_STATS_N_BYTES_GREEN_DROPPED)\n+\n+#define STATS_MASK_QUEUE \\\n+\t(STATS_MASK_DEFAULT | RTE_TM_STATS_N_PKTS_QUEUED)\n+\n+/* Traffic manager capabilities get */\n+static int\n+ipn3ke_tm_capabilities_get(__rte_unused struct rte_eth_dev *dev,\n+\tstruct rte_tm_capabilities *cap, struct rte_tm_error *error)\n+{\n+\tif (cap == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_CAPABILITIES,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* set all the parameters to 0 first. */\n+\tmemset(cap, 0, sizeof(*cap));\n+\n+\tcap->n_nodes_max = 1 + IPN3KE_TM_COS_NODE_NUM + IPN3KE_TM_VT_NODE_NUM;\n+\tcap->n_levels_max = IPN3KE_TM_NODE_LEVEL_MAX;\n+\n+\tcap->non_leaf_nodes_identical = 0;\n+\tcap->leaf_nodes_identical = 1;\n+\n+\tcap->shaper_n_max = 1 + IPN3KE_TM_VT_NODE_NUM;\n+\tcap->shaper_private_n_max = 1 + IPN3KE_TM_VT_NODE_NUM;\n+\tcap->shaper_private_dual_rate_n_max = 0;\n+\tcap->shaper_private_rate_min = 1;\n+\tcap->shaper_private_rate_max = 1 + IPN3KE_TM_VT_NODE_NUM;\n+\n+\tcap->shaper_shared_n_max = 0;\n+\tcap->shaper_shared_n_nodes_per_shaper_max = 0;\n+\tcap->shaper_shared_n_shapers_per_node_max = 0;\n+\tcap->shaper_shared_dual_rate_n_max = 0;\n+\tcap->shaper_shared_rate_min = 0;\n+\tcap->shaper_shared_rate_max = 0;\n+\n+\tcap->shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;\n+\tcap->shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;\n+\n+\tcap->sched_n_children_max = IPN3KE_TM_COS_NODE_NUM;\n+\tcap->sched_sp_n_priorities_max = 3;\n+\tcap->sched_wfq_n_children_per_group_max = UINT32_MAX;\n+\tcap->sched_wfq_n_groups_max = 1;\n+\tcap->sched_wfq_weight_max = UINT32_MAX;\n+\n+\tcap->cman_wred_packet_mode_supported = 0;\n+\tcap->cman_wred_byte_mode_supported = 0;\n+\tcap->cman_head_drop_supported = 0;\n+\tcap->cman_wred_context_n_max = 0;\n+\tcap->cman_wred_context_private_n_max = 0;\n+\tcap->cman_wred_context_shared_n_max = 0;\n+\tcap->cman_wred_context_shared_n_nodes_per_context_max = 0;\n+\tcap->cman_wred_context_shared_n_contexts_per_node_max = 0;\n+\n+\t/**\n+\t * cap->mark_vlan_dei_supported = {0, 0, 0};\n+\t * cap->mark_ip_ecn_tcp_supported = {0, 0, 0};\n+\t * cap->mark_ip_ecn_sctp_supported = {0, 0, 0};\n+\t * cap->mark_ip_dscp_supported = {0, 0, 0};\n+\t */\n+\n+\tcap->dynamic_update_mask = 0;\n+\n+\tcap->stats_mask = 0;\n+\n+\treturn 0;\n+}\n+\n+/* Traffic manager level capabilities get */\n+static int\n+ipn3ke_tm_level_capabilities_get(struct rte_eth_dev *dev,\n+\tuint32_t level_id, struct rte_tm_level_capabilities *cap,\n+\tstruct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\n+\tif (cap == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_CAPABILITIES,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\tif (level_id >= IPN3KE_TM_NODE_LEVEL_MAX)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_LEVEL_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* set all the parameters to 0 first. */\n+\tmemset(cap, 0, sizeof(*cap));\n+\n+\tswitch (level_id) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tcap->n_nodes_max = hw->port_num;\n+\t\tcap->n_nodes_nonleaf_max = IPN3KE_TM_VT_NODE_NUM;\n+\t\tcap->n_nodes_leaf_max = 0;\n+\t\tcap->non_leaf_nodes_identical = 0;\n+\t\tcap->leaf_nodes_identical = 0;\n+\n+\t\tcap->nonleaf.shaper_private_supported = 0;\n+\t\tcap->nonleaf.shaper_private_dual_rate_supported = 0;\n+\t\tcap->nonleaf.shaper_private_rate_min = 1;\n+\t\tcap->nonleaf.shaper_private_rate_max = UINT32_MAX;\n+\t\tcap->nonleaf.shaper_shared_n_max = 0;\n+\n+\t\tcap->nonleaf.sched_n_children_max = IPN3KE_TM_VT_NODE_NUM;\n+\t\tcap->nonleaf.sched_sp_n_priorities_max = 1;\n+\t\tcap->nonleaf.sched_wfq_n_children_per_group_max = 0;\n+\t\tcap->nonleaf.sched_wfq_n_groups_max = 0;\n+\t\tcap->nonleaf.sched_wfq_weight_max = 0;\n+\n+\t\tcap->nonleaf.stats_mask = STATS_MASK_DEFAULT;\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tcap->n_nodes_max = IPN3KE_TM_VT_NODE_NUM;\n+\t\tcap->n_nodes_nonleaf_max = IPN3KE_TM_COS_NODE_NUM;\n+\t\tcap->n_nodes_leaf_max = 0;\n+\t\tcap->non_leaf_nodes_identical = 0;\n+\t\tcap->leaf_nodes_identical = 0;\n+\n+\t\tcap->nonleaf.shaper_private_supported = 0;\n+\t\tcap->nonleaf.shaper_private_dual_rate_supported = 0;\n+\t\tcap->nonleaf.shaper_private_rate_min = 1;\n+\t\tcap->nonleaf.shaper_private_rate_max = UINT32_MAX;\n+\t\tcap->nonleaf.shaper_shared_n_max = 0;\n+\n+\t\tcap->nonleaf.sched_n_children_max = IPN3KE_TM_COS_NODE_NUM;\n+\t\tcap->nonleaf.sched_sp_n_priorities_max = 1;\n+\t\tcap->nonleaf.sched_wfq_n_children_per_group_max = 0;\n+\t\tcap->nonleaf.sched_wfq_n_groups_max = 0;\n+\t\tcap->nonleaf.sched_wfq_weight_max = 0;\n+\n+\t\tcap->nonleaf.stats_mask = STATS_MASK_DEFAULT;\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tcap->n_nodes_max = IPN3KE_TM_COS_NODE_NUM;\n+\t\tcap->n_nodes_nonleaf_max = 0;\n+\t\tcap->n_nodes_leaf_max = IPN3KE_TM_COS_NODE_NUM;\n+\t\tcap->non_leaf_nodes_identical = 0;\n+\t\tcap->leaf_nodes_identical = 0;\n+\n+\t\tcap->leaf.shaper_private_supported = 0;\n+\t\tcap->leaf.shaper_private_dual_rate_supported = 0;\n+\t\tcap->leaf.shaper_private_rate_min = 0;\n+\t\tcap->leaf.shaper_private_rate_max = 0;\n+\t\tcap->leaf.shaper_shared_n_max = 0;\n+\n+\t\tcap->leaf.cman_head_drop_supported = 0;\n+\t\tcap->leaf.cman_wred_packet_mode_supported = WRED_SUPPORTED;\n+\t\tcap->leaf.cman_wred_byte_mode_supported = 0;\n+\t\tcap->leaf.cman_wred_context_private_supported = WRED_SUPPORTED;\n+\t\tcap->leaf.cman_wred_context_shared_n_max = 0;\n+\n+\t\tcap->leaf.stats_mask = STATS_MASK_QUEUE;\n+\t\tbreak;\n+\n+\tdefault:\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_LEVEL_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Traffic manager node capabilities get */\n+static int\n+ipn3ke_tm_node_capabilities_get(struct rte_eth_dev *dev,\n+\tuint32_t node_id, struct rte_tm_node_capabilities *cap,\n+\tstruct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_rpst *representor = IPN3KE_DEV_PRIVATE_TO_RPST(dev);\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tuint32_t tm_id;\n+\tstruct ipn3ke_tm_node *tm_node;\n+\tuint32_t state_mask;\n+\n+\tif (cap == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_CAPABILITIES,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\ttm_id = tm->tm_id;\n+\n+\tstate_mask = 0;\n+\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_COMMITTED);\n+\ttm_node = ipn3ke_hw_tm_node_search(hw, tm_id, node_id, state_mask);\n+\tif (tm_node == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\tif (tm_node->tm_id != representor->port_id)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* set all the parameters to 0 first. */\n+\tmemset(cap, 0, sizeof(*cap));\n+\n+\tswitch (tm_node->level) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tcap->shaper_private_supported = 1;\n+\t\tcap->shaper_private_dual_rate_supported = 0;\n+\t\tcap->shaper_private_rate_min = 1;\n+\t\tcap->shaper_private_rate_max = UINT32_MAX;\n+\t\tcap->shaper_shared_n_max = 0;\n+\n+\t\tcap->nonleaf.sched_n_children_max = IPN3KE_TM_VT_NODE_NUM;\n+\t\tcap->nonleaf.sched_sp_n_priorities_max = 1;\n+\t\tcap->nonleaf.sched_wfq_n_children_per_group_max =\n+\t\t\tIPN3KE_TM_VT_NODE_NUM;\n+\t\tcap->nonleaf.sched_wfq_n_groups_max = 1;\n+\t\tcap->nonleaf.sched_wfq_weight_max = 1;\n+\n+\t\tcap->stats_mask = STATS_MASK_DEFAULT;\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tcap->shaper_private_supported = 1;\n+\t\tcap->shaper_private_dual_rate_supported = 0;\n+\t\tcap->shaper_private_rate_min = 1;\n+\t\tcap->shaper_private_rate_max = UINT32_MAX;\n+\t\tcap->shaper_shared_n_max = 0;\n+\n+\t\tcap->nonleaf.sched_n_children_max = IPN3KE_TM_COS_NODE_NUM;\n+\t\tcap->nonleaf.sched_sp_n_priorities_max = 1;\n+\t\tcap->nonleaf.sched_wfq_n_children_per_group_max =\n+\t\t\tIPN3KE_TM_COS_NODE_NUM;\n+\t\tcap->nonleaf.sched_wfq_n_groups_max = 1;\n+\t\tcap->nonleaf.sched_wfq_weight_max = 1;\n+\n+\t\tcap->stats_mask = STATS_MASK_DEFAULT;\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tcap->shaper_private_supported = 0;\n+\t\tcap->shaper_private_dual_rate_supported = 0;\n+\t\tcap->shaper_private_rate_min = 0;\n+\t\tcap->shaper_private_rate_max = 0;\n+\t\tcap->shaper_shared_n_max = 0;\n+\n+\t\tcap->leaf.cman_head_drop_supported = 0;\n+\t\tcap->leaf.cman_wred_packet_mode_supported = WRED_SUPPORTED;\n+\t\tcap->leaf.cman_wred_byte_mode_supported = 0;\n+\t\tcap->leaf.cman_wred_context_private_supported = WRED_SUPPORTED;\n+\t\tcap->leaf.cman_wred_context_shared_n_max = 0;\n+\n+\t\tcap->stats_mask = STATS_MASK_QUEUE;\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_tm_shaper_parame_trans(struct rte_tm_shaper_params *profile,\n+\tstruct ipn3ke_tm_shaper_profile *local_profile,\n+\tconst struct ipn3ke_tm_shaper_params_range_type *ref_data)\n+{\n+\tuint32_t i;\n+\tconst struct ipn3ke_tm_shaper_params_range_type *r;\n+\tuint64_t rate;\n+\n+\trate = profile->peak.rate;\n+\tfor (i = 0, r = ref_data; i < IPN3KE_TM_SHAPER_RANGE_NUM; i++, r++) {\n+\t\tif (rate >= r->low &&\n+\t\trate <= r->high) {\n+\t\t\tlocal_profile->m = (rate / 4) / r->exp2;\n+\t\t\tlocal_profile->e = r->exp;\n+\t\t\tlocal_profile->rate = rate;\n+\n+\t\t\treturn 0;\n+\t\t}\n+\t}\n+\n+\treturn -1;\n+}\n+\n+static int\n+ipn3ke_tm_shaper_profile_add(struct rte_eth_dev *dev,\n+\tuint32_t shaper_profile_id, struct rte_tm_shaper_params *profile,\n+\tstruct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tstruct ipn3ke_tm_shaper_profile *sp;\n+\n+\t/* Shaper profile must not exist. */\n+\tsp = ipn3ke_hw_tm_shaper_profile_search(hw, shaper_profile_id, error);\n+\tif (!sp || (sp && sp->valid))\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEEXIST,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EEXIST));\n+\n+\t/* Profile must not be NULL. */\n+\tif (profile == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* Peak rate: non-zero, 32-bit */\n+\tif (profile->peak.rate == 0 ||\n+\t\tprofile->peak.rate > IPN3KE_TM_SHAPER_PEAK_RATE_MAX)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\tEINVAL,\n+\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_RATE,\n+\t\t\t\tNULL,\n+\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* Peak size: non-zero, 32-bit */\n+\tif (profile->peak.size != 0)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\tEINVAL,\n+\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_SIZE,\n+\t\t\t\tNULL,\n+\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* Dual-rate profiles are not supported. */\n+\tif (profile->committed.rate > IPN3KE_TM_SHAPER_COMMITTED_RATE_MAX)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\tEINVAL,\n+\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_RATE,\n+\t\t\t\tNULL,\n+\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* Packet length adjust: 24 bytes */\n+\tif (profile->pkt_length_adjust != 0)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\tEINVAL,\n+\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_PKT_ADJUST_LEN,\n+\t\t\t\tNULL,\n+\t\t\t\trte_strerror(EINVAL));\n+\n+\tif (ipn3ke_tm_shaper_parame_trans(profile,\n+\t\t\t\t\tsp,\n+\t\t\t\t\tipn3ke_tm_shaper_params_rang)) {\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\tEINVAL,\n+\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_RATE,\n+\t\t\t\tNULL,\n+\t\t\t\trte_strerror(EINVAL));\n+\t} else {\n+\t\tsp->valid = 1;\n+\t\trte_memcpy(&sp->params, profile, sizeof(sp->params));\n+\t}\n+\n+\ttm->h.n_shaper_profiles++;\n+\n+\treturn 0;\n+}\n+\n+/* Traffic manager shaper profile delete */\n+static int\n+ipn3ke_tm_shaper_profile_delete(struct rte_eth_dev *dev,\n+\tuint32_t shaper_profile_id, struct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tstruct ipn3ke_tm_shaper_profile *sp;\n+\n+\t/* Check existing */\n+\tsp = ipn3ke_hw_tm_shaper_profile_search(hw, shaper_profile_id, error);\n+\tif (!sp || (sp && !sp->valid))\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\tsp->valid = 0;\n+\ttm->h.n_shaper_profiles--;\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_tm_tdrop_profile_check(__rte_unused struct rte_eth_dev *dev,\n+\tuint32_t tdrop_profile_id, struct rte_tm_wred_params *profile,\n+\tstruct rte_tm_error *error)\n+{\n+\tenum rte_tm_color color;\n+\n+\t/* TDROP profile ID must not be NONE. */\n+\tif (tdrop_profile_id == RTE_TM_WRED_PROFILE_ID_NONE)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_WRED_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* Profile must not be NULL. */\n+\tif (profile == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_WRED_PROFILE,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* TDROP profile should be in packet mode */\n+\tif (profile->packet_mode != 0)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tENOTSUP,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_WRED_PROFILE,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(ENOTSUP));\n+\n+\t/* min_th <= max_th, max_th > 0  */\n+\tfor (color = RTE_TM_GREEN; color <= RTE_TM_GREEN; color++) {\n+\t\tuint64_t min_th = profile->red_params[color].min_th;\n+\t\tuint64_t max_th = profile->red_params[color].max_th;\n+\n+\t\tif (((min_th >> IPN3KE_TDROP_TH1_SHIFT) >>\n+\t\t\t\tIPN3KE_TDROP_TH1_SHIFT) ||\n+\t\t\tmax_th != 0)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_WRED_PROFILE,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_hw_tm_tdrop_wr(struct ipn3ke_hw *hw,\n+\t\t\t\tstruct ipn3ke_tm_tdrop_profile *tp)\n+{\n+\tif (tp->valid) {\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_CCB_PROFILE_MS,\n+\t\t\t\t0,\n+\t\t\t\ttp->th2,\n+\t\t\t\tIPN3KE_CCB_PROFILE_MS_MASK);\n+\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_CCB_PROFILE_P,\n+\t\t\t\ttp->tdrop_profile_id,\n+\t\t\t\ttp->th1,\n+\t\t\t\tIPN3KE_CCB_PROFILE_MASK);\n+\t} else {\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_CCB_PROFILE_MS,\n+\t\t\t\t0,\n+\t\t\t\t0,\n+\t\t\t\tIPN3KE_CCB_PROFILE_MS_MASK);\n+\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_CCB_PROFILE_P,\n+\t\t\t\ttp->tdrop_profile_id,\n+\t\t\t\t0,\n+\t\t\t\tIPN3KE_CCB_PROFILE_MASK);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Traffic manager TDROP profile add */\n+static int\n+ipn3ke_tm_tdrop_profile_add(struct rte_eth_dev *dev,\n+\tuint32_t tdrop_profile_id, struct rte_tm_wred_params *profile,\n+\tstruct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tstruct ipn3ke_tm_tdrop_profile *tp;\n+\tint status;\n+\tuint64_t min_th;\n+\tuint32_t th1, th2;\n+\n+\t/* Check input params */\n+\tstatus = ipn3ke_tm_tdrop_profile_check(dev,\n+\t\t\t\t\ttdrop_profile_id,\n+\t\t\t\t\tprofile,\n+\t\t\t\t\terror);\n+\tif (status)\n+\t\treturn status;\n+\n+\t/* Memory allocation */\n+\ttp = &hw->tdrop_profile[tdrop_profile_id];\n+\n+\t/* Fill in */\n+\ttp->valid = 1;\n+\tmin_th = profile->red_params[RTE_TM_GREEN].min_th;\n+\tth1 = (uint32_t)(min_th & IPN3KE_TDROP_TH1_MASK);\n+\tth2 = (uint32_t)((min_th >> IPN3KE_TDROP_TH1_SHIFT) &\n+\t\t\tIPN3KE_TDROP_TH2_MASK);\n+\ttp->th1 = th1;\n+\ttp->th2 = th2;\n+\trte_memcpy(&tp->params, profile, sizeof(tp->params));\n+\n+\t/* Add to list */\n+\ttm->h.n_tdrop_profiles++;\n+\n+\t/* Write FPGA */\n+\tipn3ke_hw_tm_tdrop_wr(hw, tp);\n+\n+\treturn 0;\n+}\n+\n+/* Traffic manager TDROP profile delete */\n+static int\n+ipn3ke_tm_tdrop_profile_delete(struct rte_eth_dev *dev,\n+\tuint32_t tdrop_profile_id, struct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tstruct ipn3ke_tm_tdrop_profile *tp;\n+\n+\t/* Check existing */\n+\ttp = ipn3ke_hw_tm_tdrop_profile_search(hw, tdrop_profile_id);\n+\tif (tp == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_WRED_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* Check unused */\n+\tif (tp->n_users)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEBUSY,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_WRED_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EBUSY));\n+\n+\t/* Set free */\n+\ttp->valid = 0;\n+\ttm->h.n_tdrop_profiles--;\n+\n+\t/* Write FPGA */\n+\tipn3ke_hw_tm_tdrop_wr(hw, tp);\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_tm_node_add_check_parameter(uint32_t tm_id,\n+\tuint32_t node_id, uint32_t parent_node_id, uint32_t priority,\n+\tuint32_t weight, uint32_t level_id, struct rte_tm_node_params *params,\n+\tstruct rte_tm_error *error)\n+{\n+\tuint32_t level_of_node_id;\n+\tuint32_t node_index;\n+\tuint32_t parent_level_id;\n+\n+\tif (node_id == RTE_TM_NODE_ID_NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* priority: must be 0, 1, 2, 3 */\n+\tif (priority > IPN3KE_TM_NODE_PRIORITY_HIGHEST)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PRIORITY,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* weight: must be 1 .. 255 */\n+\tif (weight > IPN3KE_TM_NODE_WEIGHT_MAX)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_WEIGHT,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* check node id and parent id*/\n+\tlevel_of_node_id = node_id / IPN3KE_TM_NODE_LEVEL_MOD;\n+\tif (level_of_node_id != level_id)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\tnode_index = node_id % IPN3KE_TM_NODE_LEVEL_MOD;\n+\tparent_level_id = parent_node_id / IPN3KE_TM_NODE_LEVEL_MOD;\n+\tswitch (level_id) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tif (node_index != tm_id)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\tif (parent_node_id != RTE_TM_NODE_ID_NULL)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tif (node_index >= IPN3KE_TM_VT_NODE_NUM)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\tif (parent_level_id != IPN3KE_TM_NODE_LEVEL_PORT)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tif (node_index >= IPN3KE_TM_COS_NODE_NUM)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\tif (parent_level_id != IPN3KE_TM_NODE_LEVEL_VT)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_LEVEL_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t}\n+\n+\t/* params: must not be NULL */\n+\tif (params == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARAMS,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t/* No shared shapers */\n+\tif (params->n_shared_shapers != 0)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\tEINVAL,\n+\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_SHAPERS,\n+\t\t\t\tNULL,\n+\t\t\t\trte_strerror(EINVAL));\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_tm_node_add_check_mount(uint32_t tm_id,\n+\tuint32_t node_id, uint32_t parent_node_id, uint32_t level_id,\n+\tstruct rte_tm_error *error)\n+{\n+\t/*struct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);*/\n+\tuint32_t node_index;\n+\tuint32_t parent_index;\n+\tuint32_t parent_index1;\n+\n+\tnode_index = node_id % IPN3KE_TM_NODE_LEVEL_MOD;\n+\tparent_index = parent_node_id % IPN3KE_TM_NODE_LEVEL_MOD;\n+\tparent_index1 = node_index / IPN3KE_TM_NODE_MOUNT_MAX;\n+\tswitch (level_id) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tif (parent_index != tm_id)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tif (parent_index != parent_index1)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_LEVEL_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Traffic manager node add */\n+static int\n+ipn3ke_tm_node_add(struct rte_eth_dev *dev,\n+\tuint32_t node_id, uint32_t parent_node_id, uint32_t priority,\n+\tuint32_t weight, uint32_t level_id, struct rte_tm_node_params *params,\n+\tstruct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tuint32_t tm_id;\n+\tstruct ipn3ke_tm_node *n, *parent_node;\n+\tuint32_t node_state, state_mask;\n+\tint status;\n+\n+\t/* Checks */\n+\tif (tm->hierarchy_frozen)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEBUSY,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EBUSY));\n+\n+\ttm_id = tm->tm_id;\n+\n+\tstatus = ipn3ke_tm_node_add_check_parameter(tm_id,\n+\t\t\t\t\t\tnode_id,\n+\t\t\t\t\t\tparent_node_id,\n+\t\t\t\t\t\tpriority,\n+\t\t\t\t\t\tweight,\n+\t\t\t\t\t\tlevel_id,\n+\t\t\t\t\t\tparams,\n+\t\t\t\t\t\terror);\n+\tif (status)\n+\t\treturn status;\n+\n+\tstatus = ipn3ke_tm_node_add_check_mount(tm_id,\n+\t\t\t\t\t\tnode_id,\n+\t\t\t\t\t\tparent_node_id,\n+\t\t\t\t\t\tlevel_id,\n+\t\t\t\t\t\terror);\n+\tif (status)\n+\t\treturn status;\n+\n+\t/* Shaper profile ID must not be NONE. */\n+\tif (params->shaper_profile_id != RTE_TM_SHAPER_PROFILE_ID_NONE &&\n+\t\tparams->shaper_profile_id != node_id)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* Memory allocation */\n+\tstate_mask = 0;\n+\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_IDLE);\n+\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_CONFIGURED_DEL);\n+\tn = ipn3ke_hw_tm_node_search(hw, tm_id, node_id, state_mask);\n+\tif (!n)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\tnode_state = n->node_state;\n+\n+\t/* Check parent node */\n+\tstate_mask = 0;\n+\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_CONFIGURED_ADD);\n+\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_COMMITTED);\n+\tif (parent_node_id != RTE_TM_NODE_ID_NULL) {\n+\t\tparent_node = ipn3ke_hw_tm_node_search(hw,\n+\t\t\t\t\t\t\ttm_id,\n+\t\t\t\t\t\t\tparent_node_id,\n+\t\t\t\t\t\t\tstate_mask);\n+\t\tif (!parent_node)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t} else {\n+\t\tparent_node = NULL;\n+\t}\n+\n+\tswitch (level_id) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_CONFIGURED_ADD;\n+\t\tn->tm_id = tm_id;\n+\t\ttm->h.port_commit_node = n;\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tif (node_state == IPN3KE_TM_NODE_STATE_IDLE) {\n+\t\t\tTAILQ_INSERT_TAIL(&tm->h.vt_commit_node_list, n, node);\n+\t\t\tif (parent_node)\n+\t\t\t\tparent_node->n_children++;\n+\t\t\ttm->h.n_vt_nodes++;\n+\t\t} else if (node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_DEL) {\n+\t\t\tif (parent_node)\n+\t\t\t\tparent_node->n_children++;\n+\t\t\ttm->h.n_vt_nodes++;\n+\t\t}\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_CONFIGURED_ADD;\n+\t\tn->parent_node_id = parent_node_id;\n+\t\tn->tm_id = tm_id;\n+\t\tn->parent_node = parent_node;\n+\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tif (node_state == IPN3KE_TM_NODE_STATE_IDLE) {\n+\t\t\tTAILQ_INSERT_TAIL(&tm->h.cos_commit_node_list,\n+\t\t\t\tn, node);\n+\t\t\tif (parent_node)\n+\t\t\t\tparent_node->n_children++;\n+\t\t\ttm->h.n_cos_nodes++;\n+\t\t} else if (node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_DEL) {\n+\t\t\tif (parent_node)\n+\t\t\t\tparent_node->n_children++;\n+\t\t\ttm->h.n_cos_nodes++;\n+\t\t}\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_CONFIGURED_ADD;\n+\t\tn->parent_node_id = parent_node_id;\n+\t\tn->tm_id = tm_id;\n+\t\tn->parent_node = parent_node;\n+\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_LEVEL_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t}\n+\n+\t/* Fill in */\n+\tn->priority = priority;\n+\tn->weight = weight;\n+\n+\tif (n->level == IPN3KE_TM_NODE_LEVEL_COS &&\n+\t\tparams->leaf.cman == RTE_TM_CMAN_TAIL_DROP)\n+\t\tn->tdrop_profile = ipn3ke_hw_tm_tdrop_profile_search(hw,\n+\t\t\tparams->leaf.wred.wred_profile_id);\n+\n+\trte_memcpy(&n->params, params, sizeof(n->params));\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_tm_node_del_check_parameter(uint32_t tm_id,\n+\tuint32_t node_id, struct rte_tm_error *error)\n+{\n+\tuint32_t level_of_node_id;\n+\tuint32_t node_index;\n+\n+\tif (node_id == RTE_TM_NODE_ID_NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\t/* check node id and parent id*/\n+\tlevel_of_node_id = node_id / IPN3KE_TM_NODE_LEVEL_MOD;\n+\tnode_index = node_id % IPN3KE_TM_NODE_LEVEL_MOD;\n+\tswitch (level_of_node_id) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tif (node_index != tm_id)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tif (node_index >= IPN3KE_TM_VT_NODE_NUM)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tif (node_index >= IPN3KE_TM_COS_NODE_NUM)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_LEVEL_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Traffic manager node delete */\n+static int\n+ipn3ke_pmd_tm_node_delete(struct rte_eth_dev *dev,\n+\tuint32_t node_id, struct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tstruct ipn3ke_tm_node *n, *parent_node;\n+\tuint32_t tm_id;\n+\tint status;\n+\tuint32_t level_of_node_id;\n+\tuint32_t node_state;\n+\tuint32_t state_mask;\n+\n+\t/* Check hierarchy changes are currently allowed */\n+\tif (tm->hierarchy_frozen)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEBUSY,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EBUSY));\n+\n+\ttm_id = tm->tm_id;\n+\n+\tstatus = ipn3ke_tm_node_del_check_parameter(tm_id,\n+\t\t\t\t\t\tnode_id,\n+\t\t\t\t\t\terror);\n+\tif (status)\n+\t\treturn status;\n+\n+\t/* Check existing */\n+\tstate_mask = 0;\n+\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_CONFIGURED_ADD);\n+\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_COMMITTED);\n+\tn = ipn3ke_hw_tm_node_search(hw, tm_id, node_id, state_mask);\n+\tif (n == NULL)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\tif (n->n_children > 0)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\n+\tnode_state = n->node_state;\n+\n+\tlevel_of_node_id = node_id / IPN3KE_TM_NODE_LEVEL_MOD;\n+\n+\t/* Check parent node */\n+\tif (n->parent_node_id != RTE_TM_NODE_ID_NULL) {\n+\t\tstate_mask = 0;\n+\t\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_CONFIGURED_ADD);\n+\t\tIPN3KE_BIT_SET(state_mask, IPN3KE_TM_NODE_STATE_COMMITTED);\n+\t\tparent_node = ipn3ke_hw_tm_node_search(hw,\n+\t\t\t\t\t\ttm_id,\n+\t\t\t\t\t\tn->parent_node_id,\n+\t\t\t\t\t\tstate_mask);\n+\t\tif (!parent_node)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t\tif (n->parent_node != parent_node)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t} else {\n+\t\tparent_node = NULL;\n+\t}\n+\n+\tswitch (level_of_node_id) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\tif (tm->h.port_node != n)\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_CONFIGURED_DEL;\n+\t\ttm->h.port_commit_node = n;\n+\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\tif (node_state == IPN3KE_TM_NODE_STATE_COMMITTED) {\n+\t\t\tif (parent_node)\n+\t\t\t\tTAILQ_REMOVE(&parent_node->children_node_list,\n+\t\t\t\t\tn, node);\n+\t\t\tTAILQ_INSERT_TAIL(&tm->h.vt_commit_node_list, n, node);\n+\t\t\tif (parent_node)\n+\t\t\t\tparent_node->n_children--;\n+\t\t\ttm->h.n_vt_nodes--;\n+\t\t} else if (node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_ADD) {\n+\t\t\tif (parent_node)\n+\t\t\t\tparent_node->n_children--;\n+\t\t\ttm->h.n_vt_nodes--;\n+\t\t}\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_CONFIGURED_DEL;\n+\n+\t\tbreak;\n+\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\tif (node_state == IPN3KE_TM_NODE_STATE_COMMITTED) {\n+\t\t\tif (parent_node)\n+\t\t\t\tTAILQ_REMOVE(&parent_node->children_node_list,\n+\t\t\t\t\tn, node);\n+\t\t\tTAILQ_INSERT_TAIL(&tm->h.cos_commit_node_list,\n+\t\t\t\tn, node);\n+\t\t\tif (parent_node)\n+\t\t\t\tparent_node->n_children--;\n+\t\t\ttm->h.n_cos_nodes--;\n+\t\t} else if (node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_ADD) {\n+\t\t\tif (parent_node)\n+\t\t\t\tparent_node->n_children--;\n+\t\t\ttm->h.n_cos_nodes--;\n+\t\t}\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_CONFIGURED_DEL;\n+\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_LEVEL_ID,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_tm_hierarchy_commit_check(struct rte_eth_dev *dev,\n+\t\t\t\t\t\tstruct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tuint32_t tm_id;\n+\tstruct ipn3ke_tm_node_list *nl;\n+\tstruct ipn3ke_tm_node *n, *parent_node;\n+\n+\ttm_id = tm->tm_id;\n+\n+\tnl = &tm->h.cos_commit_node_list;\n+\tTAILQ_FOREACH(n, nl, node) {\n+\t\tparent_node = n->parent_node;\n+\t\tif (n->node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_ADD) {\n+\t\t\tif (n->parent_node_id == RTE_TM_NODE_ID_NULL ||\n+\t\t\t\tn->level != IPN3KE_TM_NODE_LEVEL_COS ||\n+\t\t\t\tn->tm_id != tm_id ||\n+\t\t\t\tparent_node == NULL ||\n+\t\t\t\t(parent_node &&\n+\t\t\t\t\tparent_node->node_state ==\n+\t\t\t\t\tIPN3KE_TM_NODE_STATE_CONFIGURED_DEL) ||\n+\t\t\t\t(parent_node &&\n+\t\t\t\t\tparent_node->node_state ==\n+\t\t\t\t\t\tIPN3KE_TM_NODE_STATE_IDLE) ||\n+\t\t\t\tn->shaper_profile.valid == 0) {\n+\t\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t\t}\n+\t\t} else if (n->node_state ==\n+\t\t\t\tIPN3KE_TM_NODE_STATE_CONFIGURED_DEL) {\n+\t\t\tif (n->level != IPN3KE_TM_NODE_LEVEL_COS ||\n+\t\t\t\tn->n_children != 0) {\n+\t\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t\t} else {\n+\t\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tnl = &tm->h.vt_commit_node_list;\n+\tTAILQ_FOREACH(n, nl, node) {\n+\t\tparent_node = n->parent_node;\n+\t\tif (n->node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_ADD) {\n+\t\t\tif (n->parent_node_id == RTE_TM_NODE_ID_NULL ||\n+\t\t\t\tn->level != IPN3KE_TM_NODE_LEVEL_VT ||\n+\t\t\t\tn->tm_id != tm_id ||\n+\t\t\t\tparent_node == NULL ||\n+\t\t\t\t(parent_node &&\n+\t\t\t\t\tparent_node->node_state ==\n+\t\t\t\t\tIPN3KE_TM_NODE_STATE_CONFIGURED_DEL) ||\n+\t\t\t\t(parent_node &&\n+\t\t\t\t\tparent_node->node_state ==\n+\t\t\t\t\t\tIPN3KE_TM_NODE_STATE_IDLE) ||\n+\t\t\t\tn->shaper_profile.valid == 0) {\n+\t\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t\t}\n+\t\t} else if (n->node_state ==\n+\t\t\tIPN3KE_TM_NODE_STATE_CONFIGURED_DEL) {\n+\t\t\tif (n->level != IPN3KE_TM_NODE_LEVEL_VT ||\n+\t\t\t\tn->n_children != 0) {\n+\t\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t\t} else {\n+\t\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tn = tm->h.port_commit_node;\n+\tif (n &&\n+\t\t(n->parent_node_id != RTE_TM_NODE_ID_NULL ||\n+\t\tn->level != IPN3KE_TM_NODE_LEVEL_PORT ||\n+\t\tn->tm_id != tm_id ||\n+\t\tn->parent_node != NULL ||\n+\t\tn->shaper_profile.valid == 0)) {\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEINVAL,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EINVAL));\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_hw_tm_node_wr(struct ipn3ke_hw *hw,\n+\t\t\t\tstruct ipn3ke_tm_node *n)\n+{\n+\tuint32_t level;\n+\n+\tlevel = n->level;\n+\n+\tswitch (level) {\n+\tcase IPN3KE_TM_NODE_LEVEL_PORT:\n+\t\t/**\n+\t\t * Configure Type\n+\t\t */\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QOS_TYPE_L3_X,\n+\t\t\t\tn->node_index,\n+\t\t\t\tn->priority,\n+\t\t\t\tIPN3KE_QOS_TYPE_MASK);\n+\n+\t\t/**\n+\t\t * Configure Sch_wt\n+\t\t */\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QOS_SCH_WT_L3_X,\n+\t\t\t\tn->node_index,\n+\t\t\t\tn->weight,\n+\t\t\t\tIPN3KE_QOS_SCH_WT_MASK);\n+\n+\t\t/**\n+\t\t * Configure Shap_wt\n+\t\t */\n+\t\tif (n->shaper_profile.valid)\n+\t\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\t\tIPN3KE_QOS_SHAP_WT_L3_X,\n+\t\t\t\t\tn->node_index,\n+\t\t\t\t\t((n->shaper_profile.e << 10) |\n+\t\t\t\t\t\tn->shaper_profile.m),\n+\t\t\t\t\tIPN3KE_QOS_SHAP_WT_MASK);\n+\n+\t\tbreak;\n+\tcase IPN3KE_TM_NODE_LEVEL_VT:\n+\t\t/**\n+\t\t * Configure Type\n+\t\t */\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QOS_TYPE_L2_X,\n+\t\t\t\tn->node_index,\n+\t\t\t\tn->priority,\n+\t\t\t\tIPN3KE_QOS_TYPE_MASK);\n+\n+\t\t/**\n+\t\t * Configure Sch_wt\n+\t\t */\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QOS_SCH_WT_L2_X,\n+\t\t\t\tn->node_index,\n+\t\t\t\tn->weight,\n+\t\t\t\tIPN3KE_QOS_SCH_WT_MASK);\n+\n+\t\t/**\n+\t\t * Configure Shap_wt\n+\t\t */\n+\t\tif (n->shaper_profile.valid)\n+\t\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\t\tIPN3KE_QOS_SHAP_WT_L2_X,\n+\t\t\t\t\tn->node_index,\n+\t\t\t\t\t((n->shaper_profile.e << 10) |\n+\t\t\t\t\t\tn->shaper_profile.m),\n+\t\t\t\t\tIPN3KE_QOS_SHAP_WT_MASK);\n+\n+\t\t/**\n+\t\t * Configure Map\n+\t\t */\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QOS_MAP_L2_X,\n+\t\t\t\tn->node_index,\n+\t\t\t\tn->parent_node->node_index,\n+\t\t\t\tIPN3KE_QOS_MAP_L2_MASK);\n+\n+\t\tbreak;\n+\tcase IPN3KE_TM_NODE_LEVEL_COS:\n+\t\t/**\n+\t\t * Configure Tail Drop mapping\n+\t\t */\n+\t\tif (n->tdrop_profile && n->tdrop_profile->valid) {\n+\t\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\t\tIPN3KE_CCB_QPROFILE_Q,\n+\t\t\t\t\tn->node_index,\n+\t\t\t\t\tn->tdrop_profile->tdrop_profile_id,\n+\t\t\t\t\tIPN3KE_CCB_QPROFILE_MASK);\n+\t\t}\n+\n+\t\t/**\n+\t\t * Configure Type\n+\t\t */\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QOS_TYPE_L1_X,\n+\t\t\t\tn->node_index,\n+\t\t\t\tn->priority,\n+\t\t\t\tIPN3KE_QOS_TYPE_MASK);\n+\n+\t\t/**\n+\t\t * Configure Sch_wt\n+\t\t */\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QOS_SCH_WT_L1_X,\n+\t\t\t\tn->node_index,\n+\t\t\t\tn->weight,\n+\t\t\t\tIPN3KE_QOS_SCH_WT_MASK);\n+\n+\t\t/**\n+\t\t * Configure Shap_wt\n+\t\t */\n+\t\tif (n->shaper_profile.valid)\n+\t\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\t\tIPN3KE_QOS_SHAP_WT_L1_X,\n+\t\t\t\t\tn->node_index,\n+\t\t\t\t\t((n->shaper_profile.e << 10) |\n+\t\t\t\t\t\tn->shaper_profile.m),\n+\t\t\t\t\tIPN3KE_QOS_SHAP_WT_MASK);\n+\n+\t\t/**\n+\t\t * Configure COS queue to port\n+\t\t */\n+\t\twhile (IPN3KE_MASK_READ_REG(hw,\n+\t\t\t\t\tIPN3KE_QM_UID_CONFIG_CTRL,\n+\t\t\t\t\t0,\n+\t\t\t\t\t0x80000000))\n+\t\t\t;\n+\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\tIPN3KE_QM_UID_CONFIG_DATA,\n+\t\t\t0,\n+\t\t\t(1 << 8 | n->parent_node->parent_node->node_index),\n+\t\t\t0x1FF);\n+\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QM_UID_CONFIG_CTRL,\n+\t\t\t\t0,\n+\t\t\t\tn->node_index,\n+\t\t\t\t0xFFFFF);\n+\n+\t\twhile (IPN3KE_MASK_READ_REG(hw,\n+\t\t\t\t\tIPN3KE_QM_UID_CONFIG_CTRL,\n+\t\t\t\t\t0,\n+\t\t\t\t\t0x80000000))\n+\t\t\t;\n+\n+\t\t/**\n+\t\t * Configure Map\n+\t\t */\n+\t\tIPN3KE_MASK_WRITE_REG(hw,\n+\t\t\t\tIPN3KE_QOS_MAP_L1_X,\n+\t\t\t\tn->node_index,\n+\t\t\t\tn->parent_node->node_index,\n+\t\t\t\tIPN3KE_QOS_MAP_L1_MASK);\n+\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -1;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_tm_hierarchy_hw_commit(struct rte_eth_dev *dev,\n+\t\t\t\t\tstruct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tstruct ipn3ke_tm_node_list *nl;\n+\tstruct ipn3ke_tm_node *n, *nn, *parent_node;\n+\n+\tn = tm->h.port_commit_node;\n+\tif (n) {\n+\t\tif (n->node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_ADD) {\n+\t\t\ttm->h.port_commit_node = NULL;\n+\n+\t\t\tn->node_state = IPN3KE_TM_NODE_STATE_COMMITTED;\n+\t\t} else if (n->node_state ==\n+\t\t\t\t\tIPN3KE_TM_NODE_STATE_CONFIGURED_DEL) {\n+\t\t\ttm->h.port_commit_node = NULL;\n+\n+\t\t\tn->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\t\tn->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\t\tn->weight = 0;\n+\t\t\tn->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\t} else {\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t}\n+\t\tipn3ke_hw_tm_node_wr(hw, n);\n+\t}\n+\n+\tnl = &tm->h.vt_commit_node_list;\n+\tfor (n = TAILQ_FIRST(nl); n != NULL; n = nn) {\n+\t\tnn = TAILQ_NEXT(n, node);\n+\t\tif (n->node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_ADD) {\n+\t\t\tn->node_state = IPN3KE_TM_NODE_STATE_COMMITTED;\n+\t\t\tparent_node = n->parent_node;\n+\t\t\tTAILQ_REMOVE(nl, n, node);\n+\t\t\tTAILQ_INSERT_TAIL(&parent_node->children_node_list,\n+\t\t\t\t\t\tn, node);\n+\t\t} else if (n->node_state ==\n+\t\t\t\t\tIPN3KE_TM_NODE_STATE_CONFIGURED_DEL) {\n+\t\t\tparent_node = n->parent_node;\n+\t\t\tTAILQ_REMOVE(nl, n, node);\n+\n+\t\t\tn->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\t\tn->parent_node_id = RTE_TM_NODE_ID_NULL;\n+\t\t\tn->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\t\tn->weight = 0;\n+\t\t\tn->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\t\tn->parent_node = NULL;\n+\t\t} else {\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t}\n+\t\tipn3ke_hw_tm_node_wr(hw, n);\n+\t}\n+\n+\tnl = &tm->h.cos_commit_node_list;\n+\tfor (n = TAILQ_FIRST(nl); n != NULL; n = nn) {\n+\t\tnn = TAILQ_NEXT(n, node);\n+\t\tif (n->node_state == IPN3KE_TM_NODE_STATE_CONFIGURED_ADD) {\n+\t\t\tn->node_state = IPN3KE_TM_NODE_STATE_COMMITTED;\n+\t\t\tparent_node = n->parent_node;\n+\t\t\tTAILQ_REMOVE(nl, n, node);\n+\t\t\tTAILQ_INSERT_TAIL(&parent_node->children_node_list,\n+\t\t\t\t\tn, node);\n+\t\t} else if (n->node_state ==\n+\t\t\t\t\tIPN3KE_TM_NODE_STATE_CONFIGURED_DEL) {\n+\t\t\tn->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\t\tparent_node = n->parent_node;\n+\t\t\tTAILQ_REMOVE(nl, n, node);\n+\n+\t\t\tn->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\t\tn->parent_node_id = RTE_TM_NODE_ID_NULL;\n+\t\t\tn->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\t\tn->weight = 0;\n+\t\t\tn->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\t\tn->parent_node = NULL;\n+\n+\t\t\tif (n->tdrop_profile)\n+\t\t\t\tn->tdrop_profile->n_users--;\n+\t\t} else {\n+\t\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\t\tEINVAL,\n+\t\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\trte_strerror(EINVAL));\n+\t\t}\n+\t\tipn3ke_hw_tm_node_wr(hw, n);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_tm_hierarchy_commit_clear(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tstruct ipn3ke_tm_node_list *nl;\n+\tstruct ipn3ke_tm_node *n;\n+\tstruct ipn3ke_tm_node *nn;\n+\n+\tn = tm->h.port_commit_node;\n+\tif (n) {\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\tn->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\tn->weight = 0;\n+\t\tn->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\tn->n_children = 0;\n+\n+\t\ttm->h.port_commit_node = NULL;\n+\t}\n+\n+\tnl = &tm->h.vt_commit_node_list;\n+\tfor (n = TAILQ_FIRST(nl); n != NULL; n = nn) {\n+\t\tnn = TAILQ_NEXT(n, node);\n+\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\tn->parent_node_id = RTE_TM_NODE_ID_NULL;\n+\t\tn->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\tn->weight = 0;\n+\t\tn->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\tn->parent_node = NULL;\n+\t\tn->n_children = 0;\n+\t\ttm->h.n_vt_nodes--;\n+\n+\t\tTAILQ_REMOVE(nl, n, node);\n+\t}\n+\n+\tnl = &tm->h.cos_commit_node_list;\n+\tfor (n = TAILQ_FIRST(nl); n != NULL; n = nn) {\n+\t\tnn = TAILQ_NEXT(n, node);\n+\n+\t\tn->node_state = IPN3KE_TM_NODE_STATE_IDLE;\n+\t\tn->parent_node_id = RTE_TM_NODE_ID_NULL;\n+\t\tn->priority = IPN3KE_TM_NODE_PRIORITY_NORMAL0;\n+\t\tn->weight = 0;\n+\t\tn->tm_id = RTE_TM_NODE_ID_NULL;\n+\t\tn->parent_node = NULL;\n+\t\ttm->h.n_cos_nodes--;\n+\n+\t\tTAILQ_REMOVE(nl, n, node);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static void\n+ipn3ke_tm_show(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tuint32_t tm_id;\n+\tstruct ipn3ke_tm_node_list *vt_nl, *cos_nl;\n+\tstruct ipn3ke_tm_node *port_n, *vt_n, *cos_n;\n+\tconst char *str_state[IPN3KE_TM_NODE_STATE_MAX] = {\"Idle\",\n+\t\t\t\t\t\t\"CfgAdd\",\n+\t\t\t\t\t\t\"CfgDel\",\n+\t\t\t\t\t\t\"Committed\"};\n+\n+\ttm_id = tm->tm_id;\n+\n+\tIPN3KE_AFU_PMD_DEBUG(\"***HQoS Tree(%d)***\\n\", tm_id);\n+\n+\tport_n = tm->h.port_node;\n+\tIPN3KE_AFU_PMD_DEBUG(\"Port: (%d|%s)\\n\", port_n->node_index,\n+\t\t\t\tstr_state[port_n->node_state]);\n+\n+\tvt_nl = &tm->h.port_node->children_node_list;\n+\tTAILQ_FOREACH(vt_n, vt_nl, node) {\n+\t\tcos_nl = &vt_n->children_node_list;\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"    VT%d: \", vt_n->node_index);\n+\t\tTAILQ_FOREACH(cos_n, cos_nl, node) {\n+\t\t\tif (cos_n->parent_node_id !=\n+\t\t\t\t(vt_n->node_index + IPN3KE_TM_NODE_LEVEL_MOD))\n+\t\t\t\tIPN3KE_AFU_PMD_ERR(\"(%d|%s), \",\n+\t\t\t\t\tcos_n->node_index,\n+\t\t\t\t\tstr_state[cos_n->node_state]);\n+\t\t}\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"\\n\");\n+\t}\n+}\n+\n+static void\n+ipn3ke_tm_show_commmit(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tuint32_t tm_id;\n+\tstruct ipn3ke_tm_node_list *nl;\n+\tstruct ipn3ke_tm_node *n;\n+\tconst char *str_state[IPN3KE_TM_NODE_STATE_MAX] = {\"Idle\",\n+\t\t\t\t\t\t\"CfgAdd\",\n+\t\t\t\t\t\t\"CfgDel\",\n+\t\t\t\t\t\t\"Committed\"};\n+\n+\ttm_id = tm->tm_id;\n+\n+\tIPN3KE_AFU_PMD_DEBUG(\"***Commit Tree(%d)***\\n\", tm_id);\n+\tn = tm->h.port_commit_node;\n+\tIPN3KE_AFU_PMD_DEBUG(\"Port: \");\n+\tif (n)\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"(%d|%s)\",\n+\t\t\tn->node_index,\n+\t\t\tstr_state[n->node_state]);\n+\tIPN3KE_AFU_PMD_DEBUG(\"\\n\");\n+\n+\tnl = &tm->h.vt_commit_node_list;\n+\tIPN3KE_AFU_PMD_DEBUG(\"VT  : \");\n+\tTAILQ_FOREACH(n, nl, node) {\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"(%d|%s), \",\n+\t\t\t\tn->node_index,\n+\t\t\t\tstr_state[n->node_state]);\n+\t}\n+\tIPN3KE_AFU_PMD_DEBUG(\"\\n\");\n+\n+\tnl = &tm->h.cos_commit_node_list;\n+\tIPN3KE_AFU_PMD_DEBUG(\"COS : \");\n+\tTAILQ_FOREACH(n, nl, node) {\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"(%d|%s), \",\n+\t\t\t\tn->node_index,\n+\t\t\t\tstr_state[n->node_state]);\n+\t}\n+\tIPN3KE_AFU_PMD_DEBUG(\"\\n\");\n+}\n+\n+/* Traffic manager hierarchy commit */\n+static int\n+ipn3ke_tm_hierarchy_commit(struct rte_eth_dev *dev,\n+\tint clear_on_fail, struct rte_tm_error *error)\n+{\n+\tstruct ipn3ke_tm_internals *tm = IPN3KE_DEV_PRIVATE_TO_TM(dev);\n+\tint status;\n+\n+\t/* Checks */\n+\tif (tm->hierarchy_frozen)\n+\t\treturn -rte_tm_error_set(error,\n+\t\t\t\t\tEBUSY,\n+\t\t\t\t\tRTE_TM_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\tNULL,\n+\t\t\t\t\trte_strerror(EBUSY));\n+\n+\tipn3ke_tm_show_commmit(dev);\n+\n+\tstatus = ipn3ke_tm_hierarchy_commit_check(dev, error);\n+\tif (status) {\n+\t\tif (clear_on_fail)\n+\t\t\tipn3ke_tm_hierarchy_commit_clear(dev);\n+\t\treturn status;\n+\t}\n+\n+\tipn3ke_tm_hierarchy_hw_commit(dev, error);\n+\tipn3ke_tm_show(dev);\n+\n+\treturn 0;\n+}\n+\n+const struct rte_tm_ops ipn3ke_tm_ops = {\n+\t.node_type_get = ipn3ke_pmd_tm_node_type_get,\n+\t.capabilities_get = ipn3ke_tm_capabilities_get,\n+\t.level_capabilities_get = ipn3ke_tm_level_capabilities_get,\n+\t.node_capabilities_get = ipn3ke_tm_node_capabilities_get,\n+\n+\t.wred_profile_add = ipn3ke_tm_tdrop_profile_add,\n+\t.wred_profile_delete = ipn3ke_tm_tdrop_profile_delete,\n+\t.shared_wred_context_add_update = NULL,\n+\t.shared_wred_context_delete = NULL,\n+\n+\t.shaper_profile_add = ipn3ke_tm_shaper_profile_add,\n+\t.shaper_profile_delete = ipn3ke_tm_shaper_profile_delete,\n+\t.shared_shaper_add_update = NULL,\n+\t.shared_shaper_delete = NULL,\n+\n+\t.node_add = ipn3ke_tm_node_add,\n+\t.node_delete = ipn3ke_pmd_tm_node_delete,\n+\t.node_suspend = NULL,\n+\t.node_resume = NULL,\n+\t.hierarchy_commit = ipn3ke_tm_hierarchy_commit,\n+\n+\t.node_parent_update = NULL,\n+\t.node_shaper_update = NULL,\n+\t.node_shared_shaper_update = NULL,\n+\t.node_stats_update = NULL,\n+\t.node_wfq_weight_mode_update = NULL,\n+\t.node_cman_update = NULL,\n+\t.node_wred_context_update = NULL,\n+\t.node_shared_wred_context_update = NULL,\n+\n+\t.node_stats_read = NULL,\n+};\n+\n+int\n+ipn3ke_tm_ops_get(struct rte_eth_dev *ethdev,\n+\t\tvoid *arg)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tstruct rte_eth_dev *i40e_pf_eth;\n+\tconst struct rte_tm_ops *ops;\n+\n+\tif (!arg)\n+\t\treturn -EINVAL;\n+\n+\tif (hw->acc_tm) {\n+\t\t*(const void **)arg = &ipn3ke_tm_ops;\n+\t} else if (rpst->i40e_pf_eth) {\n+\t\ti40e_pf_eth = rpst->i40e_pf_eth;\n+\t\tif (i40e_pf_eth->dev_ops->tm_ops_get == NULL ||\n+\t\t\ti40e_pf_eth->dev_ops->tm_ops_get(i40e_pf_eth,\n+\t\t\t&ops) != 0 ||\n+\t\t\tops == NULL) {\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\t*(const void **)arg = ops;\n+\t} else {\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\ndiff --git a/drivers/net/ipn3ke/meson.build b/drivers/net/ipn3ke/meson.build\nindex ec77390..3a95efc 100644\n--- a/drivers/net/ipn3ke/meson.build\n+++ b/drivers/net/ipn3ke/meson.build\n@@ -11,5 +11,6 @@\n allow_experimental_apis = true\n \n sources += files('ipn3ke_ethdev.c',\n-\t'ipn3ke_representor.c')\n+\t'ipn3ke_representor.c',\n+\t'ipn3ke_tm.c')\n deps += ['bus_ifpga', 'sched']\n",
    "prefixes": [
        "v6",
        "05/14"
    ]
}