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GET /api/patches/52474/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 52474,
    "url": "http://patches.dpdk.org/api/patches/52474/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1554813689-26834-5-git-send-email-rosen.xu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1554813689-26834-5-git-send-email-rosen.xu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1554813689-26834-5-git-send-email-rosen.xu@intel.com",
    "date": "2019-04-09T12:41:19",
    "name": "[v6,04/14] net/ipn3ke: add IPN3KE representor of PMD driver",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "03aaeb42c3ff93bb40627379c96abf4563ac2f60",
    "submitter": {
        "id": 946,
        "url": "http://patches.dpdk.org/api/people/946/?format=api",
        "name": "Xu, Rosen",
        "email": "rosen.xu@intel.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1554813689-26834-5-git-send-email-rosen.xu@intel.com/mbox/",
    "series": [
        {
            "id": 4203,
            "url": "http://patches.dpdk.org/api/series/4203/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4203",
            "date": "2019-04-09T12:41:15",
            "name": "Add patch set for IPN3KE",
            "version": 6,
            "mbox": "http://patches.dpdk.org/series/4203/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/52474/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/52474/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id AB3D35942;\n\tTue,  9 Apr 2019 14:40:44 +0200 (CEST)",
            "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id BF94F56A1\n\tfor <dev@dpdk.org>; Tue,  9 Apr 2019 14:40:42 +0200 (CEST)",
            "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t09 Apr 2019 05:40:42 -0700",
            "from dpdkx8602.sh.intel.com ([10.67.110.200])\n\tby orsmga003.jf.intel.com with ESMTP; 09 Apr 2019 05:40:39 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.60,329,1549958400\"; d=\"scan'208\";a=\"141243814\"",
        "From": "Rosen Xu <rosen.xu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com, tianfei.zhang@intel.com, dan.wei@intel.com,\n\trosen.xu@intel.com, andy.pei@intel.com, qiming.yang@intel.com,\n\thaiyue.wang@intel.com, santos.chen@intel.com, zhang.zhang@intel.com, \n\tdavid.lomartire@intel.com, jia.hu@intel.com",
        "Date": "Tue,  9 Apr 2019 20:41:19 +0800",
        "Message-Id": "<1554813689-26834-5-git-send-email-rosen.xu@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1554813689-26834-1-git-send-email-rosen.xu@intel.com>",
        "References": "<1551338000-120348-1-git-send-email-rosen.xu@intel.com>\n\t<1554813689-26834-1-git-send-email-rosen.xu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v6 04/14] net/ipn3ke: add IPN3KE representor of\n\tPMD driver",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add Intel FPGA Acceleration NIC IPN3KE representor of PMD driver.\n\nSigned-off-by: Rosen Xu <rosen.xu@intel.com>\nSigned-off-by: Andy Pei <andy.pei@intel.com>\nSigned-off-by: Dan Wei <dan.wei@intel.com>\n---\n drivers/net/ipn3ke/Makefile             |   2 +\n drivers/net/ipn3ke/ipn3ke_ethdev.c      |   4 +-\n drivers/net/ipn3ke/ipn3ke_ethdev.h      |  25 +\n drivers/net/ipn3ke/ipn3ke_representor.c | 887 ++++++++++++++++++++++++++++++++\n drivers/net/ipn3ke/meson.build          |   3 +-\n 5 files changed, 918 insertions(+), 3 deletions(-)\n create mode 100644 drivers/net/ipn3ke/ipn3ke_representor.c",
    "diff": "diff --git a/drivers/net/ipn3ke/Makefile b/drivers/net/ipn3ke/Makefile\nindex d7aa79b..221567d 100644\n--- a/drivers/net/ipn3ke/Makefile\n+++ b/drivers/net/ipn3ke/Makefile\n@@ -23,6 +23,7 @@ LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring\n LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs\n LDLIBS += -lrte_bus_ifpga\n LDLIBS += -lrte_bus_vdev\n+LDLIBS += -lpthread\n \n EXPORT_MAP := rte_pmd_ipn3ke_version.map\n \n@@ -32,5 +33,6 @@ LIBABIVER := 1\n # all source are stored in SRCS-y\n #\n SRCS-$(CONFIG_RTE_LIBRTE_IPN3KE_PMD) += ipn3ke_ethdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_IPN3KE_PMD) += ipn3ke_representor.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c\nindex a1a1984..146d796 100644\n--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c\n+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c\n@@ -351,7 +351,7 @@ static int ipn3ke_vswitch_probe(struct rte_afu_device *afu_dev)\n \n \t\tretval = rte_eth_dev_create(&afu_dev->device, name,\n \t\t\tsizeof(struct ipn3ke_rpst), NULL, NULL,\n-\t\t\tNULL, &rpst);\n+\t\t\tipn3ke_rpst_init, &rpst);\n \n \t\tif (retval)\n \t\t\tIPN3KE_AFU_PMD_ERR(\"failed to create ipn3ke representor %s.\",\n@@ -380,7 +380,7 @@ static int ipn3ke_vswitch_remove(struct rte_afu_device *afu_dev)\n \t\tif (!ethdev)\n \t\t\treturn -ENODEV;\n \n-\t\trte_eth_dev_destroy(ethdev, NULL);\n+\t\trte_eth_dev_destroy(ethdev, ipn3ke_rpst_uninit);\n \t}\n \n \tret = rte_eth_switch_domain_free(hw->switch_domain_id);\ndiff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke_ethdev.h\nindex 7c87a53..4c2c94b 100644\n--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h\n+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h\n@@ -530,6 +530,31 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_hw *hw,\n #define IPN3KE_CLF_MHL_RES_MASK    0xFFFFFFFF\n #define IPN3KE_CLF_MHL_RES         (IPN3KE_CLASSIFY_OFFSET + 0x50000 + 0x2000)\n \n+int\n+ipn3ke_rpst_dev_set_link_up(struct rte_eth_dev *dev);\n+int\n+ipn3ke_rpst_dev_set_link_down(struct rte_eth_dev *dev);\n+int\n+ipn3ke_rpst_link_update(struct rte_eth_dev *ethdev,\n+\t__rte_unused int wait_to_complete);\n+void\n+ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev *ethdev);\n+void\n+ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev *ethdev);\n+void\n+ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev *ethdev);\n+void\n+ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev *ethdev);\n+int\n+ipn3ke_rpst_mac_addr_set(struct rte_eth_dev *ethdev,\n+\t\tstruct ether_addr *mac_addr);\n+int\n+ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu);\n+\n+int\n+ipn3ke_rpst_init(struct rte_eth_dev *ethdev, void *init_params);\n+int\n+ipn3ke_rpst_uninit(struct rte_eth_dev *ethdev);\n \n \n /* IPN3KE_MASK is a macro used on 32 bit registers */\ndiff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c\nnew file mode 100644\nindex 0000000..3831982\n--- /dev/null\n+++ b/drivers/net/ipn3ke/ipn3ke_representor.c\n@@ -0,0 +1,887 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019 Intel Corporation\n+ */\n+\n+#include <stdint.h>\n+\n+#include <rte_bus_pci.h>\n+#include <rte_ethdev.h>\n+#include <rte_pci.h>\n+#include <rte_malloc.h>\n+\n+#include <rte_mbuf.h>\n+#include <rte_sched.h>\n+#include <rte_ethdev_driver.h>\n+#include <rte_spinlock.h>\n+\n+#include <rte_io.h>\n+#include <rte_rawdev.h>\n+#include <rte_rawdev_pmd.h>\n+#include <rte_bus_ifpga.h>\n+#include <ifpga_logs.h>\n+\n+#include \"ipn3ke_rawdev_api.h\"\n+#include \"ipn3ke_logs.h\"\n+#include \"ipn3ke_ethdev.h\"\n+\n+static int ipn3ke_rpst_scan_num;\n+static pthread_t ipn3ke_rpst_scan_thread;\n+\n+/** Double linked list of representor port. */\n+TAILQ_HEAD(ipn3ke_rpst_list, ipn3ke_rpst);\n+\n+static struct ipn3ke_rpst_list ipn3ke_rpst_list =\n+\tTAILQ_HEAD_INITIALIZER(ipn3ke_rpst_list);\n+\n+static rte_spinlock_t ipn3ke_link_notify_list_lk = RTE_SPINLOCK_INITIALIZER;\n+\n+static int\n+ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst);\n+\n+static void\n+ipn3ke_rpst_dev_infos_get(struct rte_eth_dev *ethdev,\n+\tstruct rte_eth_dev_info *dev_info)\n+{\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\n+\tdev_info->speed_capa =\n+\t\t(hw->retimer.mac_type ==\n+\t\t\tIFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) ?\n+\t\tETH_LINK_SPEED_10G :\n+\t\t((hw->retimer.mac_type ==\n+\t\t\tIFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) ?\n+\t\tETH_LINK_SPEED_25G :\n+\t\tETH_LINK_SPEED_AUTONEG);\n+\n+\tdev_info->max_rx_queues  = 1;\n+\tdev_info->max_tx_queues  = 1;\n+\tdev_info->min_rx_bufsize = IPN3KE_AFU_BUF_SIZE_MIN;\n+\tdev_info->max_rx_pktlen  = IPN3KE_AFU_FRAME_SIZE_MAX;\n+\tdev_info->max_mac_addrs  = hw->port_num;\n+\tdev_info->max_vfs = 0;\n+\tdev_info->default_txconf = (struct rte_eth_txconf) {\n+\t\t.offloads = 0,\n+\t};\n+\tdev_info->rx_queue_offload_capa = 0;\n+\tdev_info->rx_offload_capa =\n+\t\tDEV_RX_OFFLOAD_VLAN_STRIP |\n+\t\tDEV_RX_OFFLOAD_QINQ_STRIP |\n+\t\tDEV_RX_OFFLOAD_IPV4_CKSUM |\n+\t\tDEV_RX_OFFLOAD_UDP_CKSUM |\n+\t\tDEV_RX_OFFLOAD_TCP_CKSUM |\n+\t\tDEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |\n+\t\tDEV_RX_OFFLOAD_VLAN_EXTEND |\n+\t\tDEV_RX_OFFLOAD_VLAN_FILTER |\n+\t\tDEV_RX_OFFLOAD_JUMBO_FRAME;\n+\n+\tdev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;\n+\tdev_info->tx_offload_capa =\n+\t\tDEV_TX_OFFLOAD_VLAN_INSERT |\n+\t\tDEV_TX_OFFLOAD_QINQ_INSERT |\n+\t\tDEV_TX_OFFLOAD_IPV4_CKSUM |\n+\t\tDEV_TX_OFFLOAD_UDP_CKSUM |\n+\t\tDEV_TX_OFFLOAD_TCP_CKSUM |\n+\t\tDEV_TX_OFFLOAD_SCTP_CKSUM |\n+\t\tDEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |\n+\t\tDEV_TX_OFFLOAD_TCP_TSO |\n+\t\tDEV_TX_OFFLOAD_VXLAN_TNL_TSO |\n+\t\tDEV_TX_OFFLOAD_GRE_TNL_TSO |\n+\t\tDEV_TX_OFFLOAD_IPIP_TNL_TSO |\n+\t\tDEV_TX_OFFLOAD_GENEVE_TNL_TSO |\n+\t\tDEV_TX_OFFLOAD_MULTI_SEGS |\n+\t\tdev_info->tx_queue_offload_capa;\n+\n+\tdev_info->dev_capa =\n+\t\tRTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |\n+\t\tRTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;\n+\n+\tdev_info->switch_info.name = ethdev->device->name;\n+\tdev_info->switch_info.domain_id = rpst->switch_domain_id;\n+\tdev_info->switch_info.port_id = rpst->port_id;\n+}\n+\n+static int\n+ipn3ke_rpst_dev_configure(__rte_unused struct rte_eth_dev *dev)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_dev_start(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);\n+\tstruct rte_rawdev *rawdev;\n+\tuint64_t base_mac;\n+\tuint32_t val;\n+\tchar attr_name[IPN3KE_RAWDEV_ATTR_LEN_MAX];\n+\n+\trawdev = hw->rawdev;\n+\n+\tmemset(attr_name, 0, sizeof(attr_name));\n+\tsnprintf(attr_name, IPN3KE_RAWDEV_ATTR_LEN_MAX, \"%s\",\n+\t\t\t\"LineSideBaseMAC\");\n+\trawdev->dev_ops->attr_get(rawdev, attr_name, &base_mac);\n+\tether_addr_copy((struct ether_addr *)&base_mac, &rpst->mac_addr);\n+\n+\tether_addr_copy(&rpst->mac_addr, &dev->data->mac_addrs[0]);\n+\tdev->data->mac_addrs->addr_bytes[ETHER_ADDR_LEN - 1] =\n+\t\t(uint8_t)rpst->port_id + 1;\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\t/* Set mac address */\n+\t\trte_memcpy(((char *)(&val)),\n+\t\t\t(char *)&dev->data->mac_addrs->addr_bytes[0],\n+\t\t\tsizeof(uint32_t));\n+\t\t(*hw->f_mac_write)(hw,\n+\t\t\t\tval,\n+\t\t\t\tIPN3KE_MAC_PRIMARY_MAC_ADDR0,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t\trte_memcpy(((char *)(&val)),\n+\t\t\t(char *)&dev->data->mac_addrs->addr_bytes[4],\n+\t\t\tsizeof(uint16_t));\n+\t\t(*hw->f_mac_write)(hw,\n+\t\t\t\tval,\n+\t\t\t\tIPN3KE_MAC_PRIMARY_MAC_ADDR1,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\n+\t\t/* Enable the TX path */\n+\t\tipn3ke_xmac_tx_enable(hw, rpst->port_id, 0);\n+\n+\t\t/* Disables source address override */\n+\t\tipn3ke_xmac_smac_ovd_dis(hw, rpst->port_id, 0);\n+\n+\t\t/* Enable the RX path */\n+\t\tipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);\n+\n+\t\t/* Clear all TX statistics counters */\n+\t\tipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);\n+\n+\t\t/* Clear all RX statistics counters */\n+\t\tipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);\n+\t}\n+\n+\tipn3ke_rpst_link_update(dev, 0);\n+\n+\treturn 0;\n+}\n+\n+static void\n+ipn3ke_rpst_dev_stop(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\t/* Disable the TX path */\n+\t\tipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);\n+\n+\t\t/* Disable the RX path */\n+\t\tipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);\n+\t}\n+}\n+\n+static void\n+ipn3ke_rpst_dev_close(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\t/* Disable the TX path */\n+\t\tipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);\n+\n+\t\t/* Disable the RX path */\n+\t\tipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);\n+\t}\n+}\n+\n+/*\n+ * Reset PF device only to re-initialize resources in PMD layer\n+ */\n+static int\n+ipn3ke_rpst_dev_reset(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\t/* Disable the TX path */\n+\t\tipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);\n+\n+\t\t/* Disable the RX path */\n+\t\tipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_rx_queue_start(__rte_unused struct rte_eth_dev *dev,\n+\t__rte_unused uint16_t rx_queue_id)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_rx_queue_stop(__rte_unused struct rte_eth_dev *dev,\n+\t__rte_unused uint16_t rx_queue_id)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_tx_queue_start(__rte_unused struct rte_eth_dev *dev,\n+\t__rte_unused uint16_t tx_queue_id)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_tx_queue_stop(__rte_unused struct rte_eth_dev *dev,\n+\t__rte_unused uint16_t tx_queue_id)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_rx_queue_setup(__rte_unused struct rte_eth_dev *dev,\n+\t__rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,\n+\t__rte_unused unsigned int socket_id,\n+\t__rte_unused const struct rte_eth_rxconf *rx_conf,\n+\t__rte_unused struct rte_mempool *mp)\n+{\n+\treturn 0;\n+}\n+\n+static void\n+ipn3ke_rpst_rx_queue_release(__rte_unused void *rxq)\n+{\n+}\n+\n+static int\n+ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev *dev,\n+\t__rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,\n+\t__rte_unused unsigned int socket_id,\n+\t__rte_unused const struct rte_eth_txconf *tx_conf)\n+{\n+\treturn 0;\n+}\n+\n+static void\n+ipn3ke_rpst_tx_queue_release(__rte_unused void *txq)\n+{\n+}\n+\n+static int\n+ipn3ke_rpst_stats_get(__rte_unused struct rte_eth_dev *ethdev,\n+\t__rte_unused struct rte_eth_stats *stats)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_xstats_get(__rte_unused struct rte_eth_dev *dev,\n+\t__rte_unused struct rte_eth_xstat *xstats, __rte_unused unsigned int n)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_xstats_get_names(__rte_unused struct rte_eth_dev *dev,\n+\t\t__rte_unused struct rte_eth_xstat_name *xstats_names,\n+\t\t__rte_unused unsigned int limit)\n+{\n+\treturn 0;\n+}\n+\n+static void\n+ipn3ke_rpst_stats_reset(__rte_unused struct rte_eth_dev *ethdev)\n+{\n+}\n+\n+static void\n+ipn3ke_update_link(struct rte_rawdev *rawdev,\n+\tuint16_t port, struct rte_eth_link *link)\n+{\n+\tuint64_t line_link_bitmap = 0;\n+\tenum ifpga_rawdev_link_speed link_speed;\n+\n+\trawdev->dev_ops->attr_get(rawdev,\n+\t\t\t\t\"LineSideLinkStatus\",\n+\t\t\t\t(uint64_t *)&line_link_bitmap);\n+\n+\t/* Parse the link status */\n+\tif ((1 << port) & line_link_bitmap)\n+\t\tlink->link_status = 1;\n+\telse\n+\t\tlink->link_status = 0;\n+\n+\tIPN3KE_AFU_PMD_DEBUG(\"port is %d\\n\", port);\n+\tIPN3KE_AFU_PMD_DEBUG(\"link->link_status is %d\\n\", link->link_status);\n+\n+\trawdev->dev_ops->attr_get(rawdev,\n+\t\t\t\t\"LineSideLinkSpeed\",\n+\t\t\t\t(uint64_t *)&link_speed);\n+\tswitch (link_speed) {\n+\tcase IFPGA_RAWDEV_LINK_SPEED_10GB:\n+\t\tlink->link_speed = ETH_SPEED_NUM_10G;\n+\t\tbreak;\n+\tcase IFPGA_RAWDEV_LINK_SPEED_25GB:\n+\t\tlink->link_speed = ETH_SPEED_NUM_25G;\n+\t\tbreak;\n+\tdefault:\n+\t\tIPN3KE_AFU_PMD_ERR(\"Unknown link speed info %u\", link_speed);\n+\t\tbreak;\n+\t}\n+}\n+\n+/*\n+ * Set device link up.\n+ */\n+int\n+ipn3ke_rpst_dev_set_link_up(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);\n+\tstruct rte_eth_dev *pf;\n+\tint ret = 0;\n+\n+\tif (rpst->i40e_pf_eth) {\n+\t\tret = rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);\n+\t\tpf = rpst->i40e_pf_eth;\n+\t\t(*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);\n+\t}\n+\n+\treturn ret;\n+}\n+\n+/*\n+ * Set device link down.\n+ */\n+int\n+ipn3ke_rpst_dev_set_link_down(struct rte_eth_dev *dev)\n+{\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);\n+\tstruct rte_eth_dev *pf;\n+\tint ret = 0;\n+\n+\tif (rpst->i40e_pf_eth) {\n+\t\tret = rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);\n+\t\tpf = rpst->i40e_pf_eth;\n+\t\t(*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);\n+\t}\n+\n+\treturn ret;\n+}\n+\n+int\n+ipn3ke_rpst_link_update(struct rte_eth_dev *ethdev,\n+\t__rte_unused int wait_to_complete)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tstruct rte_rawdev *rawdev;\n+\tstruct rte_eth_link link;\n+\tstruct rte_eth_dev *pf;\n+\n+\tmemset(&link, 0, sizeof(link));\n+\n+\tlink.link_duplex = ETH_LINK_FULL_DUPLEX;\n+\tlink.link_autoneg = !(ethdev->data->dev_conf.link_speeds &\n+\t\t\t\tETH_LINK_SPEED_FIXED);\n+\n+\trawdev = hw->rawdev;\n+\tipn3ke_update_link(rawdev, rpst->port_id, &link);\n+\n+\tif (!rpst->ori_linfo.link_status &&\n+\t\tlink.link_status) {\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"Update Rpst %d Up\\n\", rpst->port_id);\n+\t\trpst->ori_linfo.link_status = link.link_status;\n+\t\trpst->ori_linfo.link_speed = link.link_speed;\n+\n+\t\trte_eth_linkstatus_set(ethdev, &link);\n+\n+\t\tif (rpst->i40e_pf_eth) {\n+\t\t\tIPN3KE_AFU_PMD_DEBUG(\"Update FVL PF %d Up\\n\",\n+\t\t\t\trpst->i40e_pf_eth_port_id);\n+\t\t\trte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);\n+\t\t\tpf = rpst->i40e_pf_eth;\n+\t\t\t(*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);\n+\t\t}\n+\t} else if (rpst->ori_linfo.link_status &&\n+\t\t\t\t!link.link_status) {\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"Update Rpst %d Down\\n\",\n+\t\t\trpst->port_id);\n+\t\trpst->ori_linfo.link_status = link.link_status;\n+\t\trpst->ori_linfo.link_speed = link.link_speed;\n+\n+\t\trte_eth_linkstatus_set(ethdev, &link);\n+\n+\t\tif (rpst->i40e_pf_eth) {\n+\t\t\tIPN3KE_AFU_PMD_DEBUG(\"Update FVL PF %d Down\\n\",\n+\t\t\t\trpst->i40e_pf_eth_port_id);\n+\t\t\trte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);\n+\t\t\tpf = rpst->i40e_pf_eth;\n+\t\t\t(*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst)\n+{\n+\tstruct ipn3ke_hw *hw;\n+\tstruct rte_rawdev *rawdev;\n+\tstruct rte_eth_link link;\n+\tstruct rte_eth_dev *pf;\n+\n+\tif (rpst == NULL)\n+\t\treturn -1;\n+\n+\thw = rpst->hw;\n+\n+\tmemset(&link, 0, sizeof(link));\n+\n+\tlink.link_duplex = ETH_LINK_FULL_DUPLEX;\n+\tlink.link_autoneg = !(rpst->ethdev->data->dev_conf.link_speeds &\n+\t\t\t\tETH_LINK_SPEED_FIXED);\n+\n+\trawdev = hw->rawdev;\n+\tipn3ke_update_link(rawdev, rpst->port_id, &link);\n+\n+\tif (!rpst->ori_linfo.link_status &&\n+\t\t\t\tlink.link_status) {\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"Check Rpst %d Up\\n\", rpst->port_id);\n+\t\trpst->ori_linfo.link_status = link.link_status;\n+\t\trpst->ori_linfo.link_speed = link.link_speed;\n+\n+\t\trte_eth_linkstatus_set(rpst->ethdev, &link);\n+\n+\t\tif (rpst->i40e_pf_eth) {\n+\t\t\tIPN3KE_AFU_PMD_DEBUG(\"Check FVL PF %d Up\\n\",\n+\t\t\t\trpst->i40e_pf_eth_port_id);\n+\t\t\trte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);\n+\t\t\tpf = rpst->i40e_pf_eth;\n+\t\t\t(*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);\n+\t\t}\n+\t} else if (rpst->ori_linfo.link_status &&\n+\t\t!link.link_status) {\n+\t\tIPN3KE_AFU_PMD_DEBUG(\"Check Rpst %d Down\\n\", rpst->port_id);\n+\t\trpst->ori_linfo.link_status = link.link_status;\n+\t\trpst->ori_linfo.link_speed = link.link_speed;\n+\n+\t\trte_eth_linkstatus_set(rpst->ethdev, &link);\n+\n+\t\tif (rpst->i40e_pf_eth) {\n+\t\t\tIPN3KE_AFU_PMD_DEBUG(\"Check FVL PF %d Down\\n\",\n+\t\t\t\trpst->i40e_pf_eth_port_id);\n+\t\t\trte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);\n+\t\t\tpf = rpst->i40e_pf_eth;\n+\t\t\t(*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static void *\n+ipn3ke_rpst_scan_handle_request(__rte_unused void *param)\n+{\n+\tstruct ipn3ke_rpst *rpst;\n+\tint num = 0;\n+#define MS 1000\n+#define SCAN_NUM 32\n+\n+\tfor (;;) {\n+\t\tnum = 0;\n+\t\tTAILQ_FOREACH(rpst, &ipn3ke_rpst_list, next) {\n+\t\t\tif (rpst->i40e_pf_eth &&\n+\t\t\t\trpst->ethdev->data->dev_started &&\n+\t\t\t\trpst->i40e_pf_eth->data->dev_started)\n+\t\t\t\tipn3ke_rpst_link_check(rpst);\n+\n+\t\t\tif (++num > SCAN_NUM)\n+\t\t\t\trte_delay_us(1 * MS);\n+\t\t}\n+\t\trte_delay_us(50 * MS);\n+\n+\t\tif (num == 0xffffff)\n+\t\t\treturn NULL;\n+\t}\n+\n+\treturn NULL;\n+}\n+\n+static int\n+ipn3ke_rpst_scan_check(void)\n+{\n+\tint ret;\n+\n+\tif (ipn3ke_rpst_scan_num == 1) {\n+\t\tret = pthread_create(&ipn3ke_rpst_scan_thread,\n+\t\t\tNULL,\n+\t\t\tipn3ke_rpst_scan_handle_request, NULL);\n+\t\tif (ret) {\n+\t\t\tIPN3KE_AFU_PMD_ERR(\"Fail to create ipn3ke rpst scan thread\");\n+\t\t\treturn -1;\n+\t\t}\n+\t} else if (ipn3ke_rpst_scan_num == 0) {\n+\t\tret = pthread_cancel(ipn3ke_rpst_scan_thread);\n+\t\tif (ret)\n+\t\t\tIPN3KE_AFU_PMD_ERR(\"Can't cancel the thread\");\n+\n+\t\tret = pthread_join(ipn3ke_rpst_scan_thread, NULL);\n+\t\tif (ret)\n+\t\t\tIPN3KE_AFU_PMD_ERR(\"Can't join the thread\");\n+\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void\n+ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev *ethdev)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tuint32_t rddata, val;\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\t/* Enable all unicast */\n+\t\t(*hw->f_mac_read)(hw,\n+\t\t\t\t&rddata,\n+\t\t\t\tIPN3KE_MAC_RX_FRAME_CONTROL,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t\tval = 1;\n+\t\tval &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK;\n+\t\tval |= rddata;\n+\t\t(*hw->f_mac_write)(hw,\n+\t\t\t\tval,\n+\t\t\t\tIPN3KE_MAC_RX_FRAME_CONTROL,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t}\n+}\n+\n+void\n+ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev *ethdev)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tuint32_t rddata, val;\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\t/* Disable all unicast */\n+\t\t(*hw->f_mac_read)(hw,\n+\t\t\t\t&rddata,\n+\t\t\t\tIPN3KE_MAC_RX_FRAME_CONTROL,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t\tval = 0;\n+\t\tval &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK;\n+\t\tval |= rddata;\n+\t\t(*hw->f_mac_write)(hw,\n+\t\t\t\tval,\n+\t\t\t\tIPN3KE_MAC_RX_FRAME_CONTROL,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t}\n+}\n+\n+void\n+ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev *ethdev)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tuint32_t rddata, val;\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\t/* Enable all unicast */\n+\t\t(*hw->f_mac_read)(hw,\n+\t\t\t\t&rddata,\n+\t\t\t\tIPN3KE_MAC_RX_FRAME_CONTROL,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t\tval = 1;\n+\t\tval <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT;\n+\t\tval &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK;\n+\t\tval |= rddata;\n+\t\t(*hw->f_mac_write)(hw,\n+\t\t\t\tval,\n+\t\t\t\tIPN3KE_MAC_RX_FRAME_CONTROL,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t}\n+}\n+\n+void\n+ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev *ethdev)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tuint32_t rddata, val;\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\t/* Disable all unicast */\n+\t\t(*hw->f_mac_read)(hw,\n+\t\t\t\t&rddata,\n+\t\t\t\tIPN3KE_MAC_RX_FRAME_CONTROL,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t\tval = 0;\n+\t\tval <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT;\n+\t\tval &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK;\n+\t\tval |= rddata;\n+\t\t(*hw->f_mac_write)(hw,\n+\t\t\t\tval,\n+\t\t\t\tIPN3KE_MAC_RX_FRAME_CONTROL,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t}\n+}\n+\n+int\n+ipn3ke_rpst_mac_addr_set(struct rte_eth_dev *ethdev,\n+\t\t\t\tstruct ether_addr *mac_addr)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tuint32_t val;\n+\n+\tif (!is_valid_assigned_ether_addr(mac_addr)) {\n+\t\tIPN3KE_AFU_PMD_ERR(\"Tried to set invalid MAC address.\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {\n+\t\tether_addr_copy(&mac_addr[0], &rpst->mac_addr);\n+\n+\t\t/* Set mac address */\n+\t\trte_memcpy(((char *)(&val)), &mac_addr[0], sizeof(uint32_t));\n+\t\t(*hw->f_mac_write)(hw,\n+\t\t\t\tval,\n+\t\t\t\tIPN3KE_MAC_PRIMARY_MAC_ADDR0,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t\trte_memcpy(((char *)(&val)), &mac_addr[4], sizeof(uint16_t));\n+\t\t(*hw->f_mac_write)(hw,\n+\t\t\t\tval,\n+\t\t\t\tIPN3KE_MAC_PRIMARY_MAC_ADDR0,\n+\t\t\t\trpst->port_id,\n+\t\t\t\t0);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int\n+ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu)\n+{\n+\tint ret = 0;\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tstruct rte_eth_dev_data *dev_data = ethdev->data;\n+\tuint32_t frame_size = mtu  + IPN3KE_ETH_OVERHEAD;\n+\n+\t/* check if mtu is within the allowed range */\n+\tif (mtu < ETHER_MIN_MTU ||\n+\t\tframe_size > IPN3KE_MAC_FRAME_SIZE_MAX)\n+\t\treturn -EINVAL;\n+\n+\t/* mtu setting is forbidden if port is start */\n+\t/* make sure NIC port is stopped */\n+\tif (rpst->i40e_pf_eth && rpst->i40e_pf_eth->data->dev_started) {\n+\t\tIPN3KE_AFU_PMD_ERR(\"NIC port %d must \"\n+\t\t\t\"be stopped before configuration\",\n+\t\t\trpst->i40e_pf_eth->data->port_id);\n+\t\treturn -EBUSY;\n+\t}\n+\t/* mtu setting is forbidden if port is start */\n+\tif (dev_data->dev_started) {\n+\t\tIPN3KE_AFU_PMD_ERR(\"FPGA port %d must \"\n+\t\t\t\"be stopped before configuration\",\n+\t\t\tdev_data->port_id);\n+\t\treturn -EBUSY;\n+\t}\n+\n+\tif (frame_size > ETHER_MAX_LEN)\n+\t\tdev_data->dev_conf.rxmode.offloads |=\n+\t\t\t(uint64_t)(DEV_RX_OFFLOAD_JUMBO_FRAME);\n+\telse\n+\t\tdev_data->dev_conf.rxmode.offloads &=\n+\t\t\t(uint64_t)(~DEV_RX_OFFLOAD_JUMBO_FRAME);\n+\n+\tdev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;\n+\n+\tif (rpst->i40e_pf_eth) {\n+\t\tret = rpst->i40e_pf_eth->dev_ops->mtu_set(rpst->i40e_pf_eth,\n+\t\t\t\t\t\t\tmtu);\n+\t\tif (!ret)\n+\t\t\trpst->i40e_pf_eth->data->mtu = mtu;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static int\n+ipn3ke_afu_filter_ctrl(struct rte_eth_dev *ethdev,\n+\tenum rte_filter_type filter_type, enum rte_filter_op filter_op,\n+\tvoid *arg)\n+{\n+\tstruct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tint ret = 0;\n+\n+\tif (ethdev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (hw->acc_flow)\n+\t\tswitch (filter_type) {\n+\t\tcase RTE_ETH_FILTER_GENERIC:\n+\t\t\tif (filter_op != RTE_ETH_FILTER_GET)\n+\t\t\t\treturn -EINVAL;\n+\t\t\t*(const void **)arg = NULL;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tIPN3KE_AFU_PMD_WARN(\"Filter type (%d) not supported\",\n+\t\t\t\t\tfilter_type);\n+\t\t\tret = -EINVAL;\n+\t\t\tbreak;\n+\t\t}\n+\telse if (rpst->i40e_pf_eth)\n+\t\t(*rpst->i40e_pf_eth->dev_ops->filter_ctrl)(ethdev,\n+\t\t\t\t\t\t\tfilter_type,\n+\t\t\t\t\t\t\tfilter_op,\n+\t\t\t\t\t\t\targ);\n+\telse\n+\t\treturn -EINVAL;\n+\n+\treturn ret;\n+}\n+\n+static const struct eth_dev_ops ipn3ke_rpst_dev_ops = {\n+\t.dev_infos_get        = ipn3ke_rpst_dev_infos_get,\n+\n+\t.dev_configure        = ipn3ke_rpst_dev_configure,\n+\t.dev_start            = ipn3ke_rpst_dev_start,\n+\t.dev_stop             = ipn3ke_rpst_dev_stop,\n+\t.dev_close            = ipn3ke_rpst_dev_close,\n+\t.dev_reset            = ipn3ke_rpst_dev_reset,\n+\n+\t.stats_get            = ipn3ke_rpst_stats_get,\n+\t.xstats_get           = ipn3ke_rpst_xstats_get,\n+\t.xstats_get_names     = ipn3ke_rpst_xstats_get_names,\n+\t.stats_reset          = ipn3ke_rpst_stats_reset,\n+\t.xstats_reset         = ipn3ke_rpst_stats_reset,\n+\n+\t.filter_ctrl          = ipn3ke_afu_filter_ctrl,\n+\n+\t.rx_queue_start       = ipn3ke_rpst_rx_queue_start,\n+\t.rx_queue_stop        = ipn3ke_rpst_rx_queue_stop,\n+\t.tx_queue_start       = ipn3ke_rpst_tx_queue_start,\n+\t.tx_queue_stop        = ipn3ke_rpst_tx_queue_stop,\n+\t.rx_queue_setup       = ipn3ke_rpst_rx_queue_setup,\n+\t.rx_queue_release     = ipn3ke_rpst_rx_queue_release,\n+\t.tx_queue_setup       = ipn3ke_rpst_tx_queue_setup,\n+\t.tx_queue_release     = ipn3ke_rpst_tx_queue_release,\n+\n+\t.dev_set_link_up      = ipn3ke_rpst_dev_set_link_up,\n+\t.dev_set_link_down    = ipn3ke_rpst_dev_set_link_down,\n+\t.link_update          = ipn3ke_rpst_link_update,\n+\n+\t.promiscuous_enable   = ipn3ke_rpst_promiscuous_enable,\n+\t.promiscuous_disable  = ipn3ke_rpst_promiscuous_disable,\n+\t.allmulticast_enable  = ipn3ke_rpst_allmulticast_enable,\n+\t.allmulticast_disable = ipn3ke_rpst_allmulticast_disable,\n+\t.mac_addr_set         = ipn3ke_rpst_mac_addr_set,\n+\t.mtu_set              = ipn3ke_rpst_mtu_set,\n+};\n+\n+static uint16_t ipn3ke_rpst_recv_pkts(__rte_unused void *rx_q,\n+\t__rte_unused struct rte_mbuf **rx_pkts, __rte_unused uint16_t nb_pkts)\n+{\n+\treturn 0;\n+}\n+\n+static uint16_t\n+ipn3ke_rpst_xmit_pkts(__rte_unused void *tx_queue,\n+\t__rte_unused struct rte_mbuf **tx_pkts, __rte_unused uint16_t nb_pkts)\n+{\n+\treturn 0;\n+}\n+\n+int\n+ipn3ke_rpst_init(struct rte_eth_dev *ethdev, void *init_params)\n+{\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\tstruct ipn3ke_rpst *representor_param =\n+\t\t\t(struct ipn3ke_rpst *)init_params;\n+\n+\tif (representor_param->port_id >= representor_param->hw->port_num)\n+\t\treturn -ENODEV;\n+\n+\trpst->ethdev = ethdev;\n+\trpst->switch_domain_id = representor_param->switch_domain_id;\n+\trpst->port_id = representor_param->port_id;\n+\trpst->hw = representor_param->hw;\n+\trpst->i40e_pf_eth = NULL;\n+\trpst->i40e_pf_eth_port_id = 0xFFFF;\n+\n+\tethdev->data->mac_addrs = rte_zmalloc(\"ipn3ke\", ETHER_ADDR_LEN, 0);\n+\tif (!ethdev->data->mac_addrs) {\n+\t\tIPN3KE_AFU_PMD_ERR(\"Failed to \"\n+\t\t\t\"allocated memory for storing mac address\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\t/* Set representor device ops */\n+\tethdev->dev_ops = &ipn3ke_rpst_dev_ops;\n+\n+\t/* No data-path, but need stub Rx/Tx functions to avoid crash\n+\t * when testing with the likes of testpmd.\n+\t */\n+\tethdev->rx_pkt_burst = ipn3ke_rpst_recv_pkts;\n+\tethdev->tx_pkt_burst = ipn3ke_rpst_xmit_pkts;\n+\n+\tethdev->data->nb_rx_queues = 1;\n+\tethdev->data->nb_tx_queues = 1;\n+\n+\tethdev->data->mac_addrs = rte_zmalloc(\"ipn3ke_afu_representor\",\n+\t\t\t\t\t\tETHER_ADDR_LEN,\n+\t\t\t\t\t\t0);\n+\tif (!ethdev->data->mac_addrs) {\n+\t\tIPN3KE_AFU_PMD_ERR(\"Failed to \"\n+\t\t\t\"allocated memory for storing mac address\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tethdev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;\n+\n+\trte_spinlock_lock(&ipn3ke_link_notify_list_lk);\n+\tTAILQ_INSERT_TAIL(&ipn3ke_rpst_list, rpst, next);\n+\tipn3ke_rpst_scan_num++;\n+\tipn3ke_rpst_scan_check();\n+\trte_spinlock_unlock(&ipn3ke_link_notify_list_lk);\n+\n+\treturn 0;\n+}\n+\n+int\n+ipn3ke_rpst_uninit(struct rte_eth_dev *ethdev)\n+{\n+\tstruct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);\n+\n+\trte_spinlock_lock(&ipn3ke_link_notify_list_lk);\n+\tTAILQ_REMOVE(&ipn3ke_rpst_list, rpst, next);\n+\tipn3ke_rpst_scan_num--;\n+\tipn3ke_rpst_scan_check();\n+\trte_spinlock_unlock(&ipn3ke_link_notify_list_lk);\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/net/ipn3ke/meson.build b/drivers/net/ipn3ke/meson.build\nindex b511600..ec77390 100644\n--- a/drivers/net/ipn3ke/meson.build\n+++ b/drivers/net/ipn3ke/meson.build\n@@ -10,5 +10,6 @@\n #\n allow_experimental_apis = true\n \n-sources += files('ipn3ke_ethdev.c')\n+sources += files('ipn3ke_ethdev.c',\n+\t'ipn3ke_representor.c')\n deps += ['bus_ifpga', 'sched']\n",
    "prefixes": [
        "v6",
        "04/14"
    ]
}