Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/49298/?format=api
{ "id": 49298, "url": "http://patches.dpdk.org/api/patches/49298/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20181227062233.30781-11-hemant.agrawal@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20181227062233.30781-11-hemant.agrawal@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20181227062233.30781-11-hemant.agrawal@nxp.com", "date": "2018-12-27T06:23:06", "name": "[10/20] bus/fslmc: add dynamic config for memback portal mode", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "ab6db6ad95601a423ad38c0ee8c9a65a04a83168", "submitter": { "id": 477, "url": "http://patches.dpdk.org/api/people/477/?format=api", "name": "Hemant Agrawal", "email": "hemant.agrawal@nxp.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20181227062233.30781-11-hemant.agrawal@nxp.com/mbox/", "series": [ { "id": 2954, "url": "http://patches.dpdk.org/api/series/2954/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=2954", "date": "2018-12-27T06:22:50", "name": "NXP DPAA2 fixes and enhancements", "version": 1, "mbox": "http://patches.dpdk.org/series/2954/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/49298/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/49298/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 245E55A6A;\n\tThu, 27 Dec 2018 07:23:18 +0100 (CET)", "from EUR01-VE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr140047.outbound.protection.outlook.com [40.107.14.47])\n\tby dpdk.org (Postfix) with ESMTP id 3A7CC4F9A\n\tfor <dev@dpdk.org>; Thu, 27 Dec 2018 07:23:08 +0100 (CET)", "from VI1PR0401MB2541.eurprd04.prod.outlook.com (10.168.65.19) by\n\tVI1PR0401MB2382.eurprd04.prod.outlook.com (10.169.134.11) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1471.20; Thu, 27 Dec 2018 06:23:07 +0000", "from VI1PR0401MB2541.eurprd04.prod.outlook.com\n\t([fe80::555e:164:f8f0:dbb4]) by\n\tVI1PR0401MB2541.eurprd04.prod.outlook.com\n\t([fe80::555e:164:f8f0:dbb4%2]) with mapi id 15.20.1471.019;\n\tThu, 27 Dec 2018 06:23:07 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=oKq03j6KB+Lq6RJYA96PcYgrtuHdspSpE3NF4KQlgqA=;\n\tb=oGn3KwBCDQhAvdXn3ra0f+lYyef88hn4fEscqlSyJeX1L4gVo+JwzKrx928WkojBGihgPWujAoYth1P456BSqcXs3jeLS1j1xg6s+vwIiry7y3rvxJvAFqWgJLku4z2fVoZQ2lFG+v8pOThCZM6XDoRxHu8CIwPVoNU9oQdp/JQ=", "From": "Hemant Agrawal <hemant.agrawal@nxp.com>", "To": "\"dev@dpdk.org\" <dev@dpdk.org>", "CC": "\"ferruh.yigit@intel.com\" <ferruh.yigit@intel.com>, Shreyansh Jain\n\t<shreyansh.jain@nxp.com>, Roy Pledge <roy.pledge@nxp.com>, Youri Querry\n\t<youri.querry_1@nxp.com>", "Thread-Topic": "[PATCH 10/20] bus/fslmc: add dynamic config for memback portal\n\tmode", "Thread-Index": "AQHUnayhxD33pZRKb0mmT/0mvsVW0w==", "Date": "Thu, 27 Dec 2018 06:23:06 +0000", "Message-ID": "<20181227062233.30781-11-hemant.agrawal@nxp.com>", "References": "<20181227062233.30781-1-hemant.agrawal@nxp.com>", "In-Reply-To": "<20181227062233.30781-1-hemant.agrawal@nxp.com>", "Accept-Language": "en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "x-originating-ip": "[14.143.30.134]", "x-mailer": "git-send-email 2.17.1", "x-clientproxiedby": "BM1PR01CA0120.INDPRD01.PROD.OUTLOOK.COM\n\t(2603:1096:b00:40::14) To VI1PR0401MB2541.eurprd04.prod.outlook.com\n\t(2603:10a6:800:56::19)", "authentication-results": "spf=none (sender IP is )\n\tsmtp.mailfrom=hemant.agrawal@nxp.com; ", "x-ms-exchange-messagesentrepresentingtype": "1", "x-ms-publictraffictype": "Email", "x-microsoft-exchange-diagnostics": "1; VI1PR0401MB2382;\n\t6:Jr5XF+6ehKvBOTEiRtLEOXWvXSpEzWGppC8oe7QgO9Fwtp9xlfUHoXIHanVGMtRS6J0sW2dOK4vgs3gnJbGoOfyLTam5Edf0LwgkvIMxeK6Mu6eny9PWDaAGfvmT6rkMdDwgcLmYLx4L9Ew2Tz07Ym4clkuRsC4et3yIqiayCODlGFg9DR0SbhWjpJwWqhDJ2BqJkWdZ5TzVBxcA+h1tPFKxC7pWlXdGVrDdpUUAmXXssEF1WNBCpb53bX+5v8fAAFF1Z3o1zK/iMArxmpbC0/CqbjqhXgv6te8EVzYGF8RHu0qd9nMbJr8enWv3/Xs3l4x5lgSnBnnYsyQHLEtlW5id/ODavpT1vQu0JyGxX+FuSY30qVy+ua+OOgBnxUah1711DA2gbyJC7y5EX8LsXSi4414G4jknbjt/prKADxdBfXdAXiAOwyoRAkqFduMknAYPWGNCSvRVcxfxvYlEKw==;\n\t5:ZOXyjQsARbUXNWKeeiStUCKjkU59Pdy7j+q8pyHhhMiaCNjnUdc4EExvjmG6oSNa0w1XhXjrLaWeqQlk3d0IasQov73D0iO334QuXJv5xBFe/IpB1s5LcFNDdwPx/O7JZInb6332uCj1gEx2ZR3+DWhrCnVC9VkVWsRfIa/BE7g=;\n\t7:epiWbwEKlPP00WHiQZvupiKCpSRkXpwYQbVHpXopt/P+TS16ft7doWiYk+V3hEDxoqCM9dJ44q1d8gMUeCHp4XnweIwW++1lnF1kydqO3lWDeTKTHBsQJmB4KxnNZhn5lF4vcmUibH/ZtthQFsUHqg==", "x-ms-office365-filtering-correlation-id": "a826eecd-26e5-4da6-a09b-08d66bc3c3a3", "x-ms-office365-filtering-ht": "Tenant", "x-microsoft-antispam": "BCL:0; PCL:0;\n\tRULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(7168020)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);\n\tSRVR:VI1PR0401MB2382; ", "x-ms-traffictypediagnostic": "VI1PR0401MB2382:", "x-microsoft-antispam-prvs": "<VI1PR0401MB2382FD60B1F4DD71C54552A389B60@VI1PR0401MB2382.eurprd04.prod.outlook.com>", "x-exchange-antispam-report-cfa-test": "BCL:0; PCL:0;\n\tRULEID:(8211001083)(3230021)(908002)(999002)(5005026)(6040522)(2401047)(8121501046)(10201501046)(3002001)(93006095)(93001095)(3231475)(944501520)(52105112)(6055026)(6041310)(20161123560045)(20161123562045)(20161123564045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123558120)(201708071742011)(7699051)(76991095);\n\tSRVR:VI1PR0401MB2382; BCL:0; PCL:0; RULEID:; SRVR:VI1PR0401MB2382; ", "x-forefront-prvs": "0899B47777", "x-forefront-antispam-report": "SFV:NSPM;\n\tSFS:(10009020)(136003)(396003)(366004)(376002)(39860400002)(346002)(199004)(189003)(5660300001)(1076003)(26005)(76176011)(186003)(71200400001)(256004)(25786009)(105586002)(4326008)(6436002)(305945005)(11346002)(106356001)(14444005)(446003)(44832011)(476003)(7736002)(55236004)(102836004)(78486014)(486006)(386003)(68736007)(52116002)(86362001)(6506007)(2616005)(71190400001)(66066001)(316002)(54906003)(6116002)(3846002)(2906002)(14454004)(36756003)(99286004)(50226002)(8936002)(1730700003)(81156014)(81166006)(8676002)(6512007)(53936002)(478600001)(97736004)(6486002)(6916009)(5640700003)(2351001)(2501003);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0401MB2382;\n\tH:VI1PR0401MB2541.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; \n\tPTR:InfoNoRecords; A:1; MX:1; ", "received-spf": "None (protection.outlook.com: nxp.com does not designate\n\tpermitted sender hosts)", "x-ms-exchange-senderadcheck": "1", "x-microsoft-antispam-message-info": "33abCjG5qFF/1zN5pO8xcJQeQs6L0i0DDfKTK6eIGJL7lPgLDnNil+RAZ7PKf2wrUtXGR4hqDd9TC8bt3pVAbArJr3aFNqE9tUfADt1vrkP+ld8FWdnsPnwqmcUhQrncCpTYAEVp1sng1SaX+tvxn8ceIetJWbielkQKQ4F4RVG/g3Jl/E3kWft3wXP+U5Gure4Ztj0S3aFACxv/+Qtr9XUnpZwgLJNOpPEtDCgkpl1DoPGNIeM3j+BSulA0/PzqdDtXl0uu299VXvi21AvBbaiGi5tNglU016ihDtnUq+t0TSIcb0GMkQ1LjCsN7I/a", "spamdiagnosticoutput": "1:99", "spamdiagnosticmetadata": "NSPM", "Content-Type": "text/plain; charset=\"iso-8859-1\"", "Content-Transfer-Encoding": "quoted-printable", "MIME-Version": "1.0", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "a826eecd-26e5-4da6-a09b-08d66bc3c3a3", "X-MS-Exchange-CrossTenant-originalarrivaltime": "27 Dec 2018 06:23:06.8641\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "VI1PR0401MB2382", "Subject": "[dpdk-dev] [PATCH 10/20] bus/fslmc: add dynamic config for memback\n\tportal mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add flag in portal init to adjust the qbman memory type,\nto decide between legacy portal mode or newly introduced\nmemory backed portals.\n\nSigned-off-by: Roy Pledge <roy.pledge@nxp.com>\nSigned-off-by: Youri Querry <youri.querry_1@nxp.com>\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\n---\n drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 2 +\n .../bus/fslmc/qbman/include/fsl_qbman_base.h | 11 +++-\n drivers/bus/fslmc/qbman/qbman_portal.c | 52 +++++++++++--------\n drivers/bus/fslmc/qbman/qbman_sys.h | 20 ++++---\n 4 files changed, 53 insertions(+), 32 deletions(-)", "diff": "diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c\nindex ba2e28ce1..37723a094 100644\n--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c\n+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c\n@@ -509,6 +509,8 @@ dpaa2_create_dpio_device(int vdev_fd,\n \tp_des.cinh_bar = (void *)(dpio_dev->qbman_portal_ci_paddr);\n \tp_des.irq = -1;\n \tp_des.qman_version = attr.qbman_version;\n+\tp_des.eqcr_mode = qman_eqcr_vb_ring;\n+\tp_des.cena_access_mode = qman_cena_fastest_access;\n \n \tdpio_dev->sw_portal = qbman_swp_init(&p_des);\n \tif (dpio_dev->sw_portal == NULL) {\ndiff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h\nindex bb60a98f9..48bdaafa4 100644\n--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h\n+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h\n@@ -1,6 +1,7 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n *\n * Copyright (C) 2014 Freescale Semiconductor, Inc.\n+ * Copyright 2017-2018 NXP\n *\n */\n #ifndef _FSL_QBMAN_BASE_H\n@@ -33,7 +34,12 @@ struct qbman_block_desc {\n \n enum qbman_eqcr_mode {\n \tqman_eqcr_vb_ring = 2, /* Valid bit, with eqcr in ring mode */\n-\tqman_eqcr_vb_array, /* Valid bit, with eqcr in array mode */\n+\tqman_eqcr_vb_array, /* Valid bit, with eqcr in array mode */\n+};\n+\n+enum qbman_cena_access_mode {\n+\tqman_cena_fastest_access = 0, /* Use memory backed node if available */\n+\tqman_cena_direct_access, /* Use direct access to the CENA region */\n };\n \n /**\n@@ -46,6 +52,8 @@ enum qbman_eqcr_mode {\n * @qman_version: the qman version.\n * @eqcr_mode: Select the eqcr mode, currently only valid bit ring mode and\n * valid bit array mode are supported.\n+ * @cena_access_mode: Mode used to access the CENA region, direct\n+ * or memory backed.\n *\n * Descriptor for a QBMan software portal, expressed in terms that make sense to\n * the user context. Ie. on MC, this information is likely to be true-physical,\n@@ -62,6 +70,7 @@ struct qbman_swp_desc {\n \tint idx;\n \tuint32_t qman_version;\n \tenum qbman_eqcr_mode eqcr_mode;\n+\tenum qbman_cena_access_mode cena_access_mode;\n };\n \n /* Driver object for managing a QBMan portal */\ndiff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c\nindex 2f572a08b..08bfdc9f8 100644\n--- a/drivers/bus/fslmc/qbman/qbman_portal.c\n+++ b/drivers/bus/fslmc/qbman/qbman_portal.c\n@@ -194,7 +194,8 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)\n \tp->sdq |= qbman_sdqcr_dct_prio_ics << QB_SDQCR_DCT_SHIFT;\n \tp->sdq |= qbman_sdqcr_fc_up_to_3 << QB_SDQCR_FC_SHIFT;\n \tp->sdq |= QMAN_SDQCR_TOKEN << QB_SDQCR_TOK_SHIFT;\n-\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)\n+\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t\t&& (d->cena_access_mode == qman_cena_fastest_access))\n \t\tp->mr.valid_bit = QB_VALID_BIT;\n \n \tatomic_set(&p->vdq.busy, 1);\n@@ -233,7 +234,8 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)\n \tqbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, 0);\n \n \tp->eqcr.pi_ring_size = 8;\n-\tif ((qman_version & 0xFFFF0000) >= QMAN_REV_5000) {\n+\tif ((qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t\t&& (d->cena_access_mode == qman_cena_fastest_access)) {\n \t\tp->eqcr.pi_ring_size = 32;\n \t\tqbman_swp_enqueue_array_mode_ptr =\n \t\t\t\tqbman_swp_enqueue_array_mode_mem_back;\n@@ -253,7 +255,8 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)\n \teqcr_pi = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_PI);\n \tp->eqcr.pi = eqcr_pi & p->eqcr.pi_mask;\n \tp->eqcr.pi_vb = eqcr_pi & QB_VALID_BIT;\n-\tif ((p->desc.qman_version & QMAN_REV_MASK) < QMAN_REV_5000)\n+\tif ((p->desc.qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t\t&& (d->cena_access_mode == qman_cena_fastest_access))\n \t\tp->eqcr.ci = qbman_cinh_read(&p->sys,\n \t\t\t\tQBMAN_CINH_SWP_EQCR_CI) & p->eqcr.pi_mask;\n \telse\n@@ -362,10 +365,11 @@ void *qbman_swp_mc_start(struct qbman_swp *p)\n #ifdef QBMAN_CHECKING\n \tQBMAN_BUG_ON(p->mc.check != swp_mc_can_start);\n #endif\n-\tif ((p->desc.qman_version & QMAN_REV_MASK) < QMAN_REV_5000)\n-\t\tret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);\n-\telse\n+\tif ((p->desc.qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t && (p->desc.cena_access_mode == qman_cena_fastest_access))\n \t\tret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR_MEM);\n+\telse\n+\t\tret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);\n #ifdef QBMAN_CHECKING\n \tif (!ret)\n \t\tp->mc.check = swp_mc_can_submit;\n@@ -385,16 +389,17 @@ void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint8_t cmd_verb)\n \t * caller wants to OR but has forgotten to do so.\n \t */\n \tQBMAN_BUG_ON((*v & cmd_verb) != *v);\n-\tif ((p->desc.qman_version & QMAN_REV_MASK) < QMAN_REV_5000) {\n-\t\tdma_wmb();\n-\t\t*v = cmd_verb | p->mc.valid_bit;\n-\t\tqbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);\n-\t\tclean(cmd);\n-\t} else {\n+\tif ((p->desc.qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t && (p->desc.cena_access_mode == qman_cena_fastest_access)) {\n \t\t*v = cmd_verb | p->mr.valid_bit;\n \t\tqbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR_MEM, cmd);\n \t\tdma_wmb();\n \t\tqbman_cinh_write(&p->sys, QBMAN_CINH_SWP_CR_RT, QMAN_RT_MODE);\n+\t} else {\n+\t\tdma_wmb();\n+\t\t*v = cmd_verb | p->mc.valid_bit;\n+\t\tqbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);\n+\t\tclean(cmd);\n \t}\n #ifdef QBMAN_CHECKING\n \tp->mc.check = swp_mc_can_poll;\n@@ -407,30 +412,31 @@ void *qbman_swp_mc_result(struct qbman_swp *p)\n #ifdef QBMAN_CHECKING\n \tQBMAN_BUG_ON(p->mc.check != swp_mc_can_poll);\n #endif\n-\tif ((p->desc.qman_version & QMAN_REV_MASK) < QMAN_REV_5000) {\n-\t\tqbman_cena_invalidate_prefetch(&p->sys,\n-\t\t\t\tQBMAN_CENA_SWP_RR(p->mc.valid_bit));\n-\t\tret = qbman_cena_read(&p->sys,\n-\t\t\t\tQBMAN_CENA_SWP_RR(p->mc.valid_bit));\n+\tif ((p->desc.qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t&& (p->desc.cena_access_mode == qman_cena_fastest_access)) {\n+\t\tret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR_MEM);\n+\t\t/* Command completed if the valid bit is toggled */\n+\t\tif (p->mr.valid_bit != (ret[0] & QB_VALID_BIT))\n+\t\t\treturn NULL;\n \t\t/* Remove the valid-bit -\n \t\t * command completed iff the rest is non-zero\n \t\t */\n \t\tverb = ret[0] & ~QB_VALID_BIT;\n \t\tif (!verb)\n \t\t\treturn NULL;\n-\t\tp->mc.valid_bit ^= QB_VALID_BIT;\n+\t\tp->mr.valid_bit ^= QB_VALID_BIT;\n \t} else {\n-\t\tret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR_MEM);\n-\t\t/* Command completed if the valid bit is toggled */\n-\t\tif (p->mr.valid_bit != (ret[0] & QB_VALID_BIT))\n-\t\t\treturn NULL;\n+\t\tqbman_cena_invalidate_prefetch(&p->sys,\n+\t\t\tQBMAN_CENA_SWP_RR(p->mc.valid_bit));\n+\t\tret = qbman_cena_read(&p->sys,\n+\t\t\t\t QBMAN_CENA_SWP_RR(p->mc.valid_bit));\n \t\t/* Remove the valid-bit -\n \t\t * command completed iff the rest is non-zero\n \t\t */\n \t\tverb = ret[0] & ~QB_VALID_BIT;\n \t\tif (!verb)\n \t\t\treturn NULL;\n-\t\tp->mr.valid_bit ^= QB_VALID_BIT;\n+\t\tp->mc.valid_bit ^= QB_VALID_BIT;\n \t}\n #ifdef QBMAN_CHECKING\n \tp->mc.check = swp_mc_can_start;\ndiff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h\nindex e3bd1c5e6..71f7a6782 100644\n--- a/drivers/bus/fslmc/qbman/qbman_sys.h\n+++ b/drivers/bus/fslmc/qbman/qbman_sys.h\n@@ -389,7 +389,8 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,\n \tint i;\n \tint cena_region_size = 4*1024;\n \n-\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)\n+\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t\t&& (d->cena_access_mode == qman_cena_fastest_access))\n \t\tcena_region_size = 64*1024;\n #ifdef RTE_ARCH_64\n \tuint8_t wn = CENA_WRITE_ENABLE;\n@@ -416,7 +417,8 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,\n \treg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG);\n \tQBMAN_BUG_ON(reg);\n #endif\n-\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)\n+\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t\t&& (d->cena_access_mode == qman_cena_fastest_access))\n \t\tmemset(s->addr_cena, 0, cena_region_size);\n \telse {\n \t\t/* Invalidate the portal memory.\n@@ -426,11 +428,12 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,\n \t\t\tdccivac(s->addr_cena + i);\n \t}\n \n-\tif (s->eqcr_mode == qman_eqcr_vb_array)\n+\tif (s->eqcr_mode == qman_eqcr_vb_array) {\n \t\treg = qbman_set_swp_cfg(dqrr_size, wn,\n \t\t\t\t\t0, 3, 2, 3, 1, 1, 1, 1, 1, 1);\n-\telse {\n-\t\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)\n+\t} else {\n+\t\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000 &&\n+\t\t\t (d->cena_access_mode == qman_cena_fastest_access))\n \t\t\treg = qbman_set_swp_cfg(dqrr_size, wn,\n \t\t\t\t\t\t1, 3, 2, 0, 1, 1, 1, 1, 1, 1);\n \t\telse\n@@ -438,11 +441,11 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,\n \t\t\t\t\t\t1, 3, 2, 2, 1, 1, 1, 1, 1, 1);\n \t}\n \n-\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) {\n+\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t\t&& (d->cena_access_mode == qman_cena_fastest_access))\n \t\treg |= 1 << SWP_CFG_CPBS_SHIFT | /* memory-backed mode */\n \t\t 1 << SWP_CFG_VPM_SHIFT | /* VDQCR read triggered mode */\n \t\t 1 << SWP_CFG_CPM_SHIFT; /* CR read triggered mode */\n-\t}\n \n \tqbman_cinh_write(s, QBMAN_CINH_SWP_CFG, reg);\n \treg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG);\n@@ -452,7 +455,8 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,\n \t\treturn -1;\n \t}\n \n-\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) {\n+\tif ((d->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000\n+\t\t\t&& (d->cena_access_mode == qman_cena_fastest_access)) {\n \t\tqbman_cinh_write(s, QBMAN_CINH_SWP_EQCR_PI, QMAN_RT_MODE);\n \t\tqbman_cinh_write(s, QBMAN_CINH_SWP_RCR_PI, QMAN_RT_MODE);\n \t}\n", "prefixes": [ "10/20" ] }