Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/459/?format=api
http://patches.dpdk.org/api/patches/459/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1411478047-1251-2-git-send-email-jing.d.chen@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1411478047-1251-2-git-send-email-jing.d.chen@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1411478047-1251-2-git-send-email-jing.d.chen@intel.com", "date": "2014-09-23T13:14:02", "name": "[dpdk-dev,1/6] ether: enhancement for VMDQ support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cb9fd54b62579b50662f5fd53b6276b65001e8e6", "submitter": { "id": 40, "url": "http://patches.dpdk.org/api/people/40/?format=api", "name": "Chen, Jing D", "email": "jing.d.chen@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1411478047-1251-2-git-send-email-jing.d.chen@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/459/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/459/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 85F2758FE;\n\tTue, 23 Sep 2014 15:11:05 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id 1537B333\n\tfor <dev@dpdk.org>; Tue, 23 Sep 2014 15:11:03 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga101.jf.intel.com with ESMTP; 23 Sep 2014 06:14:16 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga001.jf.intel.com with ESMTP; 23 Sep 2014 06:14:15 -0700", "from shecgisg003.sh.intel.com (shecgisg003.sh.intel.com\n\t[10.239.29.90])\n\tby shvmail01.sh.intel.com with ESMTP id s8NDEDoQ012263;\n\tTue, 23 Sep 2014 21:14:13 +0800", "from shecgisg003.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg003.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s8NDEBrO001293; Tue, 23 Sep 2014 21:14:13 +0800", "(from jingche2@localhost)\n\tby shecgisg003.sh.intel.com (8.13.6/8.13.6/Submit) id s8NDEBV4001289; \n\tTue, 23 Sep 2014 21:14:11 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.04,580,1406617200\"; d=\"scan'208\";a=\"577540960\"", "From": "\"Chen Jing D(Mark)\" <jing.d.chen@intel.com>", "To": "dev@dpdk.org", "Date": "Tue, 23 Sep 2014 21:14:02 +0800", "Message-Id": "<1411478047-1251-2-git-send-email-jing.d.chen@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1411478047-1251-1-git-send-email-jing.d.chen@intel.com>", "References": "<1411478047-1251-1-git-send-email-jing.d.chen@intel.com>", "Subject": "[dpdk-dev] [PATCH 1/6] ether: enhancement for VMDQ support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: \"Chen Jing D(Mark)\" <jing.d.chen@intel.com>\n\nThe change includes several parts:\n1. Clear pool bitmap when trying to remove specific MAC.\n2. Define RSS, DCB and VMDQ flags to combine rx_mq_mode.\n3. Use 'struct' to replace 'union', which to expand the rx_adv_conf\n arguments to better support RSS, DCB and VMDQ.\n4. Fix bug in rte_eth_dev_config_restore function, which will restore\n all MAC address to default pool.\n5. Define additional 3 arguments for better VMDQ support.\n\nSigned-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>\nAcked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\nAcked-by: Jingjing Wu <jingjing.wu@intel.com>\nAcked-by: Jijiang Liu <jijiang.liu@intel.com>\nAcked-by: Huawei Xie <huawei.xie@intel.com>\n---\n lib/librte_ether/rte_ethdev.c | 12 +++++++-----\n lib/librte_ether/rte_ethdev.h | 39 ++++++++++++++++++++++++++++-----------\n 2 files changed, 35 insertions(+), 16 deletions(-)", "diff": "diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c\nindex fd1010a..b7ef56e 100644\n--- a/lib/librte_ether/rte_ethdev.c\n+++ b/lib/librte_ether/rte_ethdev.c\n@@ -771,7 +771,8 @@ rte_eth_dev_config_restore(uint8_t port_id)\n \t\t\tcontinue;\n \n \t\t/* add address to the hardware */\n-\t\tif (*dev->dev_ops->mac_addr_add)\n+\t\tif (*dev->dev_ops->mac_addr_add &&\n+\t\t\tdev->data->mac_pool_sel[i] & (1ULL << pool))\n \t\t\t(*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);\n \t\telse {\n \t\t\tPMD_DEBUG_TRACE(\"port %d: MAC address array not supported\\n\",\n@@ -1249,10 +1250,8 @@ rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)\n \t}\n \tdev = &rte_eth_devices[port_id];\n \n-\t/* Default device offload capabilities to zero */\n-\tdev_info->rx_offload_capa = 0;\n-\tdev_info->tx_offload_capa = 0;\n-\tdev_info->if_index = 0;\n+\t/* Set all fields with zero */\n+\tmemset(dev_info, 0, sizeof(*dev_info));\n \tFUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);\n \t(*dev->dev_ops->dev_infos_get)(dev, dev_info);\n \tdev_info->pci_dev = dev->pci_dev;\n@@ -2022,6 +2021,9 @@ rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)\n \t/* Update address in NIC data structure */\n \tether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);\n \n+\t/* Update pool bitmap in NIC data structure */\n+\tdev->data->mac_pool_sel[index] = 0;\n+\n \treturn 0;\n }\n \ndiff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h\nindex 50df654..8f3b6df 100644\n--- a/lib/librte_ether/rte_ethdev.h\n+++ b/lib/librte_ether/rte_ethdev.h\n@@ -251,21 +251,34 @@ struct rte_eth_thresh {\n \tuint8_t wthresh; /**< Ring writeback threshold. */\n };\n \n+#define ETH_MQ_RX_RSS_FLAG 0x1\n+#define ETH_MQ_RX_DCB_FLAG 0x2\n+#define ETH_MQ_RX_VMDQ_FLAG 0x4\n+\n /**\n * A set of values to identify what method is to be used to route\n * packets to multiple queues.\n */\n enum rte_eth_rx_mq_mode {\n-\tETH_MQ_RX_NONE = 0, /**< None of DCB,RSS or VMDQ mode */\n-\n-\tETH_MQ_RX_RSS, /**< For RX side, only RSS is on */\n-\tETH_MQ_RX_DCB, /**< For RX side,only DCB is on. */\n-\tETH_MQ_RX_DCB_RSS, /**< Both DCB and RSS enable */\n-\n-\tETH_MQ_RX_VMDQ_ONLY, /**< Only VMDQ, no RSS nor DCB */\n-\tETH_MQ_RX_VMDQ_RSS, /**< RSS mode with VMDQ */\n-\tETH_MQ_RX_VMDQ_DCB, /**< Use VMDQ+DCB to route traffic to queues */\n-\tETH_MQ_RX_VMDQ_DCB_RSS, /**< Enable both VMDQ and DCB in VMDq */\n+\t/**< None of DCB,RSS or VMDQ mode */\n+\tETH_MQ_RX_NONE = 0,\n+\n+\t/**< For RX side, only RSS is on */\n+\tETH_MQ_RX_RSS = ETH_MQ_RX_RSS_FLAG,\n+\t/**< For RX side,only DCB is on. */\n+\tETH_MQ_RX_DCB = ETH_MQ_RX_DCB_FLAG,\n+\t/**< Both DCB and RSS enable */\n+\tETH_MQ_RX_DCB_RSS = ETH_MQ_RX_RSS_FLAG | ETH_MQ_RX_DCB_FLAG,\n+\n+\t/**< Only VMDQ, no RSS nor DCB */\n+\tETH_MQ_RX_VMDQ_ONLY = ETH_MQ_RX_VMDQ_FLAG,\n+\t/**< RSS mode with VMDQ */\n+\tETH_MQ_RX_VMDQ_RSS = ETH_MQ_RX_RSS_FLAG | ETH_MQ_RX_VMDQ_FLAG,\n+\t/**< Use VMDQ+DCB to route traffic to queues */\n+\tETH_MQ_RX_VMDQ_DCB = ETH_MQ_RX_VMDQ_FLAG | ETH_MQ_RX_DCB_FLAG,\n+\t/**< Enable both VMDQ and DCB in VMDq */\n+\tETH_MQ_RX_VMDQ_DCB_RSS = ETH_MQ_RX_RSS_FLAG | ETH_MQ_RX_DCB_FLAG |\n+\t\t\t\t ETH_MQ_RX_VMDQ_FLAG,\n };\n \n /**\n@@ -840,7 +853,7 @@ struct rte_eth_conf {\n \t\t\t\t Read the datasheet of given ethernet controller\n \t\t\t\t for details. The possible values of this field\n \t\t\t\t are defined in implementation of each driver. */\n-\tunion {\n+\tstruct {\n \t\tstruct rte_eth_rss_conf rss_conf; /**< Port RSS configuration */\n \t\tstruct rte_eth_vmdq_dcb_conf vmdq_dcb_conf;\n \t\t/**< Port vmdq+dcb configuration. */\n@@ -906,6 +919,10 @@ struct rte_eth_dev_info {\n \tuint16_t max_vmdq_pools; /**< Maximum number of VMDq pools. */\n \tuint32_t rx_offload_capa; /**< Device RX offload capabilities. */\n \tuint32_t tx_offload_capa; /**< Device TX offload capabilities. */\n+\t/**< Specify the queue range belongs to VMDQ pools if VMDQ applicable */\n+\tuint16_t vmdq_queue_base;\n+\tuint16_t vmdq_queue_num;\n+\tuint16_t vmdq_pool_base; /** < Specify the start pool ID of VMDQ pools */\n };\n \n struct rte_eth_dev;\n", "prefixes": [ "dpdk-dev", "1/6" ] }{ "id": 459, "url": "