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{
    "id": 45164,
    "url": "http://patches.dpdk.org/api/patches/45164/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20180922045559.27438-7-ajit.khaparde@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20180922045559.27438-7-ajit.khaparde@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20180922045559.27438-7-ajit.khaparde@broadcom.com",
    "date": "2018-09-22T04:55:53",
    "name": "[v2,06/12] net/bnxt: add support to enable new mailbox channel",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "181e68eecf0bb7795a6baa36ebf0110f85ea0cbc",
    "submitter": {
        "id": 501,
        "url": "http://patches.dpdk.org/api/people/501/?format=api",
        "name": "Ajit Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20180922045559.27438-7-ajit.khaparde@broadcom.com/mbox/",
    "series": [
        {
            "id": 1450,
            "url": "http://patches.dpdk.org/api/series/1450/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1450",
            "date": "2018-09-22T04:55:49",
            "name": "bnxt patchset",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/1450/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/45164/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/45164/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BE8A15B20;\n\tSat, 22 Sep 2018 06:56:43 +0200 (CEST)",
            "from rnd-relay.smtp.broadcom.com (rnd-relay.smtp.broadcom.com\n\t[192.19.229.170]) by dpdk.org (Postfix) with ESMTP id 35898A49\n\tfor <dev@dpdk.org>; Sat, 22 Sep 2018 06:56:18 +0200 (CEST)",
            "from nis-sj1-27.broadcom.com (nis-sj1-27.lvn.broadcom.net\n\t[10.75.144.136])\n\tby rnd-relay.smtp.broadcom.com (Postfix) with ESMTP id 11BAF30C047;\n\tFri, 21 Sep 2018 21:56:11 -0700 (PDT)",
            "from C02VPB22HTD6.vpn.broadcom.net (unknown [10.10.118.131])\n\tby nis-sj1-27.broadcom.com (Postfix) with ESMTP id 7B2E3AC0741;\n\tFri, 21 Sep 2018 21:56:10 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.10.3 rnd-relay.smtp.broadcom.com 11BAF30C047",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n\ts=dkimrelay; t=1537592171;\n\tbh=Zp7RG78Jew0IdhinaLJas43b93msKVAEu6ChxU2eAVc=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=IAlcO3M5CfRFAcrnNplJdGLOJCgpEThCKWpTnnb7684dH8aXfuvXtdbpuEXn129ej\n\tmNEAOrpz4PEPoU7WzLY32a6w9KQaI5M2jVvvQFNGW5ot9bm1BliTsg26CMr0DV9ZqL\n\tJ6QB6Kyx53RxiVomREnB50QA4/ETJOWZdABGHIvA=",
        "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com",
        "Date": "Fri, 21 Sep 2018 21:55:53 -0700",
        "Message-Id": "<20180922045559.27438-7-ajit.khaparde@broadcom.com>",
        "X-Mailer": "git-send-email 2.17.1 (Apple Git-112)",
        "In-Reply-To": "<20180922045559.27438-1-ajit.khaparde@broadcom.com>",
        "References": "<f08457f7-5a78-c7e4-23ff-f4e253cd54c9@intel.com>\n\t<20180922045559.27438-1-ajit.khaparde@broadcom.com>",
        "Subject": "[dpdk-dev] [PATCH v2 06/12] net/bnxt: add support to enable new\n\tmailbox channel",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "For hardware having multiple embedded management processors the firmware\nhas added support to indicate if the comm channel to the processor has\nbeen enabled. If the channel is enabled, switch the CFA NTUPLE and EM\nfiltering commands to use the kong channel.\n\nSigned-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/bnxt.h      |  11 ++\n drivers/net/bnxt/bnxt_hwrm.c | 333 ++++++++++++++++++-----------------\n 2 files changed, 184 insertions(+), 160 deletions(-)",
    "diff": "diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h\nindex c163d0f18..996b195a2 100644\n--- a/drivers/net/bnxt/bnxt.h\n+++ b/drivers/net/bnxt/bnxt.h\n@@ -33,6 +33,13 @@\n #define BNXT_MAX_RX_RING_DESC\t8192\n #define BNXT_DB_SIZE\t\t0x80\n \n+/* Chimp Communication Channel */\n+#define GRCPF_REG_CHIMP_CHANNEL_OFFSET\t\t0x0\n+#define GRCPF_REG_CHIMP_COMM_TRIGGER\t\t0x100\n+/* Kong Communication Channel */\n+#define GRCPF_REG_KONG_CHANNEL_OFFSET\t\t0xA00\n+#define GRCPF_REG_KONG_COMM_TRIGGER\t\t0xB00\n+\n #define BNXT_INT_LAT_TMR_MIN\t\t\t75\n #define BNXT_INT_LAT_TMR_MAX\t\t\t150\n #define BNXT_NUM_CMPL_AGGR_INT\t\t\t36\n@@ -252,6 +259,7 @@ struct bnxt {\n #define BNXT_FLAG_MULTI_HOST    (1 << 7)\n #define BNXT_FLAG_EXT_RX_PORT_STATS\t(1 << 8)\n #define BNXT_FLAG_EXT_TX_PORT_STATS\t(1 << 9)\n+#define BNXT_FLAG_KONG_MB_EN\t(1 << 10)\n #define BNXT_FLAG_NEW_RM\t(1 << 30)\n #define BNXT_FLAG_INIT_DONE\t(1 << 31)\n #define BNXT_PF(bp)\t\t(!((bp)->flags & BNXT_FLAG_VF))\n@@ -259,6 +267,8 @@ struct bnxt {\n #define BNXT_NPAR(bp)\t\t((bp)->port_partition_type)\n #define BNXT_MH(bp)             ((bp)->flags & BNXT_FLAG_MULTI_HOST)\n #define BNXT_SINGLE_PF(bp)      (BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp))\n+#define BNXT_USE_CHIMP_MB\t0 //For non-CFA commands, everything uses Chimp.\n+#define BNXT_USE_KONG(bp)\t((bp)->flags & BNXT_FLAG_KONG_MB_EN)\n \n \tunsigned int\t\trx_nr_rings;\n \tunsigned int\t\trx_cp_nr_rings;\n@@ -299,6 +309,7 @@ struct bnxt {\n \tuint8_t\t\t\tmac_addr[ETHER_ADDR_LEN];\n \n \tuint16_t\t\t\thwrm_cmd_seq;\n+\tuint16_t\t\t\tkong_cmd_seq;\n \tvoid\t\t\t\t*hwrm_cmd_resp_addr;\n \trte_iova_t\t\t\thwrm_cmd_resp_dma_addr;\n \tvoid\t\t\t\t*hwrm_short_cmd_req_addr;\ndiff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c\nindex 99ecdae03..16f2c2ccc 100644\n--- a/drivers/net/bnxt/bnxt_hwrm.c\n+++ b/drivers/net/bnxt/bnxt_hwrm.c\n@@ -70,7 +70,7 @@ static int page_roundup(size_t size)\n  */\n \n static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg,\n-\t\t\t\t\tuint32_t msg_len)\n+\t\t\t\t  uint32_t msg_len, bool use_kong_mb)\n {\n \tunsigned int i;\n \tstruct input *req = msg;\n@@ -80,6 +80,10 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg,\n \tuint8_t *valid;\n \tuint16_t max_req_len = bp->max_req_len;\n \tstruct hwrm_short_input short_input = { 0 };\n+\tuint16_t bar_offset = use_kong_mb ?\n+\t\tGRCPF_REG_KONG_CHANNEL_OFFSET : GRCPF_REG_CHIMP_CHANNEL_OFFSET;\n+\tuint16_t mb_trigger_offset = use_kong_mb ?\n+\t\tGRCPF_REG_KONG_COMM_TRIGGER : GRCPF_REG_CHIMP_COMM_TRIGGER;\n \n \tif (bp->flags & BNXT_FLAG_SHORT_CMD) {\n \t\tvoid *short_cmd_req = bp->hwrm_short_cmd_req_addr;\n@@ -105,19 +109,19 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg,\n \n \t/* Write request msg to hwrm channel */\n \tfor (i = 0; i < msg_len; i += 4) {\n-\t\tbar = (uint8_t *)bp->bar0 + i;\n+\t\tbar = (uint8_t *)bp->bar0 + bar_offset + i;\n \t\trte_write32(*data, bar);\n \t\tdata++;\n \t}\n \n \t/* Zero the rest of the request space */\n \tfor (; i < max_req_len; i += 4) {\n-\t\tbar = (uint8_t *)bp->bar0 + i;\n+\t\tbar = (uint8_t *)bp->bar0 + bar_offset + i;\n \t\trte_write32(0, bar);\n \t}\n \n \t/* Ring channel doorbell */\n-\tbar = (uint8_t *)bp->bar0 + 0x100;\n+\tbar = (uint8_t *)bp->bar0 + mb_trigger_offset;\n \trte_write32(1, bar);\n \n \t/* Poll for the valid bit */\n@@ -156,12 +160,13 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg,\n  *\n  * HWRM_UNLOCK() must be called after all response processing is completed.\n  */\n-#define HWRM_PREP(req, type) do { \\\n+#define HWRM_PREP(req, type, kong) do { \\\n \trte_spinlock_lock(&bp->hwrm_lock); \\\n \tmemset(bp->hwrm_cmd_resp_addr, 0, bp->max_resp_len); \\\n \treq.req_type = rte_cpu_to_le_16(HWRM_##type); \\\n \treq.cmpl_ring = rte_cpu_to_le_16(-1); \\\n-\treq.seq_id = rte_cpu_to_le_16(bp->hwrm_cmd_seq++); \\\n+\treq.seq_id = kong ? rte_cpu_to_le_16(bp->kong_cmd_seq++) :\\\n+\t\trte_cpu_to_le_16(bp->hwrm_cmd_seq++); \\\n \treq.target_id = rte_cpu_to_le_16(0xffff); \\\n \treq.resp_addr = rte_cpu_to_le_64(bp->hwrm_cmd_resp_dma_addr); \\\n } while (0)\n@@ -220,11 +225,11 @@ int bnxt_hwrm_cfa_l2_clear_rx_mask(struct bnxt *bp, struct bnxt_vnic_info *vnic)\n \tstruct hwrm_cfa_l2_set_rx_mask_input req = {.req_type = 0 };\n \tstruct hwrm_cfa_l2_set_rx_mask_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, CFA_L2_SET_RX_MASK);\n+\tHWRM_PREP(req, CFA_L2_SET_RX_MASK, BNXT_USE_CHIMP_MB);\n \treq.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);\n \treq.mask = 0;\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -245,7 +250,7 @@ int bnxt_hwrm_cfa_l2_set_rx_mask(struct bnxt *bp,\n \tif (vnic->fw_vnic_id == INVALID_HW_RING_ID)\n \t\treturn rc;\n \n-\tHWRM_PREP(req, CFA_L2_SET_RX_MASK);\n+\tHWRM_PREP(req, CFA_L2_SET_RX_MASK, BNXT_USE_CHIMP_MB);\n \treq.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);\n \n \t/* FIXME add multicast flag, when multicast adding options is supported\n@@ -275,7 +280,7 @@ int bnxt_hwrm_cfa_l2_set_rx_mask(struct bnxt *bp,\n \t}\n \treq.mask = rte_cpu_to_le_32(mask);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -307,14 +312,14 @@ int bnxt_hwrm_cfa_vlan_antispoof_cfg(struct bnxt *bp, uint16_t fid,\n \t\t\t\treturn 0;\n \t\t}\n \t}\n-\tHWRM_PREP(req, CFA_VLAN_ANTISPOOF_CFG);\n+\tHWRM_PREP(req, CFA_VLAN_ANTISPOOF_CFG, BNXT_USE_CHIMP_MB);\n \treq.fid = rte_cpu_to_le_16(fid);\n \n \treq.vlan_tag_mask_tbl_addr =\n \t\trte_cpu_to_le_64(rte_mem_virt2iova(vlan_table));\n \treq.num_vlan_entries = rte_cpu_to_le_32((uint32_t)vlan_count);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -332,11 +337,11 @@ int bnxt_hwrm_clear_l2_filter(struct bnxt *bp,\n \tif (filter->fw_l2_filter_id == UINT64_MAX)\n \t\treturn 0;\n \n-\tHWRM_PREP(req, CFA_L2_FILTER_FREE);\n+\tHWRM_PREP(req, CFA_L2_FILTER_FREE, BNXT_USE_CHIMP_MB);\n \n \treq.l2_filter_id = rte_cpu_to_le_64(filter->fw_l2_filter_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -375,7 +380,7 @@ int bnxt_hwrm_set_l2_filter(struct bnxt *bp,\n \tif (filter->fw_l2_filter_id != UINT64_MAX)\n \t\tbnxt_hwrm_clear_l2_filter(bp, filter);\n \n-\tHWRM_PREP(req, CFA_L2_FILTER_ALLOC);\n+\tHWRM_PREP(req, CFA_L2_FILTER_ALLOC, BNXT_USE_CHIMP_MB);\n \n \treq.flags = rte_cpu_to_le_32(filter->flags);\n \n@@ -410,7 +415,7 @@ int bnxt_hwrm_set_l2_filter(struct bnxt *bp,\n \n \treq.enables = rte_cpu_to_le_32(enables);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -430,7 +435,7 @@ int bnxt_hwrm_ptp_cfg(struct bnxt *bp)\n \tif (!ptp)\n \t\treturn 0;\n \n-\tHWRM_PREP(req, PORT_MAC_CFG);\n+\tHWRM_PREP(req, PORT_MAC_CFG, BNXT_USE_CHIMP_MB);\n \n \tif (ptp->rx_filter)\n \t\tflags |= HWRM_PORT_MAC_CFG_INPUT_FLAGS_PTP_RX_TS_CAPTURE_ENABLE;\n@@ -447,7 +452,7 @@ int bnxt_hwrm_ptp_cfg(struct bnxt *bp)\n \t\t(HWRM_PORT_MAC_CFG_INPUT_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE);\n \treq.rx_ts_capture_ptp_msg_type = rte_cpu_to_le_16(ptp->rxctl);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tHWRM_UNLOCK();\n \n \treturn rc;\n@@ -464,11 +469,11 @@ static int bnxt_hwrm_ptp_qcfg(struct bnxt *bp)\n \tif (ptp)\n \t\treturn 0;\n \n-\tHWRM_PREP(req, PORT_MAC_PTP_QCFG);\n+\tHWRM_PREP(req, PORT_MAC_PTP_QCFG, BNXT_USE_CHIMP_MB);\n \n \treq.port_id = rte_cpu_to_le_16(bp->pf.port_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -513,11 +518,11 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)\n \tuint32_t flags;\n \tint i;\n \n-\tHWRM_PREP(req, FUNC_QCAPS);\n+\tHWRM_PREP(req, FUNC_QCAPS, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(0xffff);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -615,11 +620,11 @@ int bnxt_hwrm_func_reset(struct bnxt *bp)\n \tstruct hwrm_func_reset_input req = {.req_type = 0 };\n \tstruct hwrm_func_reset_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, FUNC_RESET);\n+\tHWRM_PREP(req, FUNC_RESET, BNXT_USE_CHIMP_MB);\n \n \treq.enables = rte_cpu_to_le_32(0);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -636,7 +641,7 @@ int bnxt_hwrm_func_driver_register(struct bnxt *bp)\n \tif (bp->flags & BNXT_FLAG_REGISTERED)\n \t\treturn 0;\n \n-\tHWRM_PREP(req, FUNC_DRV_RGTR);\n+\tHWRM_PREP(req, FUNC_DRV_RGTR, BNXT_USE_CHIMP_MB);\n \treq.enables = rte_cpu_to_le_32(HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER |\n \t\t\tHWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD);\n \treq.ver_maj = RTE_VER_YEAR;\n@@ -668,7 +673,7 @@ int bnxt_hwrm_func_driver_register(struct bnxt *bp)\n \t\trte_cpu_to_le_32(ASYNC_CMPL_EVENT_ID_PF_DRVR_UNLOAD |\n \t\t\t\t ASYNC_CMPL_EVENT_ID_VF_CFG_CHANGE);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -694,7 +699,7 @@ int bnxt_hwrm_func_reserve_vf_resc(struct bnxt *bp, bool test)\n \tstruct hwrm_func_vf_cfg_output *resp = bp->hwrm_cmd_resp_addr;\n \tstruct hwrm_func_vf_cfg_input req = {0};\n \n-\tHWRM_PREP(req, FUNC_VF_CFG);\n+\tHWRM_PREP(req, FUNC_VF_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.enables = rte_cpu_to_le_32\n \t\t\t(HWRM_FUNC_VF_CFG_INPUT_ENABLES_NUM_RX_RINGS  |\n@@ -733,7 +738,7 @@ int bnxt_hwrm_func_reserve_vf_resc(struct bnxt *bp, bool test)\n \n \treq.flags = rte_cpu_to_le_32(flags);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tif (test)\n \t\tHWRM_CHECK_RESULT_SILENT();\n@@ -750,10 +755,10 @@ int bnxt_hwrm_func_resc_qcaps(struct bnxt *bp)\n \tstruct hwrm_func_resource_qcaps_output *resp = bp->hwrm_cmd_resp_addr;\n \tstruct hwrm_func_resource_qcaps_input req = {0};\n \n-\tHWRM_PREP(req, FUNC_RESOURCE_QCAPS);\n+\tHWRM_PREP(req, FUNC_RESOURCE_QCAPS, BNXT_USE_CHIMP_MB);\n \treq.fid = rte_cpu_to_le_16(0xffff);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -789,13 +794,13 @@ int bnxt_hwrm_ver_get(struct bnxt *bp)\n \tuint32_t dev_caps_cfg;\n \n \tbp->max_req_len = HWRM_MAX_REQ_LEN;\n-\tHWRM_PREP(req, VER_GET);\n+\tHWRM_PREP(req, VER_GET, BNXT_USE_CHIMP_MB);\n \n \treq.hwrm_intf_maj = HWRM_VERSION_MAJOR;\n \treq.hwrm_intf_min = HWRM_VERSION_MINOR;\n \treq.hwrm_intf_upd = HWRM_VERSION_UPDATE;\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -899,6 +904,11 @@ int bnxt_hwrm_ver_get(struct bnxt *bp)\n \n \t\tbp->flags |= BNXT_FLAG_SHORT_CMD;\n \t}\n+\tif (dev_caps_cfg &\n+\t    HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_KONG_MB_CHNL_SUPPORTED) {\n+\t\tbp->flags |= BNXT_FLAG_KONG_MB_EN;\n+\t\tPMD_DRV_LOG(DEBUG, \"Kong mailbox channel enabled\\n\");\n+\t}\n \n error:\n \tHWRM_UNLOCK();\n@@ -914,10 +924,10 @@ int bnxt_hwrm_func_driver_unregister(struct bnxt *bp, uint32_t flags)\n \tif (!(bp->flags & BNXT_FLAG_REGISTERED))\n \t\treturn 0;\n \n-\tHWRM_PREP(req, FUNC_DRV_UNRGTR);\n+\tHWRM_PREP(req, FUNC_DRV_UNRGTR, BNXT_USE_CHIMP_MB);\n \treq.flags = flags;\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -934,7 +944,7 @@ static int bnxt_hwrm_port_phy_cfg(struct bnxt *bp, struct bnxt_link_info *conf)\n \tstruct hwrm_port_phy_cfg_output *resp = bp->hwrm_cmd_resp_addr;\n \tuint32_t enables = 0;\n \n-\tHWRM_PREP(req, PORT_PHY_CFG);\n+\tHWRM_PREP(req, PORT_PHY_CFG, BNXT_USE_CHIMP_MB);\n \n \tif (conf->link_up) {\n \t\t/* Setting Fixed Speed. But AutoNeg is ON, So disable it */\n@@ -983,7 +993,7 @@ static int bnxt_hwrm_port_phy_cfg(struct bnxt *bp, struct bnxt_link_info *conf)\n \t\tPMD_DRV_LOG(INFO, \"Force Link Down\\n\");\n \t}\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -998,9 +1008,9 @@ static int bnxt_hwrm_port_phy_qcfg(struct bnxt *bp,\n \tstruct hwrm_port_phy_qcfg_input req = {0};\n \tstruct hwrm_port_phy_qcfg_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, PORT_PHY_QCFG);\n+\tHWRM_PREP(req, PORT_PHY_QCFG, BNXT_USE_CHIMP_MB);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1046,14 +1056,14 @@ int bnxt_hwrm_queue_qportcfg(struct bnxt *bp)\n \tstruct hwrm_queue_qportcfg_output *resp = bp->hwrm_cmd_resp_addr;\n \tint i;\n \n-\tHWRM_PREP(req, QUEUE_QPORTCFG);\n+\tHWRM_PREP(req, QUEUE_QPORTCFG, BNXT_USE_CHIMP_MB);\n \n \treq.flags = HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX;\n \t/* HWRM Version >= 1.9.1 */\n \tif (bp->hwrm_spec_code >= HWRM_VERSION_1_9_1)\n \t\treq.drv_qmap_cap =\n \t\t\tHWRM_QUEUE_QPORTCFG_INPUT_DRV_QMAP_CAP_ENABLED;\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1099,7 +1109,7 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,\n \tstruct hwrm_ring_alloc_input req = {.req_type = 0 };\n \tstruct hwrm_ring_alloc_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, RING_ALLOC);\n+\tHWRM_PREP(req, RING_ALLOC, BNXT_USE_CHIMP_MB);\n \n \treq.page_tbl_addr = rte_cpu_to_le_64(ring->bd_dma);\n \treq.fbo = rte_cpu_to_le_32(0);\n@@ -1135,7 +1145,7 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,\n \t}\n \treq.enables = rte_cpu_to_le_32(enables);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tif (rc || resp->error_code) {\n \t\tif (rc == 0 && resp->error_code)\n@@ -1175,12 +1185,12 @@ int bnxt_hwrm_ring_free(struct bnxt *bp,\n \tstruct hwrm_ring_free_input req = {.req_type = 0 };\n \tstruct hwrm_ring_free_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, RING_FREE);\n+\tHWRM_PREP(req, RING_FREE, BNXT_USE_CHIMP_MB);\n \n \treq.ring_type = ring_type;\n \treq.ring_id = rte_cpu_to_le_16(ring->fw_ring_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tif (rc || resp->error_code) {\n \t\tif (rc == 0 && resp->error_code)\n@@ -1215,14 +1225,14 @@ int bnxt_hwrm_ring_grp_alloc(struct bnxt *bp, unsigned int idx)\n \tstruct hwrm_ring_grp_alloc_input req = {.req_type = 0 };\n \tstruct hwrm_ring_grp_alloc_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, RING_GRP_ALLOC);\n+\tHWRM_PREP(req, RING_GRP_ALLOC, BNXT_USE_CHIMP_MB);\n \n \treq.cr = rte_cpu_to_le_16(bp->grp_info[idx].cp_fw_ring_id);\n \treq.rr = rte_cpu_to_le_16(bp->grp_info[idx].rx_fw_ring_id);\n \treq.ar = rte_cpu_to_le_16(bp->grp_info[idx].ag_fw_ring_id);\n \treq.sc = rte_cpu_to_le_16(bp->grp_info[idx].fw_stats_ctx);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1240,11 +1250,11 @@ int bnxt_hwrm_ring_grp_free(struct bnxt *bp, unsigned int idx)\n \tstruct hwrm_ring_grp_free_input req = {.req_type = 0 };\n \tstruct hwrm_ring_grp_free_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, RING_GRP_FREE);\n+\tHWRM_PREP(req, RING_GRP_FREE, BNXT_USE_CHIMP_MB);\n \n \treq.ring_group_id = rte_cpu_to_le_16(bp->grp_info[idx].fw_grp_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1262,11 +1272,11 @@ int bnxt_hwrm_stat_clear(struct bnxt *bp, struct bnxt_cp_ring_info *cpr)\n \tif (cpr->hw_stats_ctx_id == (uint32_t)HWRM_NA_SIGNATURE)\n \t\treturn rc;\n \n-\tHWRM_PREP(req, STAT_CTX_CLR_STATS);\n+\tHWRM_PREP(req, STAT_CTX_CLR_STATS, BNXT_USE_CHIMP_MB);\n \n \treq.stat_ctx_id = rte_cpu_to_le_16(cpr->hw_stats_ctx_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1281,14 +1291,14 @@ int bnxt_hwrm_stat_ctx_alloc(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,\n \tstruct hwrm_stat_ctx_alloc_input req = {.req_type = 0 };\n \tstruct hwrm_stat_ctx_alloc_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, STAT_CTX_ALLOC);\n+\tHWRM_PREP(req, STAT_CTX_ALLOC, BNXT_USE_CHIMP_MB);\n \n \treq.update_period_ms = rte_cpu_to_le_32(0);\n \n \treq.stats_dma_addr =\n \t    rte_cpu_to_le_64(cpr->hw_stats_map);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1306,11 +1316,11 @@ int bnxt_hwrm_stat_ctx_free(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,\n \tstruct hwrm_stat_ctx_free_input req = {.req_type = 0 };\n \tstruct hwrm_stat_ctx_free_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, STAT_CTX_FREE);\n+\tHWRM_PREP(req, STAT_CTX_FREE, BNXT_USE_CHIMP_MB);\n \n \treq.stat_ctx_id = rte_cpu_to_le_16(cpr->hw_stats_ctx_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1336,12 +1346,12 @@ int bnxt_hwrm_vnic_alloc(struct bnxt *bp, struct bnxt_vnic_info *vnic)\n \tvnic->lb_rule = (uint16_t)HWRM_NA_SIGNATURE;\n \tvnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +\n \t\t\t\tETHER_CRC_LEN + VLAN_TAG_SIZE;\n-\tHWRM_PREP(req, VNIC_ALLOC);\n+\tHWRM_PREP(req, VNIC_ALLOC, BNXT_USE_CHIMP_MB);\n \n \tif (vnic->func_default)\n \t\treq.flags =\n \t\t\trte_cpu_to_le_32(HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1359,11 +1369,11 @@ static int bnxt_hwrm_vnic_plcmodes_qcfg(struct bnxt *bp,\n \tstruct hwrm_vnic_plcmodes_qcfg_input req = {.req_type = 0 };\n \tstruct hwrm_vnic_plcmodes_qcfg_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, VNIC_PLCMODES_QCFG);\n+\tHWRM_PREP(req, VNIC_PLCMODES_QCFG, BNXT_USE_CHIMP_MB);\n \n \treq.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1387,7 +1397,7 @@ static int bnxt_hwrm_vnic_plcmodes_cfg(struct bnxt *bp,\n \tstruct hwrm_vnic_plcmodes_cfg_input req = {.req_type = 0 };\n \tstruct hwrm_vnic_plcmodes_cfg_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, VNIC_PLCMODES_CFG);\n+\tHWRM_PREP(req, VNIC_PLCMODES_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);\n \treq.flags = rte_cpu_to_le_32(pmode->flags);\n@@ -1400,7 +1410,7 @@ static int bnxt_hwrm_vnic_plcmodes_cfg(struct bnxt *bp,\n \t    HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID\n \t);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1425,7 +1435,7 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic)\n \tif (rc)\n \t\treturn rc;\n \n-\tHWRM_PREP(req, VNIC_CFG);\n+\tHWRM_PREP(req, VNIC_CFG, BNXT_USE_CHIMP_MB);\n \n \t/* Only RSS support for now TBD: COS & LB */\n \treq.enables =\n@@ -1464,7 +1474,7 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic)\n \t\treq.flags |= rte_cpu_to_le_32(\n \t\t\tHWRM_VNIC_QCFG_OUTPUT_FLAGS_RSS_DFLT_CR_MODE);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1485,14 +1495,14 @@ int bnxt_hwrm_vnic_qcfg(struct bnxt *bp, struct bnxt_vnic_info *vnic,\n \t\tPMD_DRV_LOG(DEBUG, \"VNIC QCFG ID %d\\n\", vnic->fw_vnic_id);\n \t\treturn rc;\n \t}\n-\tHWRM_PREP(req, VNIC_QCFG);\n+\tHWRM_PREP(req, VNIC_QCFG, BNXT_USE_CHIMP_MB);\n \n \treq.enables =\n \t\trte_cpu_to_le_32(HWRM_VNIC_QCFG_INPUT_ENABLES_VF_ID_VALID);\n \treq.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);\n \treq.vf_id = rte_cpu_to_le_16(fw_vf_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1526,9 +1536,9 @@ int bnxt_hwrm_vnic_ctx_alloc(struct bnxt *bp, struct bnxt_vnic_info *vnic)\n \tstruct hwrm_vnic_rss_cos_lb_ctx_alloc_output *resp =\n \t\t\t\t\t\tbp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, VNIC_RSS_COS_LB_CTX_ALLOC);\n+\tHWRM_PREP(req, VNIC_RSS_COS_LB_CTX_ALLOC, BNXT_USE_CHIMP_MB);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1550,11 +1560,11 @@ int bnxt_hwrm_vnic_ctx_free(struct bnxt *bp, struct bnxt_vnic_info *vnic)\n \t\tPMD_DRV_LOG(DEBUG, \"VNIC RSS Rule %x\\n\", vnic->rss_rule);\n \t\treturn rc;\n \t}\n-\tHWRM_PREP(req, VNIC_RSS_COS_LB_CTX_FREE);\n+\tHWRM_PREP(req, VNIC_RSS_COS_LB_CTX_FREE, BNXT_USE_CHIMP_MB);\n \n \treq.rss_cos_lb_ctx_id = rte_cpu_to_le_16(vnic->rss_rule);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1575,11 +1585,11 @@ int bnxt_hwrm_vnic_free(struct bnxt *bp, struct bnxt_vnic_info *vnic)\n \t\treturn rc;\n \t}\n \n-\tHWRM_PREP(req, VNIC_FREE);\n+\tHWRM_PREP(req, VNIC_FREE, BNXT_USE_CHIMP_MB);\n \n \treq.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1595,7 +1605,7 @@ int bnxt_hwrm_vnic_rss_cfg(struct bnxt *bp,\n \tstruct hwrm_vnic_rss_cfg_input req = {.req_type = 0 };\n \tstruct hwrm_vnic_rss_cfg_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, VNIC_RSS_CFG);\n+\tHWRM_PREP(req, VNIC_RSS_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.hash_type = rte_cpu_to_le_32(vnic->hash_type);\n \treq.hash_mode_flags = vnic->hash_mode;\n@@ -1606,7 +1616,7 @@ int bnxt_hwrm_vnic_rss_cfg(struct bnxt *bp,\n \t    rte_cpu_to_le_64(vnic->rss_hash_key_dma_addr);\n \treq.rss_ctx_idx = rte_cpu_to_le_16(vnic->rss_rule);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1627,7 +1637,7 @@ int bnxt_hwrm_vnic_plcmode_cfg(struct bnxt *bp,\n \t\treturn rc;\n \t}\n \n-\tHWRM_PREP(req, VNIC_PLCMODES_CFG);\n+\tHWRM_PREP(req, VNIC_PLCMODES_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.flags = rte_cpu_to_le_32(\n \t\t\tHWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT);\n@@ -1641,7 +1651,7 @@ int bnxt_hwrm_vnic_plcmode_cfg(struct bnxt *bp,\n \treq.jumbo_thresh = rte_cpu_to_le_16(size);\n \treq.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1656,7 +1666,7 @@ int bnxt_hwrm_vnic_tpa_cfg(struct bnxt *bp,\n \tstruct hwrm_vnic_tpa_cfg_input req = {.req_type = 0 };\n \tstruct hwrm_vnic_tpa_cfg_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, VNIC_TPA_CFG);\n+\tHWRM_PREP(req, VNIC_TPA_CFG, BNXT_USE_CHIMP_MB);\n \n \tif (enable) {\n \t\treq.enables = rte_cpu_to_le_32(\n@@ -1677,7 +1687,7 @@ int bnxt_hwrm_vnic_tpa_cfg(struct bnxt *bp,\n \t}\n \treq.vnic_id = rte_cpu_to_le_16(vnic->fw_vnic_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -1697,9 +1707,9 @@ int bnxt_hwrm_func_vf_mac(struct bnxt *bp, uint16_t vf, const uint8_t *mac_addr)\n \tmemcpy(req.dflt_mac_addr, mac_addr, sizeof(req.dflt_mac_addr));\n \treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[vf].fid);\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n \n@@ -1715,11 +1725,11 @@ int bnxt_hwrm_func_qstats_tx_drop(struct bnxt *bp, uint16_t fid,\n \tstruct hwrm_func_qstats_input req = {.req_type = 0};\n \tstruct hwrm_func_qstats_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, FUNC_QSTATS);\n+\tHWRM_PREP(req, FUNC_QSTATS, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(fid);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1738,11 +1748,11 @@ int bnxt_hwrm_func_qstats(struct bnxt *bp, uint16_t fid,\n \tstruct hwrm_func_qstats_input req = {.req_type = 0};\n \tstruct hwrm_func_qstats_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, FUNC_QSTATS);\n+\tHWRM_PREP(req, FUNC_QSTATS, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(fid);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -1775,11 +1785,11 @@ int bnxt_hwrm_func_clr_stats(struct bnxt *bp, uint16_t fid)\n \tstruct hwrm_func_clr_stats_input req = {.req_type = 0};\n \tstruct hwrm_func_clr_stats_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, FUNC_CLR_STATS);\n+\tHWRM_PREP(req, FUNC_CLR_STATS, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(fid);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -2435,10 +2445,10 @@ int bnxt_hwrm_func_qcfg(struct bnxt *bp)\n \tuint16_t flags;\n \tint rc = 0;\n \n-\tHWRM_PREP(req, FUNC_QCFG);\n+\tHWRM_PREP(req, FUNC_QCFG, BNXT_USE_CHIMP_MB);\n \treq.fid = rte_cpu_to_le_16(0xffff);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -2522,9 +2532,9 @@ static int bnxt_hwrm_pf_func_cfg(struct bnxt *bp, int tx_rings)\n \treq.num_hw_ring_grps = rte_cpu_to_le_16(bp->max_ring_grps);\n \treq.fid = rte_cpu_to_le_16(0xffff);\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -2595,9 +2605,9 @@ static void reserve_resources_from_vf(struct bnxt *bp,\n \tint rc;\n \n \t/* Get the actual allocated values now */\n-\tHWRM_PREP(req, FUNC_QCAPS);\n+\tHWRM_PREP(req, FUNC_QCAPS, BNXT_USE_CHIMP_MB);\n \treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[vf].fid);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tif (rc) {\n \t\tPMD_DRV_LOG(ERR, \"hwrm_func_qcaps failed rc:%d\\n\", rc);\n@@ -2631,9 +2641,9 @@ int bnxt_hwrm_func_qcfg_current_vf_vlan(struct bnxt *bp, int vf)\n \tint rc;\n \n \t/* Check for zero MAC address */\n-\tHWRM_PREP(req, FUNC_QCFG);\n+\tHWRM_PREP(req, FUNC_QCFG, BNXT_USE_CHIMP_MB);\n \treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[vf].fid);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tif (rc) {\n \t\tPMD_DRV_LOG(ERR, \"hwrm_func_qcfg failed rc:%d\\n\", rc);\n \t\treturn -1;\n@@ -2656,9 +2666,9 @@ static int update_pf_resource_max(struct bnxt *bp)\n \tint rc;\n \n \t/* And copy the allocated numbers into the pf struct */\n-\tHWRM_PREP(req, FUNC_QCFG);\n+\tHWRM_PREP(req, FUNC_QCFG, BNXT_USE_CHIMP_MB);\n \treq.fid = rte_cpu_to_le_16(0xffff);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tHWRM_CHECK_RESULT();\n \n \t/* Only TX ring value reflects actual allocation? TODO */\n@@ -2758,10 +2768,13 @@ int bnxt_hwrm_allocate_vfs(struct bnxt *bp, int num_vfs)\n \tfor (i = 0; i < num_vfs; i++) {\n \t\tadd_random_mac_if_needed(bp, &req, i);\n \n-\t\tHWRM_PREP(req, FUNC_CFG);\n+\t\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \t\treq.flags = rte_cpu_to_le_32(bp->pf.vf_info[i].func_cfg_flags);\n \t\treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[i].fid);\n-\t\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\t\trc = bnxt_hwrm_send_message(bp,\n+\t\t\t\t\t    &req,\n+\t\t\t\t\t    sizeof(req),\n+\t\t\t\t\t    BNXT_USE_CHIMP_MB);\n \n \t\t/* Clear enable flag for next pass */\n \t\treq.enables &= ~rte_cpu_to_le_32(\n@@ -2811,13 +2824,13 @@ int bnxt_hwrm_pf_evb_mode(struct bnxt *bp)\n \tstruct hwrm_func_cfg_output *resp = bp->hwrm_cmd_resp_addr;\n \tint rc;\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(0xffff);\n \treq.enables = rte_cpu_to_le_32(HWRM_FUNC_CFG_INPUT_ENABLES_EVB_MODE);\n \treq.evb_mode = bp->pf.evb_mode;\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n \n@@ -2831,10 +2844,10 @@ int bnxt_hwrm_tunnel_dst_port_alloc(struct bnxt *bp, uint16_t port,\n \tstruct hwrm_tunnel_dst_port_alloc_output *resp = bp->hwrm_cmd_resp_addr;\n \tint rc = 0;\n \n-\tHWRM_PREP(req, TUNNEL_DST_PORT_ALLOC);\n+\tHWRM_PREP(req, TUNNEL_DST_PORT_ALLOC, BNXT_USE_CHIMP_MB);\n \treq.tunnel_type = tunnel_type;\n \treq.tunnel_dst_port_val = port;\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tHWRM_CHECK_RESULT();\n \n \tswitch (tunnel_type) {\n@@ -2862,11 +2875,11 @@ int bnxt_hwrm_tunnel_dst_port_free(struct bnxt *bp, uint16_t port,\n \tstruct hwrm_tunnel_dst_port_free_output *resp = bp->hwrm_cmd_resp_addr;\n \tint rc = 0;\n \n-\tHWRM_PREP(req, TUNNEL_DST_PORT_FREE);\n+\tHWRM_PREP(req, TUNNEL_DST_PORT_FREE, BNXT_USE_CHIMP_MB);\n \n \treq.tunnel_type = tunnel_type;\n \treq.tunnel_dst_port_id = rte_cpu_to_be_16(port);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -2881,11 +2894,11 @@ int bnxt_hwrm_func_cfg_vf_set_flags(struct bnxt *bp, uint16_t vf,\n \tstruct hwrm_func_cfg_input req = {0};\n \tint rc;\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[vf].fid);\n \treq.flags = rte_cpu_to_le_32(flags);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -2911,7 +2924,7 @@ int bnxt_hwrm_func_buf_rgtr(struct bnxt *bp)\n \tstruct hwrm_func_buf_rgtr_input req = {.req_type = 0 };\n \tstruct hwrm_func_buf_rgtr_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, FUNC_BUF_RGTR);\n+\tHWRM_PREP(req, FUNC_BUF_RGTR, BNXT_USE_CHIMP_MB);\n \n \treq.req_buf_num_pages = rte_cpu_to_le_16(1);\n \treq.req_buf_page_size = rte_cpu_to_le_16(\n@@ -2925,7 +2938,7 @@ int bnxt_hwrm_func_buf_rgtr(struct bnxt *bp)\n \t\treturn -ENOMEM;\n \t}\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -2939,9 +2952,9 @@ int bnxt_hwrm_func_buf_unrgtr(struct bnxt *bp)\n \tstruct hwrm_func_buf_unrgtr_input req = {.req_type = 0 };\n \tstruct hwrm_func_buf_unrgtr_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, FUNC_BUF_UNRGTR);\n+\tHWRM_PREP(req, FUNC_BUF_UNRGTR, BNXT_USE_CHIMP_MB);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -2955,7 +2968,7 @@ int bnxt_hwrm_func_cfg_def_cp(struct bnxt *bp)\n \tstruct hwrm_func_cfg_input req = {0};\n \tint rc;\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(0xffff);\n \treq.flags = rte_cpu_to_le_32(bp->pf.func_cfg_flags);\n@@ -2963,7 +2976,7 @@ int bnxt_hwrm_func_cfg_def_cp(struct bnxt *bp)\n \t\t\tHWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR);\n \treq.async_event_cr = rte_cpu_to_le_16(\n \t\t\tbp->def_cp_ring->cp_ring_struct->fw_ring_id);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -2977,13 +2990,13 @@ int bnxt_hwrm_vf_func_cfg_def_cp(struct bnxt *bp)\n \tstruct hwrm_func_vf_cfg_input req = {0};\n \tint rc;\n \n-\tHWRM_PREP(req, FUNC_VF_CFG);\n+\tHWRM_PREP(req, FUNC_VF_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.enables = rte_cpu_to_le_32(\n \t\t\tHWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR);\n \treq.async_event_cr = rte_cpu_to_le_16(\n \t\t\tbp->def_cp_ring->cp_ring_struct->fw_ring_id);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -2999,7 +3012,7 @@ int bnxt_hwrm_set_default_vlan(struct bnxt *bp, int vf, uint8_t is_vf)\n \tuint32_t func_cfg_flags;\n \tint rc = 0;\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n \tif (is_vf) {\n \t\tdflt_vlan = bp->pf.vf_info[vf].dflt_vlan;\n@@ -3016,7 +3029,7 @@ int bnxt_hwrm_set_default_vlan(struct bnxt *bp, int vf, uint8_t is_vf)\n \treq.enables |= rte_cpu_to_le_32(HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN);\n \treq.dflt_vlan = rte_cpu_to_le_16(dflt_vlan);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3031,13 +3044,13 @@ int bnxt_hwrm_func_bw_cfg(struct bnxt *bp, uint16_t vf,\n \tstruct hwrm_func_cfg_input req = {0};\n \tint rc;\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[vf].fid);\n \treq.enables |= rte_cpu_to_le_32(enables);\n \treq.flags = rte_cpu_to_le_32(bp->pf.vf_info[vf].func_cfg_flags);\n \treq.max_bw = rte_cpu_to_le_32(max_bw);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3051,14 +3064,14 @@ int bnxt_hwrm_set_vf_vlan(struct bnxt *bp, int vf)\n \tstruct hwrm_func_cfg_output *resp = bp->hwrm_cmd_resp_addr;\n \tint rc = 0;\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.flags = rte_cpu_to_le_32(bp->pf.vf_info[vf].func_cfg_flags);\n \treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[vf].fid);\n \treq.enables |= rte_cpu_to_le_32(HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN);\n \treq.dflt_vlan = rte_cpu_to_le_16(bp->pf.vf_info[vf].dflt_vlan);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3088,12 +3101,12 @@ int bnxt_hwrm_reject_fwd_resp(struct bnxt *bp, uint16_t target_id,\n \tif (ec_size > sizeof(req.encap_request))\n \t\treturn -1;\n \n-\tHWRM_PREP(req, REJECT_FWD_RESP);\n+\tHWRM_PREP(req, REJECT_FWD_RESP, BNXT_USE_CHIMP_MB);\n \n \treq.encap_resp_target_id = rte_cpu_to_le_16(target_id);\n \tmemcpy(req.encap_request, encaped, ec_size);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3108,10 +3121,10 @@ int bnxt_hwrm_func_qcfg_vf_default_mac(struct bnxt *bp, uint16_t vf,\n \tstruct hwrm_func_qcfg_output *resp = bp->hwrm_cmd_resp_addr;\n \tint rc;\n \n-\tHWRM_PREP(req, FUNC_QCFG);\n+\tHWRM_PREP(req, FUNC_QCFG, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[vf].fid);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -3132,12 +3145,12 @@ int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, uint16_t target_id,\n \tif (ec_size > sizeof(req.encap_request))\n \t\treturn -1;\n \n-\tHWRM_PREP(req, EXEC_FWD_RESP);\n+\tHWRM_PREP(req, EXEC_FWD_RESP, BNXT_USE_CHIMP_MB);\n \n \treq.encap_resp_target_id = rte_cpu_to_le_16(target_id);\n \tmemcpy(req.encap_request, encaped, ec_size);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3152,11 +3165,11 @@ int bnxt_hwrm_ctx_qstats(struct bnxt *bp, uint32_t cid, int idx,\n \tstruct hwrm_stat_ctx_query_input req = {.req_type = 0};\n \tstruct hwrm_stat_ctx_query_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, STAT_CTX_QUERY);\n+\tHWRM_PREP(req, STAT_CTX_QUERY, BNXT_USE_CHIMP_MB);\n \n \treq.stat_ctx_id = rte_cpu_to_le_32(cid);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -3192,12 +3205,12 @@ int bnxt_hwrm_port_qstats(struct bnxt *bp)\n \tstruct bnxt_pf_info *pf = &bp->pf;\n \tint rc;\n \n-\tHWRM_PREP(req, PORT_QSTATS);\n+\tHWRM_PREP(req, PORT_QSTATS, BNXT_USE_CHIMP_MB);\n \n \treq.port_id = rte_cpu_to_le_16(pf->port_id);\n \treq.tx_stat_host_addr = rte_cpu_to_le_64(bp->hw_tx_port_stats_map);\n \treq.rx_stat_host_addr = rte_cpu_to_le_64(bp->hw_rx_port_stats_map);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3217,10 +3230,10 @@ int bnxt_hwrm_port_clr_stats(struct bnxt *bp)\n \t    BNXT_NPAR(bp) || BNXT_MH(bp) || BNXT_TOTAL_VFS(bp))\n \t\treturn 0;\n \n-\tHWRM_PREP(req, PORT_CLR_STATS);\n+\tHWRM_PREP(req, PORT_CLR_STATS, BNXT_USE_CHIMP_MB);\n \n \treq.port_id = rte_cpu_to_le_16(pf->port_id);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3237,9 +3250,9 @@ int bnxt_hwrm_port_led_qcaps(struct bnxt *bp)\n \tif (BNXT_VF(bp))\n \t\treturn 0;\n \n-\tHWRM_PREP(req, PORT_LED_QCAPS);\n+\tHWRM_PREP(req, PORT_LED_QCAPS, BNXT_USE_CHIMP_MB);\n \treq.port_id = bp->pf.port_id;\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -3279,7 +3292,7 @@ int bnxt_hwrm_port_led_cfg(struct bnxt *bp, bool led_on)\n \tif (!bp->num_leds || BNXT_VF(bp))\n \t\treturn -EOPNOTSUPP;\n \n-\tHWRM_PREP(req, PORT_LED_CFG);\n+\tHWRM_PREP(req, PORT_LED_CFG, BNXT_USE_CHIMP_MB);\n \n \tif (led_on) {\n \t\tled_state = HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINKALT;\n@@ -3297,7 +3310,7 @@ int bnxt_hwrm_port_led_cfg(struct bnxt *bp, bool led_on)\n \t\tled_cfg->led_group_id = bp->leds[i].led_group_id;\n \t}\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3312,9 +3325,9 @@ int bnxt_hwrm_nvm_get_dir_info(struct bnxt *bp, uint32_t *entries,\n \tstruct hwrm_nvm_get_dir_info_input req = {0};\n \tstruct hwrm_nvm_get_dir_info_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, NVM_GET_DIR_INFO);\n+\tHWRM_PREP(req, NVM_GET_DIR_INFO, BNXT_USE_CHIMP_MB);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3357,9 +3370,9 @@ int bnxt_get_nvram_directory(struct bnxt *bp, uint32_t len, uint8_t *data)\n \t\t\t\"unable to map response address to physical memory\\n\");\n \t\treturn -ENOMEM;\n \t}\n-\tHWRM_PREP(req, NVM_GET_DIR_ENTRIES);\n+\tHWRM_PREP(req, NVM_GET_DIR_ENTRIES, BNXT_USE_CHIMP_MB);\n \treq.host_dest_addr = rte_cpu_to_le_64(dma_handle);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tif (rc == 0)\n \t\tmemcpy(data, buf, len > buflen ? buflen : len);\n@@ -3392,12 +3405,12 @@ int bnxt_hwrm_get_nvram_item(struct bnxt *bp, uint32_t index,\n \t\t\t\"unable to map response address to physical memory\\n\");\n \t\treturn -ENOMEM;\n \t}\n-\tHWRM_PREP(req, NVM_READ);\n+\tHWRM_PREP(req, NVM_READ, BNXT_USE_CHIMP_MB);\n \treq.host_dest_addr = rte_cpu_to_le_64(dma_handle);\n \treq.dir_idx = rte_cpu_to_le_16(index);\n \treq.offset = rte_cpu_to_le_32(offset);\n \treq.len = rte_cpu_to_le_32(length);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tif (rc == 0)\n \t\tmemcpy(data, buf, length);\n \n@@ -3414,9 +3427,9 @@ int bnxt_hwrm_erase_nvram_directory(struct bnxt *bp, uint8_t index)\n \tstruct hwrm_nvm_erase_dir_entry_input req = {0};\n \tstruct hwrm_nvm_erase_dir_entry_output *resp = bp->hwrm_cmd_resp_addr;\n \n-\tHWRM_PREP(req, NVM_ERASE_DIR_ENTRY);\n+\tHWRM_PREP(req, NVM_ERASE_DIR_ENTRY, BNXT_USE_CHIMP_MB);\n \treq.dir_idx = rte_cpu_to_le_16(index);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n \n@@ -3448,7 +3461,7 @@ int bnxt_hwrm_flash_nvram(struct bnxt *bp, uint16_t dir_type,\n \t}\n \tmemcpy(buf, data, data_len);\n \n-\tHWRM_PREP(req, NVM_WRITE);\n+\tHWRM_PREP(req, NVM_WRITE, BNXT_USE_CHIMP_MB);\n \n \treq.dir_type = rte_cpu_to_le_16(dir_type);\n \treq.dir_ordinal = rte_cpu_to_le_16(dir_ordinal);\n@@ -3457,7 +3470,7 @@ int bnxt_hwrm_flash_nvram(struct bnxt *bp, uint16_t dir_type,\n \treq.dir_data_length = rte_cpu_to_le_32(data_len);\n \treq.host_src_addr = rte_cpu_to_le_64(dma_handle);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \trte_free(buf);\n \tHWRM_CHECK_RESULT();\n@@ -3499,7 +3512,7 @@ static int bnxt_hwrm_func_vf_vnic_query(struct bnxt *bp, uint16_t vf,\n \tint rc;\n \n \t/* First query all VNIC ids */\n-\tHWRM_PREP(req, FUNC_VF_VNIC_IDS_QUERY);\n+\tHWRM_PREP(req, FUNC_VF_VNIC_IDS_QUERY, BNXT_USE_CHIMP_MB);\n \n \treq.vf_id = rte_cpu_to_le_16(bp->pf.first_vf_id + vf);\n \treq.max_vnic_id_cnt = rte_cpu_to_le_32(bp->pf.total_vnics);\n@@ -3511,7 +3524,7 @@ static int bnxt_hwrm_func_vf_vnic_query(struct bnxt *bp, uint16_t vf,\n \t\t\"unable to map VNIC ID table address to physical memory\\n\");\n \t\treturn -ENOMEM;\n \t}\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tif (rc) {\n \t\tHWRM_UNLOCK();\n \t\tPMD_DRV_LOG(ERR, \"hwrm_func_vf_vnic_query failed rc:%d\\n\", rc);\n@@ -3591,7 +3604,7 @@ int bnxt_hwrm_func_cfg_vf_set_vlan_anti_spoof(struct bnxt *bp, uint16_t vf,\n \tstruct hwrm_func_cfg_input req = {0};\n \tint rc;\n \n-\tHWRM_PREP(req, FUNC_CFG);\n+\tHWRM_PREP(req, FUNC_CFG, BNXT_USE_CHIMP_MB);\n \n \treq.fid = rte_cpu_to_le_16(bp->pf.vf_info[vf].fid);\n \treq.enables |= rte_cpu_to_le_32(\n@@ -3599,7 +3612,7 @@ int bnxt_hwrm_func_cfg_vf_set_vlan_anti_spoof(struct bnxt *bp, uint16_t vf,\n \treq.vlan_antispoof_mode = on ?\n \t\tHWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN :\n \t\tHWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_NOCHECK;\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3668,7 +3681,7 @@ int bnxt_hwrm_set_em_filter(struct bnxt *bp,\n \tif (filter->fw_em_filter_id != UINT64_MAX)\n \t\tbnxt_hwrm_clear_em_filter(bp, filter);\n \n-\tHWRM_PREP(req, CFA_EM_FLOW_ALLOC);\n+\tHWRM_PREP(req, CFA_EM_FLOW_ALLOC, BNXT_USE_KONG(bp));\n \n \treq.flags = rte_cpu_to_le_32(filter->flags);\n \n@@ -3721,7 +3734,7 @@ int bnxt_hwrm_set_em_filter(struct bnxt *bp,\n \n \treq.enables = rte_cpu_to_le_32(enables);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp));\n \n \tHWRM_CHECK_RESULT();\n \n@@ -3741,11 +3754,11 @@ int bnxt_hwrm_clear_em_filter(struct bnxt *bp, struct bnxt_filter_info *filter)\n \t\treturn 0;\n \n \tPMD_DRV_LOG(ERR, \"Clear EM filter\\n\");\n-\tHWRM_PREP(req, CFA_EM_FLOW_FREE);\n+\tHWRM_PREP(req, CFA_EM_FLOW_FREE, BNXT_USE_KONG(bp));\n \n \treq.em_filter_id = rte_cpu_to_le_64(filter->fw_em_filter_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp));\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3769,7 +3782,7 @@ int bnxt_hwrm_set_ntuple_filter(struct bnxt *bp,\n \tif (filter->fw_ntuple_filter_id != UINT64_MAX)\n \t\tbnxt_hwrm_clear_ntuple_filter(bp, filter);\n \n-\tHWRM_PREP(req, CFA_NTUPLE_FILTER_ALLOC);\n+\tHWRM_PREP(req, CFA_NTUPLE_FILTER_ALLOC, BNXT_USE_CHIMP_MB);\n \n \treq.flags = rte_cpu_to_le_32(filter->flags);\n \n@@ -3832,7 +3845,7 @@ int bnxt_hwrm_set_ntuple_filter(struct bnxt *bp,\n \n \treq.enables = rte_cpu_to_le_32(enables);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \n@@ -3853,11 +3866,11 @@ int bnxt_hwrm_clear_ntuple_filter(struct bnxt *bp,\n \tif (filter->fw_ntuple_filter_id == UINT64_MAX)\n \t\treturn 0;\n \n-\tHWRM_PREP(req, CFA_NTUPLE_FILTER_FREE);\n+\tHWRM_PREP(req, CFA_NTUPLE_FILTER_FREE, BNXT_USE_CHIMP_MB);\n \n \treq.ntuple_filter_id = rte_cpu_to_le_64(filter->fw_ntuple_filter_id);\n \n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n@@ -3937,10 +3950,10 @@ int bnxt_hwrm_set_ring_coal(struct bnxt *bp,\n \tif (!bnxt_stratus_device(bp))\n \t\treturn 0;\n \n-\tHWRM_PREP(req, RING_CMPL_RING_CFG_AGGINT_PARAMS);\n+\tHWRM_PREP(req, RING_CMPL_RING_CFG_AGGINT_PARAMS, BNXT_USE_CHIMP_MB);\n \tbnxt_hwrm_set_coal_params(coal, &req);\n \treq.ring_id = rte_cpu_to_le_16(ring_id);\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \tHWRM_CHECK_RESULT();\n \tHWRM_UNLOCK();\n \treturn 0;\n@@ -3957,7 +3970,7 @@ int bnxt_hwrm_ext_port_qstats(struct bnxt *bp)\n \t      bp->flags & BNXT_FLAG_EXT_TX_PORT_STATS))\n \t\treturn 0;\n \n-\tHWRM_PREP(req, PORT_QSTATS_EXT);\n+\tHWRM_PREP(req, PORT_QSTATS_EXT, BNXT_USE_CHIMP_MB);\n \n \treq.port_id = rte_cpu_to_le_16(pf->port_id);\n \tif (bp->flags & BNXT_FLAG_EXT_TX_PORT_STATS) {\n@@ -3972,7 +3985,7 @@ int bnxt_hwrm_ext_port_qstats(struct bnxt *bp)\n \t\treq.rx_stat_size =\n \t\t\trte_cpu_to_le_16(sizeof(struct rx_port_stats_ext));\n \t}\n-\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req));\n+\trc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);\n \n \tif (rc) {\n \t\tbp->fw_rx_port_stats_ext_size = 0;\n",
    "prefixes": [
        "v2",
        "06/12"
    ]
}