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Update a patch.
GET /api/patches/44651/?format=api
{ "id": 44651, "url": "http://patches.dpdk.org/api/patches/44651/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20180913094201.17098-4-g.singh@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20180913094201.17098-4-g.singh@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20180913094201.17098-4-g.singh@nxp.com", "date": "2018-09-13T09:42:01", "name": "[v2,3/3] net/enetc: enable Rx and Tx", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "19f818a6e4c733a1c30aa15f4642c2274d8255c7", "submitter": { "id": 1068, "url": "http://patches.dpdk.org/api/people/1068/?format=api", "name": "Gagandeep Singh", "email": "g.singh@nxp.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20180913094201.17098-4-g.singh@nxp.com/mbox/", "series": [ { "id": 1302, "url": "http://patches.dpdk.org/api/series/1302/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1302", "date": "2018-09-13T09:41:58", "name": "introduces the enetc PMD driver", "version": 2, "mbox": "http://patches.dpdk.org/series/1302/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/44651/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/44651/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BA9B55B2C;\n\tThu, 13 Sep 2018 11:42:41 +0200 (CEST)", "from EUR02-VE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr20079.outbound.protection.outlook.com [40.107.2.79])\n\tby dpdk.org (Postfix) with ESMTP id CF5425A44\n\tfor <dev@dpdk.org>; Thu, 13 Sep 2018 11:42:37 +0200 (CEST)", "from Tophie.ap.freescale.net (14.142.187.166) by\n\tVI1PR04MB1533.eurprd04.prod.outlook.com (2a01:111:e400:596a::19) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1122.17;\n\tThu, 13 Sep 2018 09:42:34 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=FhGQbkCbFxXKCogO6CxmLtkxrqNNm42F0AeOe/gvKq8=;\n\tb=WqhaTHmQicaPR+cz+6hkvtlxLhpRCLBbPB1vQQXucIFZFcTj2Enb3Zu0J4DZDt/WApa9anlYljlSJ3UhQ+mcwJMNzzlHD1Mz//dUAQLtMiG8rflkWrIKeELCwZYSzJmG9ZwUGzrzjnCG26ORibDoECa1vLf5bdveUyExSfUCpWA=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=G.Singh@nxp.com; ", "From": "Gagandeep Singh <g.singh@nxp.com>", "To": "dev@dpdk.org,\n\tferruh.yigit@intel.com", "Cc": "pankaj.chauhan@nxp.com,\n\tGagandeep Singh <g.singh@nxp.com>", "Date": "Thu, 13 Sep 2018 15:12:01 +0530", "Message-Id": "<20180913094201.17098-4-g.singh@nxp.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20180913094201.17098-1-g.singh@nxp.com>", "References": "<20180906055449.21731-1-g.singh@nxp.com>\n\t<20180913094201.17098-1-g.singh@nxp.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[14.142.187.166]", "X-ClientProxiedBy": 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"HaDhc1ZpZ0CPfysfKRUSNu6brog5hDBuTXsFHbhbSgybjuKe2X3J/rkxytyIBRj6YyZZ/Nd1N90KEDdMinHkUxjDmpuG7ybATld1uhCydu8HjbPeqzQQAuXq97d65SQooewnt0vlBOH4a5msCELoHSDEwuRgyKmvtfcvbxMiNh4gnUIReKKaUSioI8wYSePSmV7/202xhK7imI0kf+WI9Q/bfyJ6YmTHbVCyJeyD0UEcfcV8STDZDBS/qpw28GqJVbsMS7Sgutb0f23WBQwtWKYIIQ233ojqjSbXbCLYhkNdRZNOymJh6D6AJEBjwGe1dabntPcNYFJzbEFwCaMlseLPwSIQ+jKK076OSBJdc/o=", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "13 Sep 2018 09:42:34.1900\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "d4b9b096-e343-4c3a-10b7-08d6195d3c39", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "VI1PR04MB1533", "Subject": "[dpdk-dev] [PATCH v2 3/3] net/enetc: enable Rx and Tx", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add RX and TX queue setup, datapath functions\nand enable the packet parsing\n\nSigned-off-by: Gagandeep Singh <g.singh@nxp.com>\n---\n MAINTAINERS | 1 +\n drivers/net/enetc/Makefile | 3 +-\n drivers/net/enetc/enetc_ethdev.c | 6 +-\n drivers/net/enetc/enetc_rxtx.c | 447 +++++++++++++++++++++++++++++++\n drivers/net/enetc/meson.build | 3 +-\n 5 files changed, 456 insertions(+), 4 deletions(-)\n create mode 100644 drivers/net/enetc/enetc_rxtx.c", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex fc70ac049..b67f2afa4 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -645,6 +645,7 @@ F: doc/guides/nics/features/dpaa2.ini\n \n NXP enetc\n M: Gagandeep Singh <g.singh@nxp.com>\n+M: Pankaj Chauhan <pankaj.chauhan@nxp.com>\n F: drivers/net/enetc/\n F: doc/guides/nics/enetc.rst\n F: doc/guides/nics/features/enetc.ini\ndiff --git a/drivers/net/enetc/Makefile b/drivers/net/enetc/Makefile\nindex 3f4ba97da..1f886831a 100644\n--- a/drivers/net/enetc/Makefile\n+++ b/drivers/net/enetc/Makefile\n@@ -16,8 +16,9 @@ LIBABIVER := 1\n # all source are stored in SRCS-y\n #\n SRCS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc_ethdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc_rxtx.c\n \n-LDLIBS += -lrte_eal\n+LDLIBS += -lrte_eal -lrte_mempool\n LDLIBS += -lrte_ethdev\n LDLIBS += -lrte_bus_pci\n \ndiff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c\nindex 06438835d..67106593f 100644\n--- a/drivers/net/enetc/enetc_ethdev.c\n+++ b/drivers/net/enetc/enetc_ethdev.c\n@@ -37,6 +37,8 @@ static const struct eth_dev_ops enetc_ops = {\n \t.dev_close = enetc_dev_close,\n \t.link_update = enetc_link_update,\n \t.dev_infos_get = enetc_dev_infos_get,\n+\t.rx_queue_setup = enetc_rx_queue_setup,\n+\t.tx_queue_setup = enetc_tx_queue_setup,\n };\n \n /**\n@@ -61,8 +63,8 @@ enetc_dev_init(struct rte_eth_dev *eth_dev)\n \n \tPMD_INIT_FUNC_TRACE();\n \teth_dev->dev_ops = &enetc_ops;\n-\teth_dev->rx_pkt_burst = NULL;\n-\teth_dev->tx_pkt_burst = NULL;\n+\teth_dev->rx_pkt_burst = &enetc_recv_pkts;\n+\teth_dev->tx_pkt_burst = &enetc_xmit_pkts;\n \n \trte_eth_copy_pci_info(eth_dev, pci_dev);\n \ndiff --git a/drivers/net/enetc/enetc_rxtx.c b/drivers/net/enetc/enetc_rxtx.c\nnew file mode 100644\nindex 000000000..b01f64b0c\n--- /dev/null\n+++ b/drivers/net/enetc/enetc_rxtx.c\n@@ -0,0 +1,447 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2018 NXP\n+ */\n+\n+#include <stdbool.h>\n+#include <stdint.h>\n+#include <unistd.h>\n+\n+#include \"rte_ethdev.h\"\n+#include \"rte_malloc.h\"\n+#include \"rte_memzone.h\"\n+\n+#include \"base/enetc_hw.h\"\n+#include \"enetc.h\"\n+#include \"enetc_logs.h\"\n+\n+#define ENETC_RXBD_BUNDLE 8 /* Number of BDs to update at once */\n+\n+static inline int enetc_bd_unused(struct enetc_bdr *bdr)\n+{\n+\tif (bdr->next_to_clean > bdr->next_to_use)\n+\t\treturn bdr->next_to_clean - bdr->next_to_use - 1;\n+\n+\treturn bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;\n+}\n+\n+static bool enetc_clean_tx_ring(struct enetc_bdr *tx_ring)\n+{\n+\tint tx_frm_cnt = 0;\n+\tstruct enetc_swbd *tx_swbd;\n+\tint i;\n+\n+\ti = tx_ring->next_to_clean;\n+\ttx_swbd = &tx_ring->q_swbd[i];\n+\twhile ((int)(enetc_rd_reg(tx_ring->tcisr) & ENETC_TBCISR_IDX_MASK) != i) {\n+\t\trte_pktmbuf_free(tx_swbd->buffer_addr);\n+\t\ttx_swbd->buffer_addr = NULL;\n+\t\ttx_swbd++;\n+\t\ti++;\n+\t\tif (unlikely(i == tx_ring->bd_count)) {\n+\t\t\ti = 0;\n+\t\t\ttx_swbd = &tx_ring->q_swbd[0];\n+\t\t}\n+\n+\t\ttx_frm_cnt++;\n+\t}\n+\ttx_ring->next_to_clean = i;\n+\treturn tx_frm_cnt++;\n+}\n+\n+uint16_t enetc_xmit_pkts(void *tx_queue,\n+\t\t\tstruct rte_mbuf **tx_pkts,\n+\t\t\t\tuint16_t nb_pkts)\n+{\n+\tstruct enetc_swbd *tx_swbd;\n+\tint i, start;\n+\tstruct enetc_tx_bd *txbd;\n+\tstruct enetc_bdr *tx_ring = (struct enetc_bdr *)tx_queue;\n+\n+\ti = tx_ring->next_to_use;\n+\tstart = 0;\n+\twhile (nb_pkts--) {\n+\t\tenetc_clean_tx_ring(tx_ring);\n+\n+\t\ttx_ring->q_swbd[i].buffer_addr = tx_pkts[start];\n+\n+\t\ttxbd = ENETC_TXBD(*tx_ring, i);\n+\t\ttx_swbd = &tx_ring->q_swbd[i];\n+\t\ttxbd->frm_len = tx_pkts[start]->pkt_len;\n+\t\ttxbd->buf_len = txbd->frm_len;\n+\t\ttxbd->flags = rte_cpu_to_le_16(ENETC_TXBD_FLAGS_F);\n+\t\ttxbd->addr =\n+\t\t(uint64_t)rte_cpu_to_le_64(tx_swbd->buffer_addr->buf_addr +\n+\t\t\t\ttx_swbd->buffer_addr->data_off);\n+\t\ti++;\n+\t\tstart++;\n+\t\tif (unlikely(i == tx_ring->bd_count))\n+\t\t\ti = 0;\n+\t}\n+\ttx_ring->next_to_use = i;\n+\tenetc_wr_reg(tx_ring->tcir, i);\n+\treturn start;\n+}\n+\n+static int enetc_refill_rx_ring(struct enetc_bdr *rx_ring, const int buff_cnt)\n+{\n+\tstruct enetc_swbd *rx_swbd;\n+\tunion enetc_rx_bd *rxbd;\n+\tint i, j;\n+\n+\ti = rx_ring->next_to_use;\n+\trx_swbd = &rx_ring->q_swbd[i];\n+\trxbd = ENETC_RXBD(*rx_ring, i);\n+\n+\tfor (j = 0; j < buff_cnt; j++) {\n+\t\trx_swbd->buffer_addr =\n+\t\t\trte_cpu_to_le_64(rte_mbuf_raw_alloc(rx_ring->mb_pool));\n+\t\trxbd->w.addr = (uint64_t)rx_swbd->buffer_addr->buf_addr +\n+\t\t\t\t\t\trx_swbd->buffer_addr->data_off;\n+\t\t/* clear 'R\" as well */\n+\t\trxbd->r.lstatus = 0;\n+\t\trx_swbd++;\n+\t\trxbd++;\n+\t\ti++;\n+\n+\t\tif (unlikely(i == rx_ring->bd_count)) {\n+\t\t\ti = 0;\n+\t\t\trxbd = ENETC_RXBD(*rx_ring, 0);\n+\t\t\trx_swbd = &rx_ring->q_swbd[i];\n+\t\t}\n+\t}\n+\tif (likely(j)) {\n+\t\trx_ring->next_to_alloc = i;\n+\t\trx_ring->next_to_use = i;\n+\t\tenetc_wr_reg(rx_ring->rcir, i);\n+\t}\n+\treturn j;\n+}\n+\n+\n+static inline void __attribute__((hot))\n+enetc_dev_rx_parse(struct rte_mbuf *m, uint16_t parse_results)\n+{\n+\tENETC_PMD_DP_DEBUG(\"parse summary = 0x%x \", parse_results);\n+\n+\tm->packet_type = RTE_PTYPE_UNKNOWN;\n+\tswitch (parse_results) {\n+\tcase ENETC_PKT_TYPE_ETHER:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV4:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\t\t\tRTE_PTYPE_L3_IPV4;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV6:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\t\t\tRTE_PTYPE_L3_IPV6;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV4_TCP:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\tRTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_TCP;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV6_TCP:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\tRTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_TCP;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV4_UDP:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\tRTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_UDP;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV6_UDP:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\tRTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_UDP;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV4_SCTP:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\tRTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_SCTP;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV6_SCTP:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\tRTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_SCTP;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV4_ICMP:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\tRTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_ICMP;\n+\t\tbreak;\n+\tcase ENETC_PKT_TYPE_IPV6_ICMP:\n+\t\tm->packet_type = RTE_PTYPE_L2_ETHER |\n+\t\t\tRTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_ICMP;\n+\t\tbreak;\n+\t/* More switch cases can be added */\n+\tdefault:\n+\t\tm->packet_type = RTE_PTYPE_UNKNOWN;\n+\t}\n+}\n+\n+static int\n+enetc_clean_rx_ring(struct enetc_bdr *rx_ring, struct rte_mbuf **rx_pkts,\n+\t\t\t\t\t\t\t\tint work_limit)\n+{\n+\tint rx_frm_cnt = 0;\n+\tint cleaned_cnt, i;\n+\tstruct enetc_swbd *rx_swbd;\n+\n+\tcleaned_cnt = enetc_bd_unused(rx_ring);\n+\n+\t/* next descriptor to process */\n+\ti = rx_ring->next_to_clean;\n+\trx_swbd = &rx_ring->q_swbd[i];\n+\n+\twhile (likely(rx_frm_cnt < work_limit)) {\n+\t\tunion enetc_rx_bd *rxbd;\n+\t\tuint32_t bd_status;\n+\n+\t\tif (cleaned_cnt >= ENETC_RXBD_BUNDLE) {\n+\t\t\tint count = enetc_refill_rx_ring(rx_ring, cleaned_cnt);\n+\n+\t\t\tcleaned_cnt -= count;\n+\t\t}\n+\t\trxbd = ENETC_RXBD(*rx_ring, i);\n+\t\tbd_status = rte_le_to_cpu_32(rxbd->r.lstatus);\n+\t\tif (!bd_status)\n+\t\t\tbreak;\n+\n+\t\trx_swbd->buffer_addr->pkt_len = rxbd->r.buf_len;\n+\t\trx_swbd->buffer_addr->data_len = rxbd->r.buf_len;\n+\t\trx_swbd->buffer_addr->hash.rss = rxbd->r.rss_hash;\n+\t\trx_swbd->buffer_addr->ol_flags = 0;\n+\t\tenetc_dev_rx_parse(rx_swbd->buffer_addr, rxbd->r.parse_summary);\n+\n+\t\trx_pkts[rx_frm_cnt] = rx_swbd->buffer_addr;\n+\n+\t\tcleaned_cnt++;\n+\t\trx_swbd++;\n+\t\ti++;\n+\t\tif (unlikely(i == rx_ring->bd_count)) {\n+\t\t\ti = 0;\n+\t\t\trx_swbd = &rx_ring->q_swbd[i];\n+\t\t}\n+\t\trx_ring->next_to_clean = i;\n+\t\trx_frm_cnt++;\n+\t}\n+\n+\treturn rx_frm_cnt;\n+}\n+\n+uint16_t enetc_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts,\n+\t\t\tuint16_t nb_pkts)\n+{\n+\tstruct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;\n+\n+\treturn enetc_clean_rx_ring(rx_ring, rx_pkts, nb_pkts);\n+}\n+\n+static int enetc_alloc_txbdr(struct enetc_bdr *txr)\n+{\n+\tint size;\n+\n+\tsize = txr->bd_count * sizeof(struct enetc_swbd);\n+\ttxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);\n+\tif (txr->q_swbd == NULL)\n+\t\treturn -ENOMEM;\n+\n+\tsize = txr->bd_count * sizeof(struct enetc_tx_bd);\n+\ttxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);\n+\n+\tif (txr->bd_base == NULL) {\n+\t\trte_free(txr->q_swbd);\n+\t\ttxr->q_swbd = NULL;\n+\t\treturn -ENOMEM;\n+\t}\n+\ttxr->next_to_clean = 0;\n+\ttxr->next_to_use = 0;\n+\n+\treturn 0;\n+}\n+\n+static void enetc_free_bdr(struct enetc_bdr *rxr)\n+{\n+\trte_free(rxr->q_swbd);\n+\trte_free(rxr->bd_base);\n+\trxr->q_swbd = NULL;\n+\trxr->bd_base = NULL;\n+}\n+\n+static int enetc_alloc_tx_resources(struct enetc_eth_adapter *priv)\n+{\n+\tint i, err;\n+\n+\tfor (i = 0; i < priv->num_tx_rings; i++) {\n+\t\terr = enetc_alloc_txbdr(priv->tx_ring[i]);\n+\n+\t\tif (err)\n+\t\t\tgoto fail;\n+\t\tpriv->tx_ring[i]->index = i;\n+\t}\n+\n+\treturn 0;\n+\n+fail:\n+\twhile (i-- > 0)\n+\t\tenetc_free_bdr(priv->tx_ring[i]);\n+\n+\treturn err;\n+}\n+\n+static void enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)\n+{\n+\tint idx = tx_ring->index;\n+\tuint32_t tbmr;\n+\n+\tenetc_txbdr_wr(hw, idx, ENETC_TBBAR0,\n+\t\t\tlower_32_bits((uint64_t)tx_ring->bd_base));\n+\n+\tenetc_txbdr_wr(hw, idx, ENETC_TBBAR1,\n+\t\t\tupper_32_bits((uint64_t)tx_ring->bd_base));\n+\tenetc_txbdr_wr(hw, idx, ENETC_TBLENR,\n+\t\t\tENETC_RTBLENR_LEN(tx_ring->bd_count));\n+\n+\ttbmr = ENETC_TBMR_EN;\n+\t/* enable ring */\n+\tenetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);\n+\n+\tenetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);\n+\tenetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);\n+\ttx_ring->tcir = hw->reg + ENETC_BDR(TX, idx, ENETC_TBCIR);\n+\ttx_ring->tcisr = hw->reg + ENETC_BDR(TX, idx, ENETC_TBCISR);\n+}\n+\n+static void enetc_setup_tx_bdrs(struct rte_eth_dev *dev)\n+{\n+\tint i;\n+\tstruct enetc_eth_adapter *priv =\n+\t\t\tENETC_DEV_PRIVATE(dev->data->dev_private);\n+\n+\tfor (i = 0; i < priv->num_tx_rings; i++) {\n+\t\tenetc_setup_txbdr(&priv->hw.hw, priv->tx_ring[i]);\n+\t\tdev->data->tx_queues[i] = priv->tx_ring[i];\n+\t}\n+}\n+\n+int enetc_tx_queue_setup(struct rte_eth_dev *dev,\n+\t\t\t\tuint16_t queue_idx,\n+\t\t\t\tuint16_t nb_desc,\n+\t\t\t\tunsigned int socket_id,\n+\t\t\t\tconst struct rte_eth_txconf *tx_conf)\n+{\n+\tstruct enetc_eth_adapter *adapter =\n+\t\t\tENETC_DEV_PRIVATE(dev->data->dev_private);\n+\tint err = 0;\n+\n+\terr = enetc_alloc_tx_resources(adapter);\n+\tif (err)\n+\t\tgoto err_alloc_tx;\n+\n+\tenetc_setup_tx_bdrs(dev);\n+\n+err_alloc_tx:\n+\treturn err;\n+}\n+\n+static int enetc_alloc_rxbdr(struct enetc_bdr *rxr)\n+{\n+\tint size;\n+\n+\tsize = rxr->bd_count * sizeof(struct enetc_swbd);\n+\trxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);\n+\tif (rxr->q_swbd == NULL)\n+\t\treturn -ENOMEM;\n+\n+\tsize = rxr->bd_count * sizeof(union enetc_rx_bd);\n+\trxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);\n+\n+\tif (rxr->bd_base == NULL) {\n+\t\trte_free(rxr->q_swbd);\n+\t\trxr->q_swbd = NULL;\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\trxr->next_to_clean = 0;\n+\trxr->next_to_use = 0;\n+\trxr->next_to_alloc = 0;\n+\n+\treturn 0;\n+}\n+\n+static int enetc_alloc_rx_resources(struct enetc_eth_adapter *priv)\n+{\n+\tint i, err;\n+\n+\tfor (i = 0; i < priv->num_rx_rings; i++) {\n+\t\terr = enetc_alloc_rxbdr(priv->rx_ring[i]);\n+\n+\t\tif (err)\n+\t\t\tgoto fail;\n+\n+\t\tpriv->rx_ring[i]->index = i;\n+\t}\n+\treturn 0;\n+fail:\n+\twhile (i-- > 0)\n+\t\tenetc_free_bdr(priv->rx_ring[i]);\n+\n+\treturn err;\n+}\n+\n+static void enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,\n+\t\t\t\t\t\tstruct rte_mempool *mb_pool)\n+{\n+\tint idx = rx_ring->index;\n+\tuint16_t buf_size;\n+\n+\tenetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,\n+\t\t\tlower_32_bits((uint64_t)rx_ring->bd_base));\n+\n+\tenetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,\n+\t\t\tupper_32_bits((uint64_t)rx_ring->bd_base));\n+\n+\tenetc_rxbdr_wr(hw, idx, ENETC_RBLENR,\n+\t\t\tENETC_RTBLENR_LEN(rx_ring->bd_count));\n+\n+\trx_ring->mb_pool = mb_pool;\n+\n+\t/* enable ring */\n+\tenetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN);\n+\tenetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);\n+\trx_ring->rcir = hw->reg + ENETC_BDR(RX, idx, ENETC_RBCIR);\n+\n+\tenetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));\n+\tbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -\n+\t\t\tRTE_PKTMBUF_HEADROOM);\n+\n+\tenetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);\n+}\n+\n+static void enetc_setup_bdrs(struct rte_eth_dev *dev,\n+\t\t\t\t\tstruct rte_mempool *mb_pool)\n+{\n+\tint i;\n+\tstruct enetc_eth_adapter *priv =\n+\t\t\tENETC_DEV_PRIVATE(dev->data->dev_private);\n+\n+\tfor (i = 0; i < priv->num_rx_rings; i++) {\n+\t\tenetc_setup_rxbdr(&priv->hw.hw, priv->rx_ring[i], mb_pool);\n+\t\tdev->data->rx_queues[i] = priv->rx_ring[i];\n+\t}\n+}\n+\n+\n+int enetc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,\n+\t\tuint16_t nb_rx_desc, unsigned int socket_id,\n+\t\tconst struct rte_eth_rxconf *rx_conf,\n+\t\tstruct rte_mempool *mb_pool)\n+{\n+\tstruct enetc_eth_adapter *adapter =\n+\t\t\tENETC_DEV_PRIVATE(dev->data->dev_private);\n+\tint err = 0;\n+\n+\terr = enetc_alloc_rx_resources(adapter);\n+\tif (err)\n+\t\tgoto err_alloc_rx;\n+\n+\tenetc_setup_bdrs(dev, mb_pool);\n+\n+err_alloc_rx:\n+\treturn err;\n+}\ndiff --git a/drivers/net/enetc/meson.build b/drivers/net/enetc/meson.build\nindex 506b174ed..733156bbf 100644\n--- a/drivers/net/enetc/meson.build\n+++ b/drivers/net/enetc/meson.build\n@@ -5,6 +5,7 @@ if host_machine.system() != 'linux'\n \tbuild = false\n endif\n \n-sources = files('enetc_ethdev.c')\n+sources = files('enetc_ethdev.c',\n+\t\t'enetc_rxtx.c')\n \n includes += include_directories('base')\n", "prefixes": [ "v2", "3/3" ] }