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GET /api/patches/44492/?format=api
{ "id": 44492, "url": "http://patches.dpdk.org/api/patches/44492/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1536572016-18134-23-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1536572016-18134-23-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1536572016-18134-23-git-send-email-arybchenko@solarflare.com", "date": "2018-09-10T09:33:21", "name": "[22/37] net/sfc/base: add information if TSO workaround is required", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "657cb1de801b15eb2eb0acbde7f07d7524262446", "submitter": { "id": 607, "url": "http://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1536572016-18134-23-git-send-email-arybchenko@solarflare.com/mbox/", "series": [ { "id": 1244, "url": "http://patches.dpdk.org/api/series/1244/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1244", "date": "2018-09-10T09:33:01", "name": "net/sfc: update base driver", "version": 1, "mbox": "http://patches.dpdk.org/series/1244/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/44492/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/44492/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7CFB77ED7;\n\tMon, 10 Sep 2018 11:34:35 +0200 (CEST)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[67.231.154.164]) by dpdk.org (Postfix) with ESMTP id BE9B24C94\n\tfor <dev@dpdk.org>; Mon, 10 Sep 2018 11:33:53 +0200 (CEST)", "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us1.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\tCBFCA780055 for <dev@dpdk.org>; Mon, 10 Sep 2018 09:33:52 +0000 (UTC)", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1395.4; Mon, 10 Sep 2018 02:33:48 -0700", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1395.4 via Frontend Transport; Mon, 10 Sep 2018 02:33:47 -0700", "from ukv-loginhost.uk.solarflarecom.com\n\t(ukv-loginhost.uk.solarflarecom.com [10.17.10.39])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw8A9XkuI023833; Mon, 10 Sep 2018 10:33:46 +0100", "from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1])\n\tby ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id\n\t53D771626D1; Mon, 10 Sep 2018 10:33:46 +0100 (BST)" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "CC": "Mark Spender <mspender@solarflare.com>", "Date": "Mon, 10 Sep 2018 10:33:21 +0100", "Message-ID": "<1536572016-18134-23-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1536572016-18134-1-git-send-email-arybchenko@solarflare.com>", "References": "<1536572016-18134-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-TM-AS-Product-Ver": "SMEX-12.5.0.1300-8.5.1010-24084.005", "X-TM-AS-Result": "No-2.838600-4.000000-10", "X-TMASE-MatchedRID": "vx0VEa8NezHANTc0UpB7DpFVDMlVCkWexLtUkmJKh3RFNyTs3OcE/+yG\n\tSbx/RoQs3bzvU6za9nBFcQlq8WbRMH1GcR5AeEs7QpxiLlDD9FVA8I/PJy4EUx2OuJ8WKX6VcHj\n\tgiTON9jJO9UxJ8vboSW8iEzpyogaofyoI97TEvxDYhNMNlv+0N5xfK35V7okVv8D7QPW2jo8kyE\n\tBGmhV5v+LzNWBegCW2wgn7iDBesS0nRE+fI6etknqxbHMX+iHCFdMIhyIJje+XXI0Xm2ReiXma0\n\tUG29QXHJ5rfB2U+heMhUSzjVS7bTaUuA1YkDfFF/G7cIlODZStk2vXJYrcArr1NuKS30BZnQIFI\n\tZLtsgG0DUH+nVLNyiCsqIP9TxvtJMb6p570ilnc=", "X-TM-AS-User-Approved-Sender": "No", "X-TM-AS-User-Blocked-Sender": "No", "X-TMASE-Result": "10--2.838600-4.000000", "X-TMASE-Version": "SMEX-12.5.0.1300-8.5.1010-24084.005", "X-MDID": "1536572033-71EOK6dEl5pQ", "Subject": "[dpdk-dev] [PATCH 22/37] net/sfc/base: add information if TSO\n\tworkaround is required", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Mark Spender <mspender@solarflare.com>\n\nIn SF bug 61297 it's been confirmed that the hardware does not always\ncalculate the TCP checksum correctly with TSO sends.\n\nThe value of the Total Length field (IPv4) or Payload Length field\n(IPv6) is the critical factor. We're sufficiently confident that if\nthese fields are zero then the checksum will be calculated correctly.\n\nThe information may be used by the drivers to check if the workaround is\nrequired when FATSOv2 is implemented.\n\nSigned-off-by: Mark Spender <mspender@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/efx.h | 1 +\n drivers/net/sfc/base/hunt_nic.c | 3 +++\n drivers/net/sfc/base/medford2_nic.c | 3 +++\n drivers/net/sfc/base/medford_nic.c | 3 +++\n 4 files changed, 10 insertions(+)", "diff": "diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h\nindex 3c3227739..2356a9294 100644\n--- a/drivers/net/sfc/base/efx.h\n+++ b/drivers/net/sfc/base/efx.h\n@@ -1292,6 +1292,7 @@ typedef struct efx_nic_cfg_s {\n \tboolean_t\t\tenc_bug35388_workaround;\n \tboolean_t\t\tenc_bug41750_workaround;\n \tboolean_t\t\tenc_bug61265_workaround;\n+\tboolean_t\t\tenc_bug61297_workaround;\n \tboolean_t\t\tenc_rx_batching_enabled;\n \t/* Maximum number of descriptors completed in an rx event. */\n \tuint32_t\t\tenc_rx_batch_max;\ndiff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c\nindex 1bec3c485..70c042f3f 100644\n--- a/drivers/net/sfc/base/hunt_nic.c\n+++ b/drivers/net/sfc/base/hunt_nic.c\n@@ -190,6 +190,9 @@ hunt_board_cfg(\n \n \tencp->enc_bug61265_workaround = B_FALSE; /* Medford only */\n \n+\t/* Checksums for TSO sends can be incorrect on Huntington. */\n+\tencp->enc_bug61297_workaround = B_TRUE;\n+\n \t/* Alignment for receive packet DMA buffers */\n \tencp->enc_rx_buf_align_start = 1;\n \tencp->enc_rx_buf_align_end = 64; /* RX DMA end padding */\ndiff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c\nindex b36e54bab..3efc35886 100644\n--- a/drivers/net/sfc/base/medford2_nic.c\n+++ b/drivers/net/sfc/base/medford2_nic.c\n@@ -96,6 +96,9 @@ medford2_board_cfg(\n \telse\n \t\tgoto fail1;\n \n+\t/* Checksums for TSO sends should always be correct on Medford2. */\n+\tencp->enc_bug61297_workaround = B_FALSE;\n+\n \t/* Get clock frequencies (in MHz). */\n \tif ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)\n \t\tgoto fail2;\ndiff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c\nindex 96f3a1204..4f1896343 100644\n--- a/drivers/net/sfc/base/medford_nic.c\n+++ b/drivers/net/sfc/base/medford_nic.c\n@@ -94,6 +94,9 @@ medford_board_cfg(\n \telse\n \t\tgoto fail1;\n \n+\t/* Checksums for TSO sends can be incorrect on Medford. */\n+\tencp->enc_bug61297_workaround = B_TRUE;\n+\n \t/* Get clock frequencies (in MHz). */\n \tif ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)\n \t\tgoto fail2;\n", "prefixes": [ "22/37" ] }