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Update a patch.

GET /api/patches/44488/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 44488,
    "url": "http://patches.dpdk.org/api/patches/44488/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1536572016-18134-18-git-send-email-arybchenko@solarflare.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1536572016-18134-18-git-send-email-arybchenko@solarflare.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1536572016-18134-18-git-send-email-arybchenko@solarflare.com",
    "date": "2018-09-10T09:33:16",
    "name": "[17/37] net/sfc/base: add API to retrieve sensor limits",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "95adb319e3bf4e9dd7792831bd13ca360215bb1f",
    "submitter": {
        "id": 607,
        "url": "http://patches.dpdk.org/api/people/607/?format=api",
        "name": "Andrew Rybchenko",
        "email": "arybchenko@solarflare.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1536572016-18134-18-git-send-email-arybchenko@solarflare.com/mbox/",
    "series": [
        {
            "id": 1244,
            "url": "http://patches.dpdk.org/api/series/1244/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1244",
            "date": "2018-09-10T09:33:01",
            "name": "net/sfc: update base driver",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/1244/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/44488/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/44488/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id AB5EB6CC3;\n\tMon, 10 Sep 2018 11:34:30 +0200 (CEST)",
            "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[67.231.154.164]) by dpdk.org (Postfix) with ESMTP id DB3044CA1\n\tfor <dev@dpdk.org>; Mon, 10 Sep 2018 11:33:52 +0200 (CEST)",
            "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us1.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\t15049780061 for <dev@dpdk.org>; Mon, 10 Sep 2018 09:33:52 +0000 (UTC)",
            "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1395.4; Mon, 10 Sep 2018 02:33:47 -0700",
            "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1395.4 via Frontend Transport; Mon, 10 Sep 2018 02:33:47 -0700",
            "from ukv-loginhost.uk.solarflarecom.com\n\t(ukv-loginhost.uk.solarflarecom.com [10.17.10.39])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw8A9Xk7j023811; Mon, 10 Sep 2018 10:33:46 +0100",
            "from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1])\n\tby ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id\n\tEE3941626D2; Mon, 10 Sep 2018 10:33:45 +0100 (BST)"
        ],
        "X-Virus-Scanned": "Proofpoint Essentials engine",
        "From": "Andrew Rybchenko <arybchenko@solarflare.com>",
        "To": "<dev@dpdk.org>",
        "CC": "Martin Harvey <mharvey@solarflare.com>",
        "Date": "Mon, 10 Sep 2018 10:33:16 +0100",
        "Message-ID": "<1536572016-18134-18-git-send-email-arybchenko@solarflare.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1536572016-18134-1-git-send-email-arybchenko@solarflare.com>",
        "References": "<1536572016-18134-1-git-send-email-arybchenko@solarflare.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-TM-AS-Product-Ver": "SMEX-12.5.0.1300-8.5.1010-24084.005",
        "X-TM-AS-Result": "No-5.641500-4.000000-10",
        "X-TMASE-MatchedRID": "Nvm1MLOUqr7W5rPMDq6HbymjEOrcO6AyTJDl9FKHbrkTb/3sT17MXHki\n\tbXePECZYe34lX7pl/2ME3q8dNdfi6vOb9yKIiNyMSjc25srXNgjt/okBLaEo+KLVgbkZxM5PJct\n\tvrvYE+FmMYg2Zw8PzyiB2k0U0PNUdlBLWHauU8Z51e7Xbb6Im2hZO94uK1VSB82HMiBe0UlXX3K\n\t7cUnXcAdIZKUQ/D7gnZrBrMCNPw7vcK0Sw5NnG4p4CIKY/Hg3AGdQnQSTrKGPEQdG7H66TyH4gK\n\tq42LRYkOSrNNGL5LTBo+wVBtGiMDN7wkJAEeVdT+ac4+1df1dF+3BndfXUhXQ==",
        "X-TM-AS-User-Approved-Sender": "No",
        "X-TM-AS-User-Blocked-Sender": "No",
        "X-TMASE-Result": "10--5.641500-4.000000",
        "X-TMASE-Version": "SMEX-12.5.0.1300-8.5.1010-24084.005",
        "X-MDID": "1536572032-A36FFOdYe68X",
        "Subject": "[dpdk-dev] [PATCH 17/37] net/sfc/base: add API to retrieve sensor\n\tlimits",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Martin Harvey <mharvey@solarflare.com>\n\nSigned-off-by: Martin Harvey <mharvey@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/efx.h      |  12 +++\n drivers/net/sfc/base/efx_impl.h |   2 +\n drivers/net/sfc/base/efx_mon.c  |  17 +++-\n drivers/net/sfc/base/mcdi_mon.c | 171 ++++++++++++++++++++++++++++++++\n drivers/net/sfc/base/mcdi_mon.h |   5 +\n 5 files changed, 206 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h\nindex dae90bd6e..099f9df67 100644\n--- a/drivers/net/sfc/base/efx.h\n+++ b/drivers/net/sfc/base/efx.h\n@@ -774,6 +774,13 @@ typedef struct efx_mon_stat_value_s {\n \tefx_mon_stat_unit_t\temsv_unit;\n } efx_mon_stat_value_t;\n \n+typedef struct efx_mon_limit_value_s {\n+\tuint16_t\t\t\temlv_warning_min;\n+\tuint16_t\t\t\temlv_warning_max;\n+\tuint16_t\t\t\temlv_fatal_min;\n+\tuint16_t\t\t\temlv_fatal_max;\n+} efx_mon_stat_limits_t;\n+\n typedef enum efx_mon_stat_portmask_e {\n \tEFX_MON_STAT_PORTMAP_NONE = 0,\n \tEFX_MON_STAT_PORTMAP_PORT0 = 1,\n@@ -819,6 +826,11 @@ efx_mon_stats_update(\n \t__in\t\t\t\tefsys_mem_t *esmp,\n \t__inout_ecount(EFX_MON_NSTATS)\tefx_mon_stat_value_t *values);\n \n+extern\t__checkReturn\t\t\tefx_rc_t\n+efx_mon_limits_update(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__inout_ecount(EFX_MON_NSTATS)\tefx_mon_stat_limits_t *values);\n+\n #endif\t/* EFSYS_OPT_MON_STATS */\n \n extern\t\tvoid\ndiff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h\nindex 637e31e0c..0764df5de 100644\n--- a/drivers/net/sfc/base/efx_impl.h\n+++ b/drivers/net/sfc/base/efx_impl.h\n@@ -317,6 +317,8 @@ typedef struct efx_mon_ops_s {\n #if EFSYS_OPT_MON_STATS\n \tefx_rc_t\t(*emo_stats_update)(efx_nic_t *, efsys_mem_t *,\n \t\t\t\t\t    efx_mon_stat_value_t *);\n+\tefx_rc_t\t(*emo_limits_update)(efx_nic_t *,\n+\t\t\t\t\t     efx_mon_stat_limits_t *);\n #endif\t/* EFSYS_OPT_MON_STATS */\n } efx_mon_ops_t;\n \ndiff --git a/drivers/net/sfc/base/efx_mon.c b/drivers/net/sfc/base/efx_mon.c\nindex 91fa16ca0..f28775d04 100644\n--- a/drivers/net/sfc/base/efx_mon.c\n+++ b/drivers/net/sfc/base/efx_mon.c\n@@ -38,7 +38,8 @@ efx_mon_name(\n #if EFSYS_OPT_MON_MCDI\n static const efx_mon_ops_t\t__efx_mon_mcdi_ops = {\n #if EFSYS_OPT_MON_STATS\n-\tmcdi_mon_stats_update\t\t/* emo_stats_update */\n+\tmcdi_mon_stats_update,\t\t/* emo_stats_update */\n+\tmcdi_mon_limits_update,\t\t/* emo_limits_update */\n #endif\t/* EFSYS_OPT_MON_STATS */\n };\n #endif\n@@ -815,6 +816,20 @@ efx_mon_stats_update(\n \treturn (emop->emo_stats_update(enp, esmp, values));\n }\n \n+\t__checkReturn\t\t\tefx_rc_t\n+efx_mon_limits_update(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__inout_ecount(EFX_MON_NSTATS)\tefx_mon_stat_limits_t *values)\n+{\n+\tefx_mon_t *emp = &(enp->en_mon);\n+\tconst efx_mon_ops_t *emop = emp->em_emop;\n+\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MON);\n+\n+\treturn (emop->emo_limits_update(enp, values));\n+}\n+\n #endif\t/* EFSYS_OPT_MON_STATS */\n \n \t\tvoid\ndiff --git a/drivers/net/sfc/base/mcdi_mon.c b/drivers/net/sfc/base/mcdi_mon.c\nindex 68bbc575d..0e860168a 100644\n--- a/drivers/net/sfc/base/mcdi_mon.c\n+++ b/drivers/net/sfc/base/mcdi_mon.c\n@@ -334,6 +334,87 @@ efx_mcdi_sensor_info(\n \treturn (rc);\n }\n \n+static\t__checkReturn\t\tefx_rc_t\n+efx_mcdi_sensor_info_page(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tuint32_t page,\n+\t__out\t\t\tuint32_t *mask_part,\n+\t__out_ecount((sizeof (*mask_part) * 8) - 1)\n+\t\t\t\tefx_mon_stat_limits_t *limits)\n+{\n+\tefx_mcdi_req_t req;\n+\tuint8_t payload[MAX(MC_CMD_SENSOR_INFO_EXT_IN_LEN,\n+\t\tMC_CMD_SENSOR_INFO_OUT_LENMAX)];\n+\tefx_rc_t rc;\n+\tuint32_t mask_copy;\n+\tefx_dword_t *maskp;\n+\tefx_qword_t *limit_info;\n+\n+\tEFSYS_ASSERT(mask_part != NULL);\n+\tEFSYS_ASSERT(limits != NULL);\n+\n+\tmemset(limits, 0,\n+\t    ((sizeof (*mask_part) * 8) - 1) * sizeof (efx_mon_stat_limits_t));\n+\n+\t(void) memset(payload, 0, sizeof (payload));\n+\treq.emr_cmd = MC_CMD_SENSOR_INFO;\n+\treq.emr_in_buf = payload;\n+\treq.emr_in_length = MC_CMD_SENSOR_INFO_EXT_IN_LEN;\n+\treq.emr_out_buf = payload;\n+\treq.emr_out_length = MC_CMD_SENSOR_INFO_OUT_LENMAX;\n+\n+\tMCDI_IN_SET_DWORD(req, SENSOR_INFO_EXT_IN_PAGE, page);\n+\n+\tefx_mcdi_execute(enp, &req);\n+\n+\trc = req.emr_rc;\n+\n+\tif (rc != 0)\n+\t\tgoto fail1;\n+\n+\tEFSYS_ASSERT(sizeof (*limit_info) ==\n+\t    MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_LEN);\n+\tmaskp = MCDI_OUT2(req, efx_dword_t, SENSOR_INFO_OUT_MASK);\n+\tlimit_info = (efx_qword_t *)(maskp + 1);\n+\n+\t*mask_part = maskp->ed_u32[0];\n+\tmask_copy = *mask_part;\n+\n+\t/* Copy an entry for all but the highest bit set. */\n+\twhile (mask_copy) {\n+\n+\t\tif (mask_copy == (1U << MC_CMD_SENSOR_PAGE0_NEXT)) {\n+\t\t\t/* Only next page bit set. */\n+\t\t\tmask_copy = 0;\n+\t\t} else {\n+\t\t\t/* Clear lowest bit */\n+\t\t\tmask_copy = mask_copy & ~(mask_copy ^ (mask_copy - 1));\n+\t\t\t/* And copy out limit entry into buffer */\n+\t\t\tlimits->emlv_warning_min = EFX_QWORD_FIELD(*limit_info,\n+\t\t\t    MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN1);\n+\n+\t\t\tlimits->emlv_warning_max = EFX_QWORD_FIELD(*limit_info,\n+\t\t\t    MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX1);\n+\n+\t\t\tlimits->emlv_fatal_min = EFX_QWORD_FIELD(*limit_info,\n+\t\t\t    MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN2);\n+\n+\t\t\tlimits->emlv_fatal_max = EFX_QWORD_FIELD(*limit_info,\n+\t\t\t    MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MAX2);\n+\n+\t\t\tlimits++;\n+\t\t\tlimit_info++;\n+\t\t}\n+\t}\n+\n+\treturn (rc);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n \t__checkReturn\t\t\tefx_rc_t\n mcdi_mon_stats_update(\n \t__in\t\t\t\tefx_nic_t *enp,\n@@ -356,6 +437,96 @@ mcdi_mon_stats_update(\n \n \treturn (0);\n \n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+static\t\tvoid\n+lowest_set_bit(\n+\t__in\tuint32_t input_mask,\n+\t__out\tuint32_t *lowest_bit_mask,\n+\t__out\tuint32_t *lowest_bit_num\n+)\n+{\n+\tuint32_t x;\n+\tuint32_t set_bit, bit_index;\n+\n+\tx = (input_mask ^ (input_mask - 1));\n+\tset_bit = (x + 1) >> 1;\n+\tif (!set_bit)\n+\t\tset_bit = (1U << 31U);\n+\n+\tbit_index = 0;\n+\tif (set_bit & 0xFFFF0000)\n+\t\tbit_index += 16;\n+\tif (set_bit & 0xFF00FF00)\n+\t\tbit_index += 8;\n+\tif (set_bit & 0xF0F0F0F0)\n+\t\tbit_index += 4;\n+\tif (set_bit & 0xCCCCCCCC)\n+\t\tbit_index += 2;\n+\tif (set_bit & 0xAAAAAAAA)\n+\t\tbit_index += 1;\n+\n+\t*lowest_bit_mask = set_bit;\n+\t*lowest_bit_num = bit_index;\n+}\n+\n+\t__checkReturn\t\t\tefx_rc_t\n+mcdi_mon_limits_update(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__inout_ecount(EFX_MON_NSTATS)\tefx_mon_stat_limits_t *values)\n+{\n+\tefx_rc_t rc;\n+\tuint32_t page;\n+\tuint32_t page_mask;\n+\tuint32_t limit_index;\n+\tefx_mon_stat_limits_t limits[sizeof (page_mask) * 8];\n+\tefx_mon_stat_t stat;\n+\n+\tpage = 0;\n+\tpage--;\n+\tdo {\n+\t\tpage++;\n+\n+\t\trc = efx_mcdi_sensor_info_page(enp, page, &page_mask, limits);\n+\t\tif (rc != 0)\n+\t\t\tgoto fail1;\n+\n+\t\tlimit_index = 0;\n+\t\twhile (page_mask) {\n+\t\t\tuint32_t set_bit;\n+\t\t\tuint32_t page_index;\n+\t\t\tuint32_t mcdi_index;\n+\n+\t\t\tif (page_mask == (1U << MC_CMD_SENSOR_PAGE0_NEXT))\n+\t\t\t\tbreak;\n+\n+\t\t\tlowest_set_bit(page_mask, &set_bit, &page_index);\n+\t\t\tpage_mask = page_mask & ~set_bit;\n+\n+\t\t\tmcdi_index =\n+\t\t\t    page_index + (sizeof (page_mask) * 8 * page);\n+\n+\t\t\t/*\n+\t\t\t * This can fail if MCDI reports newer stats than the\n+\t\t\t * drivers understand, or the bit is the next page bit.\n+\t\t\t *\n+\t\t\t * Driver needs to be tolerant of this.\n+\t\t\t */\n+\t\t\tif (!efx_mon_mcdi_to_efx_stat(mcdi_index, &stat))\n+\t\t\t\tcontinue;\n+\n+\t\t\tvalues[stat] = limits[limit_index];\n+\t\t\tlimit_index++;\n+\t\t}\n+\n+\t} while (page_mask & (1U << MC_CMD_SENSOR_PAGE0_NEXT));\n+\n+\treturn (rc);\n+\n fail1:\n \tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n \ndiff --git a/drivers/net/sfc/base/mcdi_mon.h b/drivers/net/sfc/base/mcdi_mon.h\nindex 5aa6a6a27..5eba09018 100644\n--- a/drivers/net/sfc/base/mcdi_mon.h\n+++ b/drivers/net/sfc/base/mcdi_mon.h\n@@ -39,6 +39,11 @@ mcdi_mon_stats_update(\n \t__in\t\t\t\tefsys_mem_t *esmp,\n \t__inout_ecount(EFX_MON_NSTATS)\tefx_mon_stat_value_t *values);\n \n+extern\t__checkReturn\t\t\tefx_rc_t\n+mcdi_mon_limits_update(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__inout_ecount(EFX_MON_NSTATS)\tefx_mon_stat_limits_t *values);\n+\n #endif\t/* EFSYS_OPT_MON_STATS */\n \n #endif /* EFSYS_OPT_MON_MCDI */\n",
    "prefixes": [
        "17/37"
    ]
}