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GET /api/patches/44217/?format=api
{ "id": 44217, "url": "http://patches.dpdk.org/api/patches/44217/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1536045016-32008-9-git-send-email-tdu@semihalf.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1536045016-32008-9-git-send-email-tdu@semihalf.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1536045016-32008-9-git-send-email-tdu@semihalf.com", "date": "2018-09-04T07:10:16", "name": "[8/8] net/mvpp2: update MTU and MRU related calculations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b8b160e8ef091dc47565e909a425df344ccd1e1f", "submitter": { "id": 846, "url": "http://patches.dpdk.org/api/people/846/?format=api", "name": "Tomasz Duszynski", "email": "tdu@semihalf.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1536045016-32008-9-git-send-email-tdu@semihalf.com/mbox/", "series": [ { "id": 1165, "url": "http://patches.dpdk.org/api/series/1165/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1165", "date": "2018-09-04T07:10:08", "name": "net/mvpp2: add new features", "version": 1, "mbox": "http://patches.dpdk.org/series/1165/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/44217/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/44217/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D77EF58FA;\n\tTue, 4 Sep 2018 09:10:52 +0200 (CEST)", "from mail-pl1-f196.google.com (mail-pl1-f196.google.com\n\t[209.85.214.196]) by dpdk.org (Postfix) with ESMTP id ED92B58FA\n\tfor <dev@dpdk.org>; Tue, 4 Sep 2018 09:10:50 +0200 (CEST)", "by mail-pl1-f196.google.com with SMTP id t19-v6so1173185ply.13\n\tfor <dev@dpdk.org>; Tue, 04 Sep 2018 00:10:50 -0700 (PDT)", "from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl.\n\t[31.172.191.173]) by smtp.gmail.com with ESMTPSA id\n\tl79-v6sm31229451pfb.111.2018.09.04.00.10.47\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 04 Sep 2018 00:10:49 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=semihalf-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=mCc0MspjeAoopubxZmXTX5O+cBaEOu3Z86WGw9tSwsU=;\n\tb=skrCw6LmG8LQPwxDUMmnzfL3lspY/AVRDEX+fLqH7f+2XvqzUfVAjBNLnbqs8d1Wjl\n\t/P06x4gSgOvyP7h48jwT11nq1vcjBTzF+fe7T6gFj5yEZZwgaDEHmwlmH4yJJ8PkRm3d\n\tL9Wn86CiJLMeQsSi4qvta7bJTjzQb3ygWXOY6XP74UWXFqewXgf2m0K9w4p4/fuLRrTt\n\t7wCRxtJYTUgWJ7D7Yn3jPxGFx6ZdD6Ib+tJ0dw5DWYvCHNATJWbopW6SumOGf0zYeubZ\n\tMgasPXI8cPDb6QohBTN/017sLknpFRGdFo68TtbvZN9Zn+1d5r5c+YW3I8sWILLfV+uZ\n\t6+qw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=mCc0MspjeAoopubxZmXTX5O+cBaEOu3Z86WGw9tSwsU=;\n\tb=Dy7ZsXQDI5vtlc+HV4GJzKaEcMPSBkj2vghBbwNe7asxu5KUI7NQdYjjDQuqOwRrWE\n\thoGRDAQNsMALE/xz2Q555mKtK0rh4yWQ65lxHp8LzR16nNahcVdndFM+Ctq89wmAcYIa\n\tUMZafeZnHPn+QezCpCsdJzH2y4TOJuxHJQKaj+LnO8BncRuX/t3uX0MxZ33jv2zZgva8\n\tqfsIqSOlh+BRBAVit2i/Lx+tsD7uVJJA5VXmyMQ2ECJEHg+Nl8+6AVZS3pk5TTOfP5uX\n\tt3AZClcjmNFriPvi378gbj5vA6h1AUOXaapeM8zzwbISSoxDTMFQB9zMNSlM2t4K+zc/\n\thj9g==", "X-Gm-Message-State": "APzg51DESPf6hNJqyZjanoMCqL4ev+xmV4P8pREaa+0eryNAcFhrFD7E\n\to7aj0reH68ZSbbRAtn7axmIrN/bsF204gA==", "X-Google-Smtp-Source": "ANB0VdbE42Tmj8lRF68bbnrvvtd1I+0NBoG3IJMYjIgJY0tI0mHe3hcyfIQK5JCg4IiibgMISN0DiQ==", "X-Received": "by 2002:a17:902:5a3:: with SMTP id\n\tf32-v6mr32651638plf.286.1536045049930; \n\tTue, 04 Sep 2018 00:10:49 -0700 (PDT)", "From": "Tomasz Duszynski <tdu@semihalf.com>", "To": "dev@dpdk.org", "Cc": "nsamsono@marvell.com,\n\tmw@semihalf.com", "Date": "Tue, 4 Sep 2018 09:10:16 +0200", "Message-Id": "<1536045016-32008-9-git-send-email-tdu@semihalf.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1536045016-32008-1-git-send-email-tdu@semihalf.com>", "References": "<1536045016-32008-1-git-send-email-tdu@semihalf.com>", "Subject": "[dpdk-dev] [PATCH 8/8] net/mvpp2: update MTU and MRU related\n\tcalculations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Natalie Samsonov <nsamsono@marvell.com>\n\nThis commit updates MTU and MRU related calculations.\n\nSigned-off-by: Natalie Samsonov <nsamsono@marvell.com>\nReviewed-by: Yelena Krivosheev <yelena@marvell.com>\nReviewed-by: Dmitri Epshtein <dima@marvell.com>\n---\n drivers/net/mvpp2/mrvl_ethdev.c | 70 +++++++++++++++++++++++++++++++----------\n drivers/net/mvpp2/mrvl_ethdev.h | 7 +++++\n 2 files changed, 61 insertions(+), 16 deletions(-)", "diff": "diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c\nindex 5643e7d..035ee81 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.c\n+++ b/drivers/net/mvpp2/mrvl_ethdev.c\n@@ -325,7 +325,7 @@ mrvl_dev_configure(struct rte_eth_dev *dev)\n \n \tif (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)\n \t\tdev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -\n-\t\t\t\t ETHER_HDR_LEN - ETHER_CRC_LEN;\n+\t\t\t\t MRVL_PP2_ETH_HDRS_LEN;\n \n \tret = mrvl_configure_rxqs(priv, dev->data->port_id,\n \t\t\t\t dev->data->nb_rx_queues);\n@@ -375,21 +375,55 @@ static int\n mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)\n {\n \tstruct mrvl_priv *priv = dev->data->dev_private;\n-\t/* extra MV_MH_SIZE bytes are required for Marvell tag */\n-\tuint16_t mru = mtu + MV_MH_SIZE + ETHER_HDR_LEN + ETHER_CRC_LEN;\n+\tuint16_t mru;\n+\tuint16_t mbuf_data_size = 0; /* SW buffer size */\n \tint ret;\n \n-\tif (mtu < ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX)\n+\tmru = MRVL_PP2_MTU_TO_MRU(mtu);\n+\t/*\n+\t * min_rx_buf_size is equal to mbuf data size\n+\t * if pmd didn't set it differently\n+\t */\n+\tmbuf_data_size = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;\n+\t/* Prevent PMD from:\n+\t * - setting mru greater than the mbuf size resulting in\n+\t * hw and sw buffer size mismatch\n+\t * - setting mtu that requires the support of scattered packets\n+\t * when this feature has not been enabled/supported so far\n+\t * (TODO check scattered_rx flag here once scattered RX is supported).\n+\t */\n+\tif (mru + MRVL_PKT_OFFS > mbuf_data_size) {\n+\t\tmru = mbuf_data_size - MRVL_PKT_OFFS;\n+\t\tmtu = MRVL_PP2_MRU_TO_MTU(mru);\n+\t\tMRVL_LOG(WARNING, \"MTU too big, max MTU possible limitted \"\n+\t\t\t\"by current mbuf size: %u. Set MTU to %u, MRU to %u\",\n+\t\t\tmbuf_data_size, mtu, mru);\n+\t}\n+\n+\tif (mtu < ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX) {\n+\t\tMRVL_LOG(ERR, \"Invalid MTU [%u] or MRU [%u]\", mtu, mru);\n \t\treturn -EINVAL;\n+\t}\n+\n+\tdev->data->mtu = mtu;\n+\tdev->data->dev_conf.rxmode.max_rx_pkt_len = mru - MV_MH_SIZE;\n \n \tif (!priv->ppio)\n \t\treturn 0;\n \n \tret = pp2_ppio_set_mru(priv->ppio, mru);\n-\tif (ret)\n+\tif (ret) {\n+\t\tMRVL_LOG(ERR, \"Failed to change MRU\");\n \t\treturn ret;\n+\t}\n+\n+\tret = pp2_ppio_set_mtu(priv->ppio, mtu);\n+\tif (ret) {\n+\t\tMRVL_LOG(ERR, \"Failed to change MTU\");\n+\t\treturn ret;\n+\t}\n \n-\treturn pp2_ppio_set_mtu(priv->ppio, mtu);\n+\treturn 0;\n }\n \n /**\n@@ -600,6 +634,9 @@ mrvl_dev_start(struct rte_eth_dev *dev)\n \t\t}\n \t\tpriv->vlan_flushed = 1;\n \t}\n+\tret = mrvl_mtu_set(dev, dev->data->mtu);\n+\tif (ret)\n+\t\tMRVL_LOG(ERR, \"Failed to set MTU to %d\", dev->data->mtu);\n \n \t/* For default QoS config, don't start classifier. */\n \tif (mrvl_qos_cfg &&\n@@ -1552,8 +1589,8 @@ mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n {\n \tstruct mrvl_priv *priv = dev->data->dev_private;\n \tstruct mrvl_rxq *rxq;\n-\tuint32_t min_size,\n-\t\t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;\n+\tuint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp);\n+\tuint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;\n \tint ret, tc, inq;\n \tuint64_t offloads;\n \n@@ -1568,15 +1605,16 @@ mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \t\treturn -EFAULT;\n \t}\n \n-\tmin_size = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM -\n-\t\t MRVL_PKT_EFFEC_OFFS;\n-\tif (min_size < max_rx_pkt_len) {\n-\t\tMRVL_LOG(ERR,\n-\t\t\t\"Mbuf size must be increased to %u bytes to hold up to %u bytes of data.\",\n-\t\t\tmax_rx_pkt_len + RTE_PKTMBUF_HEADROOM +\n-\t\t\tMRVL_PKT_EFFEC_OFFS,\n+\tframe_size = buf_size - RTE_PKTMBUF_HEADROOM - MRVL_PKT_EFFEC_OFFS;\n+\tif (frame_size < max_rx_pkt_len) {\n+\t\tMRVL_LOG(WARNING,\n+\t\t\t\"Mbuf size must be increased to %u bytes to hold up \"\n+\t\t\t\"to %u bytes of data.\",\n+\t\t\tbuf_size + max_rx_pkt_len - frame_size,\n \t\t\tmax_rx_pkt_len);\n-\t\treturn -EINVAL;\n+\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;\n+\t\tMRVL_LOG(INFO, \"Setting max rx pkt len to %u\",\n+\t\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len);\n \t}\n \n \tif (dev->data->rx_queues[idx]) {\ndiff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h\nindex 984f31e..f0ae983 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.h\n+++ b/drivers/net/mvpp2/mrvl_ethdev.h\n@@ -72,6 +72,13 @@\n /** Minimum number of sent buffers to release from shadow queue to BM */\n #define MRVL_PP2_BUF_RELEASE_BURST_SIZE\t64\n \n+#define MRVL_PP2_VLAN_TAG_LEN\t\t4\n+#define MRVL_PP2_ETH_HDRS_LEN\t\t(ETHER_HDR_LEN + ETHER_CRC_LEN + \\\n+\t\t\t\t\t(2 * MRVL_PP2_VLAN_TAG_LEN))\n+#define MRVL_PP2_HDRS_LEN\t\t(MV_MH_SIZE + MRVL_PP2_ETH_HDRS_LEN)\n+#define MRVL_PP2_MTU_TO_MRU(mtu)\t((mtu) + MRVL_PP2_HDRS_LEN)\n+#define MRVL_PP2_MRU_TO_MTU(mru)\t((mru) - MRVL_PP2_HDRS_LEN)\n+\n /** Maximum length of a match string */\n #define MRVL_MATCH_LEN 16\n \n", "prefixes": [ "8/8" ] }