Patch Detail
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Update a patch.
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Update a patch.
GET /api/patches/44187/?format=api
{ "id": 44187, "url": "http://patches.dpdk.org/api/patches/44187/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1536033560-21541-13-git-send-email-ajoseph@caviumnetworks.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1536033560-21541-13-git-send-email-ajoseph@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1536033560-21541-13-git-send-email-ajoseph@caviumnetworks.com", "date": "2018-09-04T03:58:59", "name": "[v2,12/33] crypto/octeontx: add mailbox routines", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7469b4ec2441e1b22c5fc369daae1e155a8e305d", "submitter": { "id": 891, "url": "http://patches.dpdk.org/api/people/891/?format=api", "name": "Anoob Joseph", "email": "ajoseph@caviumnetworks.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1536033560-21541-13-git-send-email-ajoseph@caviumnetworks.com/mbox/", "series": [ { "id": 1164, "url": "http://patches.dpdk.org/api/series/1164/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1164", "date": "2018-09-04T03:58:47", "name": "Adding Cavium's OcteonTX crypto PMD", "version": 2, "mbox": "http://patches.dpdk.org/series/1164/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/44187/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/44187/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 906F35F13;\n\tTue, 4 Sep 2018 06:03:24 +0200 (CEST)", "from NAM02-CY1-obe.outbound.protection.outlook.com\n\t(mail-cys01nam02on0060.outbound.protection.outlook.com\n\t[104.47.37.60]) by dpdk.org (Postfix) with ESMTP id A062D2F4F\n\tfor <dev@dpdk.org>; Tue, 4 Sep 2018 06:03:08 +0200 (CEST)", "from ajoseph83.caveonetworks.com.com (115.113.156.2) by\n\tBYAPR07MB4902.namprd07.prod.outlook.com (2603:10b6:a02:ef::25) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1101.15; Tue, 4 Sep 2018 04:02:35 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=F/fWmOtQ1tJiEIxLMobpeSv8egzBbWhRvMsFZoyO2iU=;\n\tb=PCaitebkOUsZGUA7qSHviJRel3KJJXLMil4U4EYpo50KE/kXUOpXuKxiQBPJEMVO85Gvzj8ukX3x5tkB8EJplr+IZaJhtTQ8NKBcIHmoaqSPtQFM0Zqt8RpAGve7fqrzHalwpNMGSR3cXhjDZgxke0vjs6m9w8Wu4vVehcjKwfk=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Anoob.Joseph@cavium.com; ", "From": "Anoob Joseph <ajoseph@caviumnetworks.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>,\n\tPablo de Lara <pablo.de.lara.guarch@intel.com>,\n\tThomas Monjalon <thomas@monjalon.net>", "Cc": "Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>,\n\tJerin Jacob <jerin.jacob@caviumnetworks.com>,\n\tNarayana Prasad <narayanaprasad.athreya@caviumnetworks.com>,\n\tdev@dpdk.org, Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>,\n\tAnoob Joseph <anoob.joseph@caviumnetworks.com>,\n\tNithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>,\n\tRagothaman Jayaraman <rjayaraman@caviumnetworks.com>,\n\tSrisivasubramanian S <ssrinivasan@caviumnetworks.com>,\n\tTejasree Kondoj <kondoj.tejasree@caviumnetworks.com>", "Date": "Tue, 4 Sep 2018 09:28:59 +0530", "Message-Id": "<1536033560-21541-13-git-send-email-ajoseph@caviumnetworks.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1536033560-21541-1-git-send-email-ajoseph@caviumnetworks.com>", "References": "<1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com>\n\t<1536033560-21541-1-git-send-email-ajoseph@caviumnetworks.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[115.113.156.2]", "X-ClientProxiedBy": "BMXPR01CA0023.INDPRD01.PROD.OUTLOOK.COM\n\t(2603:1096:b00:d::33) To BYAPR07MB4902.namprd07.prod.outlook.com\n\t(2603:10b6:a02:ef::25)", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "5951d053-210e-48bd-a84c-08d6121b416e", "X-Microsoft-Antispam": "BCL:0; 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"B/CTQBrSWlhNobVv2QR/VYJJFdCmtDXPTdsmO27xelTZ4l05Mu/UjYp4x8Zgy7yGAEn2qHxR7uRHzlq1frM/lHtTO2sVVJyO0UGkp3TvBqVZDwA6U7Fz8+24FRsbv378AmUlbNWn3HbH8RQ8Njp0dV3xxK6H9UO24dprcgOrvvoPMMZSAiAcLmqEkrMt8keByeHOUCF6ByIGDxtwOFFSYQHGmfcSuxwNZjJpKG+eLNRpZHgCBzBzfk1fOwKBE6AT37udKDciNGzj3c/JSws+ma8EuFi1Mg2gXN7mEWTCvH1+7S/hMU7SZlZ08gORiQWe5jPoo1g/moV4mVHQfG4aErzGw9NTpcbav6CTcXkCVnE=", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "04 Sep 2018 04:02:35.2410\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "5951d053-210e-48bd-a84c-08d6121b416e", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BYAPR07MB4902", "Subject": "[dpdk-dev] [PATCH v2 12/33] crypto/octeontx: add mailbox routines", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>\n\nAdding mailbox routines to interact with the pf driver\n\nSigned-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>\nSigned-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>\nSigned-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>\nSigned-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>\nSigned-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>\nSigned-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>\nSigned-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>\n---\n drivers/crypto/octeontx/Makefile | 1 +\n drivers/crypto/octeontx/meson.build | 1 +\n drivers/crypto/octeontx/otx_cryptodev_hw_access.c | 13 ++\n drivers/crypto/octeontx/otx_cryptodev_mbox.c | 180 ++++++++++++++++++++++\n drivers/crypto/octeontx/otx_cryptodev_mbox.h | 92 +++++++++++\n 5 files changed, 287 insertions(+)\n create mode 100644 drivers/crypto/octeontx/otx_cryptodev_mbox.c\n create mode 100644 drivers/crypto/octeontx/otx_cryptodev_mbox.h", "diff": "diff --git a/drivers/crypto/octeontx/Makefile b/drivers/crypto/octeontx/Makefile\nindex 064c9b0..949e983 100644\n--- a/drivers/crypto/octeontx/Makefile\n+++ b/drivers/crypto/octeontx/Makefile\n@@ -26,6 +26,7 @@ CFLAGS += -I$(RTE_SDK)/drivers/common/cpt\n # PMD code\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev_hw_access.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev_mbox.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev_ops.c\n \n # export include files\ndiff --git a/drivers/crypto/octeontx/meson.build b/drivers/crypto/octeontx/meson.build\nindex 60ffc97..54e775c 100644\n--- a/drivers/crypto/octeontx/meson.build\n+++ b/drivers/crypto/octeontx/meson.build\n@@ -10,6 +10,7 @@ name = 'octeontx_crypto'\n \n sources = files('otx_cryptodev.c',\n \t\t'otx_cryptodev_hw_access.c',\n+\t\t'otx_cryptodev_mbox.c',\n \t\t'otx_cryptodev_ops.c')\n \n includes += include_directories('../../common/cpt')\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c\nindex f8b6005..a6b5bc6 100644\n--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c\n+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c\n@@ -7,6 +7,7 @@\n #include <rte_common.h>\n \n #include \"otx_cryptodev_hw_access.h\"\n+#include \"otx_cryptodev_mbox.h\"\n \n #include \"cpt_pmd_logs.h\"\n #include \"cpt_hw_types.h\"\n@@ -25,8 +26,19 @@ otx_cpt_vf_init(struct cpt_vf *cptvf)\n \t/* Mark as VF driver */\n \tcptvf->flags |= CPT_FLAG_VF_DRIVER;\n \n+\t/* Check ready with PF */\n+\t/* Gets chip ID / device Id from PF if ready */\n+\tret = otx_cpt_check_pf_ready(cptvf);\n+\tif (ret) {\n+\t\tCPT_LOG_ERR(\"%s: PF not responding to READY msg\",\n+\t\t\t\tcptvf->dev_name);\n+\t\tret = -EBUSY;\n+\t\tgoto exit;\n+\t}\n+\n \tCPT_LOG_DP_DEBUG(\"%s: %s done\", cptvf->dev_name, __func__);\n \n+exit:\n \treturn ret;\n }\n \n@@ -181,6 +193,7 @@ otx_cpt_poll_misc(struct cpt_vf *cptvf)\n \tif (likely(intr & CPT_VF_INTR_MBOX_MASK)) {\n \t\tCPT_LOG_DP_DEBUG(\"%s: Mailbox interrupt 0x%lx on CPT VF %d\",\n \t\t\tcptvf->dev_name, (unsigned int long)intr, cptvf->vfid);\n+\t\totx_cpt_handle_mbox_intr(cptvf);\n \t\totx_cpt_clear_mbox_intr(cptvf);\n \t} else if (unlikely(intr & CPT_VF_INTR_IRDE_MASK)) {\n \t\totx_cpt_clear_irde_intr(cptvf);\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_mbox.c b/drivers/crypto/octeontx/otx_cryptodev_mbox.c\nnew file mode 100644\nindex 0000000..d85f0d1\n--- /dev/null\n+++ b/drivers/crypto/octeontx/otx_cryptodev_mbox.c\n@@ -0,0 +1,180 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+\n+#include <unistd.h>\n+\n+#include \"otx_cryptodev_hw_access.h\"\n+#include \"otx_cryptodev_mbox.h\"\n+\n+void\n+otx_cpt_handle_mbox_intr(struct cpt_vf *cptvf)\n+{\n+\tstruct cpt_mbox mbx = {0, 0};\n+\n+\t/*\n+\t * MBOX[0] contains msg\n+\t * MBOX[1] contains data\n+\t */\n+\tmbx.msg = CPT_READ_CSR(CPT_CSR_REG_BASE(cptvf),\n+\t\t\t\tCPTX_VFX_PF_MBOXX(0, 0, 0));\n+\tmbx.data = CPT_READ_CSR(CPT_CSR_REG_BASE(cptvf),\n+\t\t\t\tCPTX_VFX_PF_MBOXX(0, 0, 1));\n+\n+\tCPT_LOG_DP_DEBUG(\"%s: Mailbox msg 0x%lx from PF\",\n+\t\t cptvf->dev_name, (unsigned int long)mbx.msg);\n+\tswitch (mbx.msg) {\n+\tcase OTX_CPT_MSG_READY:\n+\t\t{\n+\t\t\totx_cpt_chipid_vfid_t cid;\n+\n+\t\t\tcid.u64 = mbx.data;\n+\t\t\tcptvf->pf_acked = true;\n+\t\t\tcptvf->vfid = cid.s.vfid;\n+\t\t\tcptvf->chip_id = cid.s.chip_id;\n+\t\t\tCPT_LOG_DP_DEBUG(\"%s: Received VFID %d chip_id %d\",\n+\t\t\t\t cptvf->dev_name,\n+\t\t\t\t cptvf->vfid, cid.s.chip_id);\n+\t\t}\n+\t\tbreak;\n+\tcase OTX_CPT_MSG_QBIND_GRP:\n+\t\tcptvf->pf_acked = true;\n+\t\tcptvf->vftype = mbx.data;\n+\t\tCPT_LOG_DP_DEBUG(\"%s: VF %d type %s group %d\",\n+\t\t\t cptvf->dev_name, cptvf->vfid,\n+\t\t\t ((mbx.data == SE_TYPE) ? \"SE\" : \"AE\"),\n+\t\t\t cptvf->vfgrp);\n+\t\tbreak;\n+\tcase OTX_CPT_MBOX_MSG_TYPE_ACK:\n+\t\tcptvf->pf_acked = true;\n+\t\tbreak;\n+\tcase OTX_CPT_MBOX_MSG_TYPE_NACK:\n+\t\tcptvf->pf_nacked = true;\n+\t\tbreak;\n+\tdefault:\n+\t\tCPT_LOG_DP_DEBUG(\"%s: Invalid msg from PF, msg 0x%lx\",\n+\t\t\t cptvf->dev_name, (unsigned int long)mbx.msg);\n+\t\tbreak;\n+\t}\n+}\n+\n+/* Send a mailbox message to PF\n+ * @vf: vf from which this message to be sent\n+ * @mbx: Message to be sent\n+ */\n+static void\n+otx_cpt_send_msg_to_pf(struct cpt_vf *cptvf, struct cpt_mbox *mbx)\n+{\n+\t/* Writing mbox(1) causes interrupt */\n+\tCPT_WRITE_CSR(CPT_CSR_REG_BASE(cptvf),\n+\t\t CPTX_VFX_PF_MBOXX(0, 0, 0), mbx->msg);\n+\tCPT_WRITE_CSR(CPT_CSR_REG_BASE(cptvf),\n+\t\t CPTX_VFX_PF_MBOXX(0, 0, 1), mbx->data);\n+}\n+\n+static int32_t\n+otx_cpt_send_msg_to_pf_timeout(struct cpt_vf *cptvf, struct cpt_mbox *mbx)\n+{\n+\tint timeout = OTX_CPT_MBOX_MSG_TIMEOUT;\n+\tint sleep_ms = 10;\n+\n+\tcptvf->pf_acked = false;\n+\tcptvf->pf_nacked = false;\n+\n+\totx_cpt_send_msg_to_pf(cptvf, mbx);\n+\n+\t/* Wait for previous message to be acked, timeout 2sec */\n+\twhile (!cptvf->pf_acked) {\n+\t\tif (cptvf->pf_nacked)\n+\t\t\treturn -EINVAL;\n+\t\tusleep(sleep_ms * 1000);\n+\t\totx_cpt_poll_misc(cptvf);\n+\t\tif (cptvf->pf_acked)\n+\t\t\tbreak;\n+\t\ttimeout -= sleep_ms;\n+\t\tif (!timeout) {\n+\t\t\tCPT_PMD_DRV_LOG(ERR,\n+\t\t\t\t \"%s: PF didn't ack mbox msg %lx(vfid %u)\",\n+\t\t\t\t cptvf->dev_name,\n+\t\t\t\t (unsigned int long)(mbx->msg & 0xFF),\n+\t\t\t\t cptvf->vfid);\n+\t\t\treturn -EBUSY;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+int\n+otx_cpt_check_pf_ready(struct cpt_vf *cptvf)\n+{\n+\tstruct cpt_mbox mbx = {0, 0};\n+\n+\tmbx.msg = OTX_CPT_MSG_READY;\n+\tif (otx_cpt_send_msg_to_pf_timeout(cptvf, &mbx)) {\n+\t\tCPT_LOG_ERR(\"%s: PF didn't respond to READY msg\",\n+\t\t\t cptvf->dev_name);\n+\t\treturn 1;\n+\t}\n+\treturn 0;\n+}\n+\n+int\n+otx_cpt_send_vq_size_msg(struct cpt_vf *cptvf)\n+{\n+\tstruct cpt_mbox mbx = {0, 0};\n+\n+\tmbx.msg = OTX_CPT_MSG_QLEN;\n+\n+\tmbx.data = cptvf->qsize;\n+\tif (otx_cpt_send_msg_to_pf_timeout(cptvf, &mbx)) {\n+\t\tCPT_LOG_ERR(\"%s: PF didn't respond to vq_size msg\",\n+\t\t\t cptvf->dev_name);\n+\t\treturn 1;\n+\t}\n+\treturn 0;\n+}\n+\n+int\n+otx_cpt_send_vf_grp_msg(struct cpt_vf *cptvf, uint32_t group)\n+{\n+\tstruct cpt_mbox mbx = {0, 0};\n+\n+\tmbx.msg = OTX_CPT_MSG_QBIND_GRP;\n+\n+\t/* Convey group of the VF */\n+\tmbx.data = group;\n+\tif (otx_cpt_send_msg_to_pf_timeout(cptvf, &mbx)) {\n+\t\tCPT_LOG_ERR(\"%s: PF didn't respond to vf_type msg\",\n+\t\t\t cptvf->dev_name);\n+\t\treturn 1;\n+\t}\n+\treturn 0;\n+}\n+\n+int\n+otx_cpt_send_vf_up(struct cpt_vf *cptvf)\n+{\n+\tstruct cpt_mbox mbx = {0, 0};\n+\n+\tmbx.msg = OTX_CPT_MSG_VF_UP;\n+\tif (otx_cpt_send_msg_to_pf_timeout(cptvf, &mbx)) {\n+\t\tCPT_LOG_ERR(\"%s: PF didn't respond to UP msg\",\n+\t\t\t cptvf->dev_name);\n+\t\treturn 1;\n+\t}\n+\treturn 0;\n+}\n+\n+int\n+otx_cpt_send_vf_down(struct cpt_vf *cptvf)\n+{\n+\tstruct cpt_mbox mbx = {0, 0};\n+\n+\tmbx.msg = OTX_CPT_MSG_VF_DOWN;\n+\tif (otx_cpt_send_msg_to_pf_timeout(cptvf, &mbx)) {\n+\t\tCPT_LOG_ERR(\"%s: PF didn't respond to DOWN msg\",\n+\t\t\t cptvf->dev_name);\n+\t\treturn 1;\n+\t}\n+\treturn 0;\n+}\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_mbox.h b/drivers/crypto/octeontx/otx_cryptodev_mbox.h\nnew file mode 100644\nindex 0000000..2c51c4f\n--- /dev/null\n+++ b/drivers/crypto/octeontx/otx_cryptodev_mbox.h\n@@ -0,0 +1,92 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+\n+#ifndef _OTX_CRYPTODEV_MBOX_H_\n+#define _OTX_CRYPTODEV_MBOX_H_\n+\n+#include <rte_byteorder.h>\n+#include <rte_common.h>\n+\n+#include \"cpt_common.h\"\n+#include \"cpt_pmd_logs.h\"\n+\n+#include \"otx_cryptodev_hw_access.h\"\n+\n+#define OTX_CPT_MBOX_MSG_TIMEOUT 2000 /* In Milli Seconds */\n+\n+#define OTX_CPT_MBOX_MSG_TYPE_REQ\t0\n+#define OTX_CPT_MBOX_MSG_TYPE_ACK\t1\n+#define OTX_CPT_MBOX_MSG_TYPE_NACK\t2\n+#define OTX_CPT_MBOX_MSG_TYPE_NOP\t3\n+\n+/* CPT mailbox structure */\n+struct cpt_mbox {\n+\tuint64_t msg;\n+\t\t/**< Message type MBOX[0] */\n+\tuint64_t data;\n+\t\t/**< Data MBOX[1] */\n+};\n+\n+typedef enum {\n+\tOTX_CPT_MSG_VF_UP = 1,\n+\tOTX_CPT_MSG_VF_DOWN,\n+\tOTX_CPT_MSG_READY,\n+\tOTX_CPT_MSG_QLEN,\n+\tOTX_CPT_MSG_QBIND_GRP,\n+\tOTX_CPT_MSG_VQ_PRIORITY,\n+\tOTX_CPT_MSG_PF_TYPE,\n+} otx_cpt_mbox_opcode_t;\n+\n+typedef union {\n+\tuint64_t u64;\n+\tstruct {\n+#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN\n+\t\tuint32_t chip_id;\n+\t\tuint8_t vfid;\n+\t\tuint8_t reserved[3];\n+#else\n+\t\tuint8_t reserved[3];\n+\t\tuint8_t vfid;\n+\t\tuint32_t chip_id;\n+#endif\n+\t} s;\n+} otx_cpt_chipid_vfid_t;\n+\n+/* Poll handler to handle mailbox messages from VFs */\n+void\n+otx_cpt_handle_mbox_intr(struct cpt_vf *cptvf);\n+\n+/*\n+ * Checks if VF is able to comminicate with PF\n+ * and also gets the CPT number this VF is associated to.\n+ */\n+int\n+otx_cpt_check_pf_ready(struct cpt_vf *cptvf);\n+\n+/*\n+ * Communicate VQs size to PF to program CPT(0)_PF_Q(0-15)_CTL of the VF.\n+ * Must be ACKed.\n+ */\n+int\n+otx_cpt_send_vq_size_msg(struct cpt_vf *cptvf);\n+\n+/*\n+ * Communicate VF group required to PF and get the VQ binded to that group\n+ */\n+int\n+otx_cpt_send_vf_grp_msg(struct cpt_vf *cptvf, uint32_t group);\n+\n+/*\n+ * Communicate to PF that VF is UP and running\n+ */\n+int\n+otx_cpt_send_vf_up(struct cpt_vf *cptvf);\n+\n+/*\n+ * Communicate to PF that VF is DOWN and running\n+ */\n+int\n+otx_cpt_send_vf_down(struct cpt_vf *cptvf);\n+\n+#endif /* _OTX_CRYPTODEV_MBOX_H_ */\n", "prefixes": [ "v2", "12/33" ] }