Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/44183/?format=api
{ "id": 44183, "url": "http://patches.dpdk.org/api/patches/44183/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1536033560-21541-7-git-send-email-ajoseph@caviumnetworks.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1536033560-21541-7-git-send-email-ajoseph@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1536033560-21541-7-git-send-email-ajoseph@caviumnetworks.com", "date": "2018-09-04T03:58:53", "name": "[v2,06/33] crypto/octeontx: add hardware init routine", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "3e6503123730ba4ad5732ff2303ee220468d9cea", "submitter": { "id": 891, "url": "http://patches.dpdk.org/api/people/891/?format=api", "name": "Anoob Joseph", "email": "ajoseph@caviumnetworks.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1536033560-21541-7-git-send-email-ajoseph@caviumnetworks.com/mbox/", "series": [ { "id": 1164, "url": "http://patches.dpdk.org/api/series/1164/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1164", "date": "2018-09-04T03:58:47", "name": "Adding Cavium's OcteonTX crypto PMD", "version": 2, "mbox": "http://patches.dpdk.org/series/1164/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/44183/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/44183/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 073635942;\n\tTue, 4 Sep 2018 06:03:19 +0200 (CEST)", "from NAM02-CY1-obe.outbound.protection.outlook.com\n\t(mail-cys01nam02on0060.outbound.protection.outlook.com\n\t[104.47.37.60]) by dpdk.org (Postfix) with ESMTP id 4CC442BF3\n\tfor <dev@dpdk.org>; Tue, 4 Sep 2018 06:03:07 +0200 (CEST)", "from ajoseph83.caveonetworks.com.com (115.113.156.2) by\n\tBYAPR07MB4902.namprd07.prod.outlook.com (2603:10b6:a02:ef::25) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1101.15; Tue, 4 Sep 2018 04:02:07 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=9z+sKPLJodDkrHx//9yAphJS73sa+cUED/nVtdGqVhc=;\n\tb=drSKH0g/PXM79nbqqTxKgGTTM7/nNX6F8Wbg43RtKWsA91F3r4mC6Tmj/nf7ju9en5pSaXiZEThdRta82NQPuJQjGFew+O9gn++eMJ64vd1jC9ott6CuFI+fNn5Q+wmIPF5XnfT4aL5sZlp49LtvUxwu9NSE+rl/RoTPGrbmYRg=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Anoob.Joseph@cavium.com; ", "From": "Anoob Joseph <ajoseph@caviumnetworks.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>,\n\tPablo de Lara <pablo.de.lara.guarch@intel.com>,\n\tThomas Monjalon <thomas@monjalon.net>", "Cc": "Anoob Joseph <anoob.joseph@caviumnetworks.com>,\n\tJerin Jacob <jerin.jacob@caviumnetworks.com>,\n\tNarayana Prasad <narayanaprasad.athreya@caviumnetworks.com>,\n\tdev@dpdk.org, Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>,\n\tMurthy NSSR <nidadavolu.murthy@caviumnetworks.com>,\n\tNithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>,\n\tRagothaman Jayaraman <rjayaraman@caviumnetworks.com>,\n\tSrisivasubramanian S <ssrinivasan@caviumnetworks.com>,\n\tTejasree Kondoj <kondoj.tejasree@caviumnetworks.com>", "Date": "Tue, 4 Sep 2018 09:28:53 +0530", "Message-Id": "<1536033560-21541-7-git-send-email-ajoseph@caviumnetworks.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1536033560-21541-1-git-send-email-ajoseph@caviumnetworks.com>", "References": "<1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com>\n\t<1536033560-21541-1-git-send-email-ajoseph@caviumnetworks.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[115.113.156.2]", "X-ClientProxiedBy": "BMXPR01CA0023.INDPRD01.PROD.OUTLOOK.COM\n\t(2603:1096:b00:d::33) To BYAPR07MB4902.namprd07.prod.outlook.com\n\t(2603:10b6:a02:ef::25)", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "64425456-80cc-4ec2-6626-08d6121b3135", "X-Microsoft-Antispam": "BCL:0; PCL:0;\n\tRULEID:(7020095)(4652040)(8989137)(4534165)(4627221)(201703031133081)(201702281549075)(8990107)(5600074)(711020)(2017052603328)(7153060)(7193020);\n\tSRVR:BYAPR07MB4902; ", "X-Microsoft-Exchange-Diagnostics": [ "1; BYAPR07MB4902;\n\t3:CgeH2w7kGlxBV3b6mjQg42cQDs7RL0fG10q4A1hWhhUJu09G41yhfQEshNLA/PXW/zPbCNDGxJZ9F5rUMjipy2a4+oozM2WNNbKqv2S2GsTLyS1ZzA84nLizMq6btpoMqUwfcCeKAiSXV8GbUdG5EbhE1dAb8KQVq4M7Zvu+UtfXpNS0zhKLOgtutn5aarn92cuiY32jOb8ECqGePhrRWZHmbAkzQFPMDFhVgbvr6hSgCosavz3xYSPPSolg5SAa;\n\t25:7W8fkKXizAfBUIbWRFWESqcBqX8QyswsZF7ULzehK0AEAhXkwWq7IuNb7LukS8yq/iqkzEK9UuxOr9dYvXMX3S5Id+MbNigRi71PVGo5EnLgvJEgelvO5m+Q5bD4LcAtHC962pf/g6ZzuI6DRO8VKYzF+/r9ASB5QTjMXDUEfJBh4BlsuAE9ipQkO2VWoF2f1p3j5bImrxy9FmabD+4ON5rBlvebv6uqB6TKRPn0tdXXiTrN7hXfH+hgUCS69F5nj39X6PMhitIxb1xevb8gsAFg7cKRrpg3i5IRJWyKhLVLyOC8MVjXD5EXhMBCYZMyhOPbOEUxvdu4kP3brra4RA==;\n\t31:M/gvXzI83GDEcJN1/co8C5r+a258Up6VfsWq1lD0p/C0RD28LxYm19JvB0SXlomHCOaQw3CfG+M3SvvqZeUINy1HtT1QlJrg/0a6fAM2tBdf2vl4tRhG2bwZSepqdjS7xU0z2I+r+XrGaRacDKbP7J+wAvx9QOUyiUG2lhaeXcgPXCv0FQxdNaDstqZAfOiHwj8KbI8wqT1z4WUoildQgrHUOGAbBWmndYAU79Kp85o=", "1; BYAPR07MB4902;\n\t20:dJNmkUaDOPz9UwZKuJLHgGr8V1E4E9Z6CVMw9hemPCllQDdxAlW+Imn9VRziywk30CaVxsmhFlLwXyEGErfE4fKlQDWYaUcf3AfbQY84YftV71hqaVY8WSi1B9XL3U3alrzjGaRzyzfPGEPR7kZpoNR9xobXCzV3rFeRZHLgeLk+pRPklajVU6V2yx4t3X18xup3gMS6yR930AwSHFsZg8uxHG1ViWnhIPgGGa5SsuzGpRLFAPWcU65A0FEgOz3yfx82KJgEb6m2+evE2w8kb9IrMborxqpL4RlGWBBNq4CLySAb0j5EVg4Qspv3oXxnKsOLcSuoQxpJSI7cf+gA6JSxBfqI8ID6tt8rqOIKk870616Z25bUbpJKdC+ig4NB7fp6mlaabXBH7Xzia3G4OMB/abWlVdvpeEa/mcitbBgbzCUvg+QJsiZMWujVqcdeuZ6VBY4s3CSc5RyRpw+uTzC+spbfhFHrxToauYdlJawI6hZaMIUn4UyIxF0929kuY9O80WXWDJ7XxETGxAav/OaX+PHcymTKGvAkOi5Q/ReG8KfOE+9lzr/VHwPBr7wppJ+fMVr5CW3+J1KDfnqNVVCwHl1X9MrUkhWIFe/y9kU=;\n\t4:Zx4Cnj/OfhJ/QTVa2dw6N7wyRlI5glx46JW0auM3DeMiU4UhVRVmDbDjCvrs/4qcEtD5NuLvUetSSA7DQY2woOiBuEoj5YAValymWZo/i7hKr8e3Iy0UO5H6BPm0NbgfZN0/PnxCjzEaLH+WpKKL5g7gObFoNsOEQxlKGneBhTpZihXLoNMxWjeo6SdPkKGc92qThxOw5d/c0N/lhR8nhLuXYj+vjAAq+GqsGYVir2f0j57ASf4bxjGVbzf1Xogdmw6r5JWwxXeYbF/p8PeBsA==", "=?us-ascii?Q?1; BYAPR07MB4902;\n\t23:9P9XG4zeObS/P/KdGK+dnUbpZzNlfmCJBPOeWkVDu?=\n\tFozglLiD68OuPOzEPVvsgUhm5pchPMiD7n8D7E/leiB4P5JKq47LP3zL0rBfo/W4YPDtIOdS65nr+56CsOnNSA11CcMgJuvhzypDPF5OLmrMwMQHp4FBI/cNUZF2JyZDKoNP3j+VTXb+rbhYFARV3mVfsYnvVPQV4x3W/s6REPKojmZLrSwMtSjdsOSm32dnhRRacsqvUNYjbHhBwK+DJ6IX06Ae3a9HAGAiR0Suykuc2FVniwIjstfIj0rRQtXLyQ8FY5kle0UzwnqQFt9sehnuOEte2y+qf2YS8+xTcSlvqS/220EUTacTcArNlZ9uwhCDzeLN58NH/82oQrfQyLucVP1sk/HoyVfxVSYM6rjN68v1/T6wbrQEyigohY+++c/ROliFZ4wo9opgV0kfX1WNAZUw+/bJWoDU5nE53zJSGaZf0J4kQgNDfrzLvEt49NG0kV0tGbjdn/aGQi4HaUSP25rxoAis0uk81zxazUJBEH0RMwDIMFGb+oTIBXVqqZpvrcNHMrc7ZbxBe9ar8YLDMgfNodE7EQxhAVwnx66P2T7lABCOKAHeS9q9Mu7xsLyv1E+qB5vAgiWakW8Z6C3GQeNhtPMHf0rre52da49iLNUGM0IOgVSSPim9Ql7uxZTUFTSRhRIAw+t6NcI3TS3Np9nmkX+42bEbDUbw5LB0xznkQkfV69Ty1Y4GDkVQclzVbBTs5QvqdvPr8RaUQRTqVLN+GxBc+TOhURyePsAU1vBlP8QBzTfoDtWGZpJmR+zw44FbV1qKNGbXYweY1OBwv3x5mnKneDKtauI8cTBnpM9GjHLLqM4lW4ssLYw36+fM31tuhCspm7CSWhf5H6djPLtJAWeXC28O5GMvTPlAqOasM/w8YTdXdgGw7nhCeFi2B0Q7etUul/FJ+Zlz2o/dzMz/InLufJLbI0sQ8WBk8/uxywONzqsxM8nF8oZtnUaR++2oy3vsZrcLaMljdICBIL/pfwrfvLBxNrohdmgY/VvYaH2fqFWNGt6hRP/Equg2vK6G79VnZJCMNKGdsxiAgHGrQyULtW/lgB0MqakcCQE2B/ZJNpgxUw1uEWP+nar4x/mWZ3avw98OFNhrPev0lz66a5SmCvMaCVS8q6oWpSdbmRKGn+VIDozIhV9X5QuASL3zK6OHFxxcEAsVWsFhRGBQVlAbRpzN75MvjMap28dyWkby8py3Pu3ZGhKVD8=", "1; BYAPR07MB4902;\n\t6:xRoLzERA/KT/brHFGQi+flhIQby/nBt2R57Ll0jRsu7wyzAvBou8QFGwzvYs+eb1EiyYEWs0NLuduFw21H/vhB1DJpYIiPgL3ufRx/ig/ICwHC29SkV0r62u4dP3ENlpON5cZ4CfaNm78hdbrqAVGXfF7mHN+sFh/xBwixmM7YQGm0SSsI4OOmgXZCO+fCeuVVyKme7NAUwF55Reh3/hN4DyQ+X0xxxoXaXi2rA173Nbmh6eBiiumhDqSY6FWC/B7gINUmE6CocukoY1KXx/iUebehivM/l1jUhqquCX07z1WMqPJwNZQ3tMO/IzSkhPdNtgD7kIvTHwI63PHuaoEeE6dQ4o3pjDg/yXsnjqIDz2H8afOthc18+MP8NKl3OzUc3Cwg0xy6k61/Fi3p278iWyY8EesXa7XJ3WYstYlyXYF0DCxLd/IdPf14+dEGCasx7TEJVwuuf4/mcC+MYlbA==;\n\t5:orGaXTaVvXiz58JkinDQqPT8H1gWQ2yEExLXe1yycY8frECsbfGQAKNBbI4R/hyxxAfnhdE2lOvbuR2P844symJSJqj23MK0NkeZYhZjzXlCWb0x349vmW/8L2Vs//nj3FpVotC4fk4Ea9vPMKKTnWOpmqmr9yIK5ECdceYfNgc=;\n\t7:+HkNjfb9KNRGAp1WIc6+urAp+2O1FNp0lvpCDtNcSCmsukJG6NIW/XrDB2BNypf+7ImP/1sEGbcnXNPmyT9vygxhtrgZGhmc0eDdWdhCOCIh0hiVUYFF2td4Zlqo0MwepLic7xh/83dccczyAlrYisIQeOmC8Ovfb8c8bfTr8RPLYKyElRcMMi6Zw0yKiIfmagKuzft7XTtT/DKxMjlxzMiPiZYvO0FpZ5TFozN7p2stxZSIoHJx8LvsalrpHT8Z" ], "X-MS-TrafficTypeDiagnostic": "BYAPR07MB4902:", "X-Microsoft-Antispam-PRVS": "<BYAPR07MB4902D49D4311FFFEC2E1FBC6F8030@BYAPR07MB4902.namprd07.prod.outlook.com>", "X-Exchange-Antispam-Report-Test": "UriScan:;", "X-MS-Exchange-SenderADCheck": "1", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(10201501046)(93006095)(3231311)(944501410)(52105095)(3002001)(149027)(150027)(6041310)(20161123562045)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123558120)(201708071742011)(7699016);\n\tSRVR:BYAPR07MB4902; BCL:0; PCL:0; RULEID:; SRVR:BYAPR07MB4902; ", "X-Forefront-PRVS": "0785459C39", "X-Forefront-Antispam-Report": "SFV:NSPM;\n\tSFS:(10009020)(366004)(396003)(136003)(346002)(376002)(39860400002)(199004)(189003)(26005)(51416003)(52116002)(76176011)(81166006)(305945005)(81156014)(7736002)(105586002)(316002)(6506007)(106356001)(6512007)(8936002)(446003)(54906003)(25786009)(6666003)(68736007)(50226002)(110136005)(53936002)(16586007)(42882007)(386003)(5660300001)(2906002)(72206003)(50466002)(6486002)(36756003)(6116002)(107886003)(2616005)(14444005)(186003)(3846002)(478600001)(66066001)(476003)(8676002)(47776003)(486006)(956004)(48376002)(11346002)(4326008)(97736004)(16526019);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:BYAPR07MB4902;\n\tH:ajoseph83.caveonetworks.com.com; FPR:; SPF:None; LANG:en;\n\tPTR:InfoNoRecords; A:1; MX:1; ", "Received-SPF": "None (protection.outlook.com: cavium.com does not designate\n\tpermitted sender hosts)", "X-Microsoft-Antispam-Message-Info": "7Ue5KCNAnSvFOd06uMlDi9mUvEgHdI5amFq2uo6q7sUHv5R1BpRAa2djaYmVzXXvYqa0DtqjiOqx+64eGCO70/uLCCrhFir+3m+LEU0HIroB+AWriP77mnMVK4LB0p+o4oEANOGRaXnuolhJq+ndUz5V2rTVY5vKsV7MQqz2dqnrgNqPb7Q/MhUKcpKyWmspMIzjGTdkgOnuvIjcG3WbArR1Pn334GRAUBnsRNLcJd8AladtY2ctQbX55dsRhlA6LiXEMKJQNvFzqp1rx52jGjAoH7c71swfnAhjVSDjRO1oQ8rVCT616Vd2CmgE0egTGEDU5C66Me5Tp8bYQYo9REeCKVnAX2R5TZPOOiRRUV8=", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "04 Sep 2018 04:02:07.8035\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "64425456-80cc-4ec2-6626-08d6121b3135", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BYAPR07MB4902", "Subject": "[dpdk-dev] [PATCH v2 06/33] crypto/octeontx: add hardware init\n\troutine", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Anoob Joseph <anoob.joseph@caviumnetworks.com>\n\nAdding hardware init routine for OcteonTX crypto device. A place holder\nis added for misc polling routine. That will be added in the further\npatches.\n\nSigned-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>\nSigned-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>\nSigned-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>\nSigned-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>\nSigned-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>\nSigned-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>\nSigned-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>\n---\n drivers/crypto/octeontx/Makefile | 1 +\n drivers/crypto/octeontx/meson.build | 1 +\n drivers/crypto/octeontx/otx_cryptodev_hw_access.c | 53 +++++++++++++\n drivers/crypto/octeontx/otx_cryptodev_hw_access.h | 92 +++++++++++++++++++++++\n drivers/crypto/octeontx/otx_cryptodev_ops.c | 89 +++++++++++++++++++++-\n 5 files changed, 235 insertions(+), 1 deletion(-)\n create mode 100644 drivers/crypto/octeontx/otx_cryptodev_hw_access.c", "diff": "diff --git a/drivers/crypto/octeontx/Makefile b/drivers/crypto/octeontx/Makefile\nindex 12fec75..4582540 100644\n--- a/drivers/crypto/octeontx/Makefile\n+++ b/drivers/crypto/octeontx/Makefile\n@@ -24,6 +24,7 @@ CFLAGS += -I$(RTE_SDK)/drivers/common/cpt\n \n # PMD code\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev_hw_access.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev_ops.c\n \n # export include files\ndiff --git a/drivers/crypto/octeontx/meson.build b/drivers/crypto/octeontx/meson.build\nindex 6564090..eca1cf1 100644\n--- a/drivers/crypto/octeontx/meson.build\n+++ b/drivers/crypto/octeontx/meson.build\n@@ -8,6 +8,7 @@ deps += ['bus_pci']\n name = 'octeontx_crypto'\n \n sources = files('otx_cryptodev.c',\n+\t\t'otx_cryptodev_hw_access.c',\n \t\t'otx_cryptodev_ops.c')\n \n cflags += '-DCPT_MODEL=CRYPTO_OCTEONTX'\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c\nnew file mode 100644\nindex 0000000..211b6ee\n--- /dev/null\n+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c\n@@ -0,0 +1,53 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+#include <string.h>\n+\n+#include <rte_common.h>\n+\n+#include \"otx_cryptodev_hw_access.h\"\n+\n+#include \"cpt_pmd_logs.h\"\n+\n+static int\n+otx_cpt_vf_init(struct cpt_vf *cptvf)\n+{\n+\tint ret = 0;\n+\n+\t/* Mark as VF driver */\n+\tcptvf->flags |= CPT_FLAG_VF_DRIVER;\n+\n+\tCPT_LOG_DP_DEBUG(\"%s: %s done\", cptvf->dev_name, __func__);\n+\n+\treturn ret;\n+}\n+\n+void\n+otx_cpt_poll_misc(struct cpt_vf *cptvf)\n+{\n+\tRTE_SET_USED(cptvf);\n+}\n+\n+int\n+otx_cpt_hw_init(struct cpt_vf *cptvf, void *pdev, void *reg_base, char *name)\n+{\n+\tmemset(cptvf, 0, sizeof(struct cpt_vf));\n+\n+\t/* Bar0 base address */\n+\tcptvf->reg_base = reg_base;\n+\tstrncpy(cptvf->dev_name, name, 32);\n+\n+\tcptvf->nr_queues = 1;\n+\tcptvf->max_queues = 1;\n+\tcptvf->pdev = pdev;\n+\n+\t/* To clear if there are any pending mbox msgs */\n+\totx_cpt_poll_misc(cptvf);\n+\n+\tif (otx_cpt_vf_init(cptvf)) {\n+\t\tCPT_LOG_ERR(\"Failed to initialize CPT VF device\");\n+\t\treturn -1;\n+\t}\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h\nindex 288ee41..40db69c 100644\n--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h\n+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h\n@@ -5,6 +5,90 @@\n #ifndef _OTX_CRYPTODEV_HW_ACCESS_H_\n #define _OTX_CRYPTODEV_HW_ACCESS_H_\n \n+#include <stdbool.h>\n+\n+#include <rte_memory.h>\n+\n+#include \"cpt_common.h\"\n+\n+/* Flags to indicate the features supported */\n+#define CPT_FLAG_VF_DRIVER\t\t(uint16_t)(1 << 3)\n+\n+#define CPT_INTR_POLL_INTERVAL_MS\t(50)\n+\n+/* Default command queue length */\n+#define DEFAULT_CMD_QCHUNKS\t2\n+\n+struct command_chunk {\n+\tuint8_t *head;\n+\t\t/**< 128-byte aligned real_vaddr */\n+\tphys_addr_t dma_addr;\n+\t\t/**< 128-byte aligned real_dma_addr */\n+};\n+\n+/**\n+ * Command queue structure\n+ */\n+struct command_queue {\n+\tuint32_t idx;\n+\t\t/**< Command queue host write idx */\n+\tuint32_t cchunk;\n+\tuint8_t *qhead;\n+\t\t/**< Command queue head; instructions are inserted here */\n+\tstruct command_chunk chead[DEFAULT_CMD_QCHUNKS];\n+\t\t/**< Command chunk list head */\n+};\n+\n+/**\n+ * CPT VF device structure\n+ */\n+struct cpt_vf {\n+\tstruct cpt_instance instance;\n+\n+\tuint8_t *reg_base;\n+\t\t/**< Register start address */\n+\tstruct command_queue cqueue;\n+\t\t/**< Command queue information */\n+\tstruct pending_queue pqueue;\n+\t\t/**< Pending queue information */\n+\tstruct cptvf_meta_info meta_info;\n+\t\t/**< Meta information per vf */\n+\n+\t/* Below fields are accessed only in control path */\n+\n+\tvoid *pdev;\n+\t\t/**< Env specific pdev representing the pci dev */\n+\tuint32_t qlen;\n+\t\t/**< Qsize * CPT_INST_SIZE + alignment size(CPT_INST_SIZE +\n+\t\t * next chunk pointer size (8)\n+\t\t */\n+\tuint32_t qsize;\n+\t\t/**< Calculated queue size */\n+\tuint32_t nr_queues;\n+\tuint32_t max_queues;\n+\n+\tuint32_t chip_id;\n+\t\t/**< CPT device ID */\n+\tuint16_t flags;\n+\t\t/**< Flags to hold device status bits */\n+\tuint8_t vfid;\n+\t\t/**< Device index (0...CPT_MAX_VQ_NUM)*/\n+\tuint8_t vftype;\n+\t\t/**< VF type of cpt_vf_type_t (SE_TYPE(2) or AE_TYPE(1) */\n+\tuint8_t vfgrp;\n+\t\t/**< VF group (0 - 8) */\n+\tuint8_t node;\n+\t\t/**< Operating node: Bits (46:44) in BAR0 address */\n+\n+\t/* VF-PF mailbox communication */\n+\n+\tbool pf_acked;\n+\tbool pf_nacked;\n+\n+\tchar dev_name[32];\n+\t\t/**< Device name */\n+} __rte_cache_aligned;\n+\n /*\n * CPT Registers map for 81xx\n */\n@@ -44,4 +128,12 @@\n \t\t\t\t\t ((a) & 0x1) + 0x100000ll * (b) + \\\n \t\t\t\t\t 8ll * ((c) & 0x1))\n \n+/* VF HAL functions */\n+\n+void\n+otx_cpt_poll_misc(struct cpt_vf *cptvf);\n+\n+int\n+otx_cpt_hw_init(struct cpt_vf *cptvf, void *pdev, void *reg_base, char *name);\n+\n #endif /* _OTX_CRYPTODEV_HW_ACCESS_H_ */\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.c b/drivers/crypto/octeontx/otx_cryptodev_ops.c\nindex 1b5f108..d25f9c1 100644\n--- a/drivers/crypto/octeontx/otx_cryptodev_ops.c\n+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.c\n@@ -2,14 +2,101 @@\n * Copyright(c) 2018 Cavium, Inc\n */\n \n+#include <rte_alarm.h>\n+#include <rte_bus_pci.h>\n #include <rte_cryptodev.h>\n+#include <rte_malloc.h>\n+\n+#include \"cpt_pmd_logs.h\"\n \n #include \"otx_cryptodev.h\"\n+#include \"otx_cryptodev_hw_access.h\"\n #include \"otx_cryptodev_ops.h\"\n \n+/* Alarm routines */\n+\n+static void\n+otx_cpt_alarm_cb(void *arg)\n+{\n+\tstruct cpt_vf *cptvf = arg;\n+\totx_cpt_poll_misc(cptvf);\n+\trte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000,\n+\t\t\t otx_cpt_alarm_cb, cptvf);\n+}\n+\n+static int\n+otx_cpt_periodic_alarm_start(void *arg)\n+{\n+\treturn rte_eal_alarm_set(CPT_INTR_POLL_INTERVAL_MS * 1000,\n+\t\t\t\t otx_cpt_alarm_cb, arg);\n+}\n+\n int\n otx_cpt_dev_create(struct rte_cryptodev *c_dev)\n {\n-\tRTE_SET_USED(c_dev);\n+\tstruct rte_pci_device *pdev = RTE_DEV_TO_PCI(c_dev->device);\n+\tstruct cpt_vf *cptvf = NULL;\n+\tvoid *reg_base;\n+\tchar dev_name[32];\n+\tint ret;\n+\n+\tif (pdev->mem_resource[0].phys_addr == 0ULL)\n+\t\treturn -EIO;\n+\n+\t/* for secondary processes, we don't initialise any further as primary\n+\t * has already done this work.\n+\t */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\tcptvf = rte_zmalloc_socket(\"otx_cryptodev_private_mem\",\n+\t\t\tsizeof(struct cpt_vf), RTE_CACHE_LINE_SIZE,\n+\t\t\trte_socket_id());\n+\n+\tif (cptvf == NULL) {\n+\t\tCPT_LOG_ERR(\"Cannot allocate memory for device private data\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tsnprintf(dev_name, 32, \"%02x:%02x.%x\",\n+\t\t\tpdev->addr.bus, pdev->addr.devid, pdev->addr.function);\n+\n+\treg_base = pdev->mem_resource[0].addr;\n+\tif (!reg_base) {\n+\t\tCPT_LOG_ERR(\"Failed to map BAR0 of %s\", dev_name);\n+\t\tret = -ENODEV;\n+\t\tgoto fail;\n+\t}\n+\n+\tret = otx_cpt_hw_init(cptvf, pdev, reg_base, dev_name);\n+\tif (ret) {\n+\t\tCPT_LOG_ERR(\"Failed to init cptvf %s\", dev_name);\n+\t\tret = -EIO;\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Start off timer for mailbox interrupts */\n+\totx_cpt_periodic_alarm_start(cptvf);\n+\n+\tc_dev->dev_ops = NULL;\n+\n+\tc_dev->enqueue_burst = NULL;\n+\tc_dev->dequeue_burst = NULL;\n+\n+\tc_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n+\t\t\tRTE_CRYPTODEV_FF_HW_ACCELERATED |\n+\t\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;\n+\n+\t/* Save dev private data */\n+\tc_dev->data->dev_private = cptvf;\n+\n \treturn 0;\n+\n+fail:\n+\tif (cptvf) {\n+\t\t/* Free private data allocated */\n+\t\trte_free(cptvf);\n+\t}\n+\n+\treturn ret;\n }\n", "prefixes": [ "v2", "06/33" ] }