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GET /api/patches/42998/?format=api
{ "id": 42998, "url": "http://patches.dpdk.org/api/patches/42998/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1531411499-13156-17-git-send-email-fiona.trahe@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1531411499-13156-17-git-send-email-fiona.trahe@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1531411499-13156-17-git-send-email-fiona.trahe@intel.com", "date": "2018-07-12T16:04:59", "name": "[v6,16/16] docs/qat: refactor docs adding compression guide", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "85072bbde0723a9fa0c7ca3dafe9d2d5dc382fc3", "submitter": { "id": 423, "url": "http://patches.dpdk.org/api/people/423/?format=api", "name": "Fiona Trahe", "email": "fiona.trahe@intel.com" }, "delegate": { "id": 22, "url": "http://patches.dpdk.org/api/users/22/?format=api", "username": "pdelarag", "first_name": "Pablo", "last_name": "de Lara Guarch", "email": "pablo.de.lara.guarch@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1531411499-13156-17-git-send-email-fiona.trahe@intel.com/mbox/", "series": [ { "id": 520, "url": "http://patches.dpdk.org/api/series/520/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=520", "date": "2018-07-11T11:56:53", "name": "compress/qat: add compression PMD", "version": 5, "mbox": "http://patches.dpdk.org/series/520/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/42998/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/42998/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C0F221B576;\n\tThu, 12 Jul 2018 18:05:55 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id 109891B4F0\n\tfor <dev@dpdk.org>; Thu, 12 Jul 2018 18:05:35 +0200 (CEST)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t12 Jul 2018 09:05:32 -0700", "from sivswdev01.ir.intel.com (HELO localhost.localdomain)\n\t([10.237.217.45])\n\tby fmsmga006.fm.intel.com with ESMTP; 12 Jul 2018 09:05:31 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.51,343,1526367600\"; d=\"scan'208\";a=\"245184251\"", "From": "Fiona Trahe <fiona.trahe@intel.com>", "To": "dev@dpdk.org", "Cc": "pablo.de.lara.guarch@intel.com, fiona.trahe@intel.com,\n\ttomaszx.jozwiak@intel.com", "Date": "Thu, 12 Jul 2018 17:04:59 +0100", "Message-Id": "<1531411499-13156-17-git-send-email-fiona.trahe@intel.com>", "X-Mailer": "git-send-email 1.7.0.7", "In-Reply-To": "<1531310229-17448-1-git-send-email-fiona.trahe@intel.com>", "References": "<1531310229-17448-1-git-send-email-fiona.trahe@intel.com>", "Subject": "[dpdk-dev] [PATCH v6 16/16] docs/qat: refactor docs adding\n\tcompression guide", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Extend QAT guide to cover crypto and compression and common\ninformation, particularly about kernel driver dependency.\nUpdate release note.\nUpdate compression feature list for qat.\n\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\n---\n config/common_base | 2 +-\n doc/guides/compressdevs/features/qat.ini | 24 ++++\n doc/guides/compressdevs/index.rst | 1 +\n doc/guides/compressdevs/qat_comp.rst | 49 +++++++++\n doc/guides/cryptodevs/qat.rst | 183 +++++++++++++++++++++----------\n doc/guides/rel_notes/release_18_08.rst | 5 +\n 6 files changed, 205 insertions(+), 59 deletions(-)\n create mode 100644 doc/guides/compressdevs/features/qat.ini\n create mode 100644 doc/guides/compressdevs/qat_comp.rst", "diff": "diff --git a/config/common_base b/config/common_base\nindex 8b539af..e569b35 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -478,7 +478,7 @@ CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n\n CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4\n \n #\n-# Compile PMD for QuickAssist based devices\n+# Compile PMD for QuickAssist based devices - see docs for details\n #\n CONFIG_RTE_LIBRTE_PMD_QAT=y\n CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n\ndiff --git a/doc/guides/compressdevs/features/qat.ini b/doc/guides/compressdevs/features/qat.ini\nnew file mode 100644\nindex 0000000..0d0e21d\n--- /dev/null\n+++ b/doc/guides/compressdevs/features/qat.ini\n@@ -0,0 +1,24 @@\n+;\n+; Refer to default.ini for the full list of available PMD features.\n+;\n+; Supported features of 'QAT' compression driver.\n+;\n+[Features]\n+HW Accelerated = Y\n+CPU SSE =\n+CPU AVX =\n+CPU AVX2 =\n+CPU AVX512 =\n+CPU NEON =\n+Stateful =\n+Pass-through =\n+OOP SGL In SGL Out =\n+OOP SGL In LB Out =\n+OOP LB In SGL Out =\n+Deflate = Y\n+LZS =\n+Adler32 = Y\n+Crc32 = Y\n+Adler32&Crc32 = Y\n+Fixed = Y\n+Dynamic =\ndiff --git a/doc/guides/compressdevs/index.rst b/doc/guides/compressdevs/index.rst\nindex bc59ce8..4228768 100644\n--- a/doc/guides/compressdevs/index.rst\n+++ b/doc/guides/compressdevs/index.rst\n@@ -11,3 +11,4 @@ Compression Device Drivers\n \n overview\n isal\n+ qat_comp\ndiff --git a/doc/guides/compressdevs/qat_comp.rst b/doc/guides/compressdevs/qat_comp.rst\nnew file mode 100644\nindex 0000000..167f816\n--- /dev/null\n+++ b/doc/guides/compressdevs/qat_comp.rst\n@@ -0,0 +1,49 @@\n+.. SPDX-License-Identifier: BSD-3-Clause\n+ Copyright(c) 2018 Intel Corporation.\n+\n+Intel(R) QuickAssist (QAT) Compression Poll Mode Driver\n+=======================================================\n+\n+The QAT compression PMD provides poll mode compression & decompression driver\n+support for the following hardware accelerator devices:\n+\n+* ``Intel QuickAssist Technology C62x``\n+* ``Intel QuickAssist Technology C3xxx``\n+\n+\n+Features\n+--------\n+\n+QAT compression PMD has support for:\n+\n+Compression/Decompression algorithm:\n+\n+ * DEFLATE\n+\n+Huffman code type:\n+\n+ * FIXED\n+\n+Window size support:\n+\n+ * 32K\n+\n+Checksum generation:\n+\n+ * CRC32, Adler and combined checksum\n+\n+Limitations\n+-----------\n+\n+* Chained mbufs are not yet supported, therefore max data size which can be passed to the PMD in a single mbuf is 64K - 1. If data is larger than this it will need to be split up and sent as multiple operations.\n+\n+* Compressdev level 0, no compression, is not supported.\n+\n+* Dynamic Huffman encoding is not yet supported.\n+\n+Installation\n+------------\n+\n+The QAT compression PMD is built by default with a standard DPDK build.\n+\n+It depends on a QAT kernel driver, see :ref:`qat_kernel_installation`.\ndiff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst\nindex b899985..bdc58eb 100644\n--- a/doc/guides/cryptodevs/qat.rst\n+++ b/doc/guides/cryptodevs/qat.rst\n@@ -68,12 +68,32 @@ Limitations\n * Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).\n \n \n-Installation\n-------------\n+Extra notes on KASUMI F9\n+------------------------\n+\n+When using KASUMI F9 authentication algorithm, the input buffer must be\n+constructed according to the 3GPP KASUMI specifications (section 4.4, page 13):\n+`<http://cryptome.org/3gpp/35201-900.pdf>`_.\n+Input buffer has to have COUNT (4 bytes), FRESH (4 bytes), MESSAGE and DIRECTION (1 bit)\n+concatenated. After the DIRECTION bit, a single '1' bit is appended, followed by\n+between 0 and 7 '0' bits, so that the total length of the buffer is multiple of 8 bits.\n+Note that the actual message can be any length, specified in bits.\n \n-To enable QAT in DPDK, follow the instructions for modifying the compile-time\n+Once this buffer is passed this way, when creating the crypto operation,\n+length of data to authenticate (op.sym.auth.data.length) must be the length\n+of all the items described above, including the padding at the end.\n+Also, offset of data to authenticate (op.sym.auth.data.offset)\n+must be such that points at the start of the COUNT bytes.\n+\n+\n+Building the DPDK QAT cryptodev PMD\n+-----------------------------------\n+\n+\n+To enable QAT crypto in DPDK, follow the instructions for modifying the compile-time\n configuration file as described `here <http://dpdk.org/doc/guides/linux_gsg/build_dpdk.html>`_.\n \n+\n Quick instructions are as follows:\n \n .. code-block:: console\n@@ -81,29 +101,95 @@ Quick instructions are as follows:\n \tcd to the top-level DPDK directory\n \tmake config T=x86_64-native-linuxapp-gcc\n \tsed -i 's,\\(CONFIG_RTE_LIBRTE_PMD_QAT\\)=n,\\1=y,' build/.config\n+\tsed -i 's,\\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\\)=n,\\1=y,' build/.config\n \tmake\n \n-To use the DPDK QAT PMD an SRIOV-enabled QAT kernel driver is required. The VF\n-devices exposed by this driver will be used by the QAT PMD. The devices and\n-available kernel drivers and device ids are :\n+\n+.. _qat_kernel_installation:\n+\n+Dependency on the QAT kernel driver\n+-----------------------------------\n+\n+To use the QAT PMD an SRIOV-enabled QAT kernel driver is required. The VF\n+devices created and initialised by this driver will be used by the QAT PMD.\n+\n+Instructions for installation are below, but first an explanation of the\n+relationships between the PF/VF devices and the PMDs visible to\n+DPDK applications.\n+\n+\n+Acceleration services - cryptography and compression - are provided to DPDK\n+applications via PMDs which register to implement the corresponding\n+cryptodev and compressdev APIs.\n+\n+Each QuickAssist VF device can expose one cryptodev PMD and/or one compressdev PMD.\n+These QAT PMDs share the same underlying device and pci-mgmt code, but are\n+enumerated independently on their respective APIs and appear as independent\n+devices to applications.\n+\n+.. Note::\n+\n+ Each VF can only be used by one DPDK process. It is not possible to share\n+ the same VF across multiple processes, even if these processes are using\n+ different acceleration services.\n+\n+ Conversely one DPDK process can use one or more QAT VFs and can expose both\n+ cryptodev and compressdev instances on each of those VFs.\n+\n+\n+\n+Device and driver naming\n+------------------------\n+\n+* The qat cryptodev driver name is \"crypto_qat\".\n+ The rte_cryptodev_devices_get() returns the devices exposed by this driver.\n+\n+* Each qat crypto device has a unique name, in format\n+ <pci bdf>_<service>, e.g. \"0000:41:01.0_qat_sym\".\n+ This name can be passed to rte_cryptodev_get_dev_id() to get the device_id.\n+\n+.. Note::\n+\n+\tThe qat crypto driver name is passed to the dpdk-test-crypto-perf tool in the -devtype parameter.\n+\n+\tThe qat crypto device name is in the format of the slave parameter passed to the crypto scheduler.\n+\n+* The qat compressdev driver name is \"comp_qat\".\n+ The rte_compressdev_devices_get() returns the devices exposed by this driver.\n+\n+* Each qat compression device has a unique name, in format\n+ <pci bdf>_<service>, e.g. \"0000:41:01.0_qat_comp\".\n+ This name can be passed to rte_compressdev_get_dev_id() to get the device_id.\n+\n+\n+Available kernel drivers\n+------------------------\n+\n+Kernel drivers for each device are listed in the following table. Scroll right\n+to check that the driver and device supports the servic you require.\n+\n \n .. _table_qat_pmds_drivers:\n \n .. table:: QAT device generations, devices and drivers\n \n- +-----+----------+--------+---------------+------------+--------+------+--------+--------+\n- | Gen | Device | Driver | Kernel Module | Pci Driver | PF Did | #PFs | Vf Did | VFs/PF |\n- +=====+==========+========+===============+============+========+======+========+========+\n- | 1 | DH895xCC | 01.org | icp_qa_al | n/a | 435 | 1 | 443 | 32 |\n- +-----+----------+--------+---------------+------------+--------+------+--------+--------+\n- | 1 | DH895xCC | 4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 |\n- +-----+----------+--------+---------------+------------+--------+------+--------+--------+\n- | 2 | C62x | 4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 |\n- +-----+----------+--------+---------------+------------+--------+------+--------+--------+\n- | 2 | C3xxx | 4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 |\n- +-----+----------+--------+---------------+------------+--------+------+--------+--------+\n- | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 |\n- +-----+----------+--------+---------------+------------+--------+------+--------+--------+\n+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+\n+ | Gen | Device | Driver/ver | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF | cryptodev | compressdev |\n+ +=====+==========+===============+===============+============+========+======+========+========+===========+=============+\n+ | 1 | DH895xCC | linux/4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 | Yes | No |\n+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+\n+ | \" | \" | 01.org/4.2.0+ | \" | \" | \" | \" | \" | \" | Yes | No |\n+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+\n+ | 2 | C62x | linux/4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 | Yes | No |\n+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+\n+ | \" | \" | 01.org/4.2.0+ | \" | \" | \" | \" | \" | \" | Yes | Yes |\n+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+\n+ | 2 | C3xxx | linux/4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 | Yes | No |\n+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+\n+ | \" | \" | 01.org/4.2.0+ | \" | \" | \" | \" | \" | \" | Yes | Yes |\n+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+\n+ | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 | Yes | No |\n+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+\n \n \n The ``Driver`` column indicates either the Linux kernel version in which\n@@ -196,9 +282,9 @@ Consult the *Getting Started Guide* at the same URL for further information.\n \n The steps below assume you are:\n \n-* Building on a platform with one ``DH895xCC`` device.\n-* Using package ``qatmux.l.2.3.0-34.tgz``.\n-* On Fedora21 kernel ``3.17.4-301.fc21.x86_64``.\n+* Building on a platform with one ``C62x`` device.\n+* Using package ``qat1.7.l.4.2.0-000xx.tar.gz``.\n+* On Fedora26 kernel ``4.11.11-300.fc26.x86_64``.\n \n In the BIOS ensure that SRIOV is enabled and VT-d is disabled.\n \n@@ -206,21 +292,30 @@ Uninstall any existing QAT driver, for example by running:\n \n * ``./installer.sh uninstall`` in the directory where originally installed.\n \n-* or ``rmmod qat_dh895xcc; rmmod intel_qat``.\n \n Build and install the SRIOV-enabled QAT driver::\n \n mkdir /QAT\n cd /QAT\n \n- # Copy qatmux.l.2.3.0-34.tgz to this location\n- tar zxof qatmux.l.2.3.0-34.tgz\n+ # Copy the package to this location and unpack\n+ tar zxof qat1.7.l.4.2.0-000xx.tar.gz\n \n- export ICP_WITHOUT_IOMMU=1\n- ./installer.sh install QAT1.6 host\n+ ./configure --enable-icp-sriov=host\n+ make install\n+\n+You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0.\n+You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF.\n+\n+Confirm the driver is correctly installed and is using firmware version 4.2.0::\n+\n+ cat /sys/kernel/debug/qat<your device type and bdf>/version/fw\n+\n+\n+Confirm the presence of 48 VF devices - 16 per PF::\n+\n+ lspci -d:37c9\n \n-You can use ``cat /proc/icp_dh895xcc_dev0/version`` to confirm the driver is correctly installed.\n-You can use ``lspci -d:443`` to confirm the of the 32 VF devices available per ``DH895xCC`` device.\n \n To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.\n \n@@ -261,6 +356,7 @@ To complete the installation - follow instructions in `Binding the available VFs\n \n sudo yum install zlib-devel\n sudo yum install openssl-devel\n+ sudo yum install libudev-devel\n \n .. Note::\n \n@@ -343,35 +439,6 @@ Another way to bind the VFs to the DPDK UIO driver is by using the\n ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1\n \n \n-Extra notes on KASUMI F9\n-------------------------\n-\n-When using KASUMI F9 authentication algorithm, the input buffer must be\n-constructed according to the 3GPP KASUMI specifications (section 4.4, page 13):\n-`<http://cryptome.org/3gpp/35201-900.pdf>`_.\n-Input buffer has to have COUNT (4 bytes), FRESH (4 bytes), MESSAGE and DIRECTION (1 bit)\n-concatenated. After the DIRECTION bit, a single '1' bit is appended, followed by\n-between 0 and 7 '0' bits, so that the total length of the buffer is multiple of 8 bits.\n-Note that the actual message can be any length, specified in bits.\n-\n-Once this buffer is passed this way, when creating the crypto operation,\n-length of data to authenticate (op.sym.auth.data.length) must be the length\n-of all the items described above, including the padding at the end.\n-Also, offset of data to authenticate (op.sym.auth.data.offset)\n-must be such that points at the start of the COUNT bytes.\n-\n-Device and driver naming\n-------------------------\n-\n-The qat crypto driver name is \"crypto_qat\".\n-This name is passed to the dpdk-test-crypto-perf tool in the -devtype parameter.\n-The rte_cryptodev_devices_get() can return the devices exposed by a driver.\n-\n-Each qat crypto device has a unique name, in format\n-<pci bdf>_<service>, e.g. \"0000:41:01.0_qat_sym\".\n-This name can be passed to rte_cryptodev_get_dev_id() to get the device_id.\n-This is also the format of the slave parameter passed to the crypto scheduler.\n-\n Debugging\n ----------------------------------------\n \ndiff --git a/doc/guides/rel_notes/release_18_08.rst b/doc/guides/rel_notes/release_18_08.rst\nindex d41546c..e554613 100644\n--- a/doc/guides/rel_notes/release_18_08.rst\n+++ b/doc/guides/rel_notes/release_18_08.rst\n@@ -68,6 +68,11 @@ New Features\n * Add handlers to add/delete VxLAN port number.\n * Add devarg to specify ingress VLAN rewrite mode.\n \n+* **Added a new compression PMD using Intel's QuickAssist (QAT) device family.**\n+\n+ Added the new ``QAT`` compression driver, for compression and decompression\n+ operations in software. See the :doc:`../compressdevs/qat_comp` compression\n+ driver guide for details on this new driver.\n \n API Changes\n -----------\n", "prefixes": [ "v6", "16/16" ] }