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GET /api/patches/42838/?format=api
{ "id": 42838, "url": "http://patches.dpdk.org/api/patches/42838/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1531310229-17448-5-git-send-email-fiona.trahe@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1531310229-17448-5-git-send-email-fiona.trahe@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1531310229-17448-5-git-send-email-fiona.trahe@intel.com", "date": "2018-07-11T11:56:57", "name": "[v5,04/16] compress/qat: add xform processing", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "3c3d71fc322d47a4fabbecfb8bc230fc59a0d389", "submitter": { "id": 423, "url": "http://patches.dpdk.org/api/people/423/?format=api", "name": "Fiona Trahe", "email": "fiona.trahe@intel.com" }, "delegate": { "id": 22, "url": "http://patches.dpdk.org/api/users/22/?format=api", "username": "pdelarag", "first_name": "Pablo", "last_name": "de Lara Guarch", "email": "pablo.de.lara.guarch@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1531310229-17448-5-git-send-email-fiona.trahe@intel.com/mbox/", "series": [ { "id": 481, "url": "http://patches.dpdk.org/api/series/481/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=481", "date": "2018-07-10T00:41:35", "name": "compress/qat: add compression PMD", "version": 4, "mbox": "http://patches.dpdk.org/series/481/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/42838/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/42838/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9DCFA1B579;\n\tWed, 11 Jul 2018 13:57:42 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id 7BBE01B519\n\tfor <dev@dpdk.org>; Wed, 11 Jul 2018 13:57:36 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t11 Jul 2018 04:57:36 -0700", "from sivswdev01.ir.intel.com (HELO localhost.localdomain)\n\t([10.237.217.45])\n\tby fmsmga008.fm.intel.com with ESMTP; 11 Jul 2018 04:57:35 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.51,338,1526367600\"; d=\"scan'208\";a=\"54214082\"", "From": "Fiona Trahe <fiona.trahe@intel.com>", "To": "dev@dpdk.org", "Cc": "pablo.de.lara.guarch@intel.com, fiona.trahe@intel.com,\n\ttomaszx.jozwiak@intel.com", "Date": "Wed, 11 Jul 2018 12:56:57 +0100", "Message-Id": "<1531310229-17448-5-git-send-email-fiona.trahe@intel.com>", "X-Mailer": "git-send-email 1.7.0.7", "In-Reply-To": "<1531183311-32619-1-git-send-email-fiona.trahe@intel.com>", "References": "<1531183311-32619-1-git-send-email-fiona.trahe@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 04/16] compress/qat: add xform processing", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add code to process compressdev rte_comp_xforms, creating\nprivate qat_comp_xforms with prepared firmware message templates.\n\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\nSigned-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>\n---\n drivers/compress/qat/qat_comp.c | 239 ++++++++++++++++++++++++++++++++++++\n drivers/compress/qat/qat_comp.h | 30 +++++\n drivers/compress/qat/qat_comp_pmd.h | 16 +++\n 3 files changed, 285 insertions(+)", "diff": "diff --git a/drivers/compress/qat/qat_comp.c b/drivers/compress/qat/qat_comp.c\nindex caa1158..cb2005a 100644\n--- a/drivers/compress/qat/qat_comp.c\n+++ b/drivers/compress/qat/qat_comp.c\n@@ -2,4 +2,243 @@\n * Copyright(c) 2018 Intel Corporation\n */\n \n+\n+#include <rte_mempool.h>\n+#include <rte_mbuf.h>\n+#include <rte_hexdump.h>\n+#include <rte_comp.h>\n+#include <rte_bus_pci.h>\n+#include <rte_byteorder.h>\n+#include <rte_memcpy.h>\n+#include <rte_common.h>\n+#include <rte_spinlock.h>\n+#include <rte_log.h>\n+#include <rte_malloc.h>\n+\n+#include \"qat_logs.h\"\n #include \"qat_comp.h\"\n+#include \"qat_comp_pmd.h\"\n+\n+unsigned int\n+qat_comp_xform_size(void)\n+{\n+\treturn RTE_ALIGN_CEIL(sizeof(struct qat_comp_xform), 8);\n+}\n+\n+static void qat_comp_create_req_hdr(struct icp_qat_fw_comn_req_hdr *header,\n+\t\t\t\t enum qat_comp_request_type request)\n+{\n+\tif (request == QAT_COMP_REQUEST_FIXED_COMP_STATELESS)\n+\t\theader->service_cmd_id = ICP_QAT_FW_COMP_CMD_STATIC;\n+\telse if (request == QAT_COMP_REQUEST_DYNAMIC_COMP_STATELESS)\n+\t\theader->service_cmd_id = ICP_QAT_FW_COMP_CMD_DYNAMIC;\n+\telse if (request == QAT_COMP_REQUEST_DECOMPRESS)\n+\t\theader->service_cmd_id = ICP_QAT_FW_COMP_CMD_DECOMPRESS;\n+\n+\theader->service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_COMP;\n+\theader->hdr_flags =\n+\t ICP_QAT_FW_COMN_HDR_FLAGS_BUILD(ICP_QAT_FW_COMN_REQ_FLAG_SET);\n+\n+\theader->comn_req_flags = ICP_QAT_FW_COMN_FLAGS_BUILD(\n+\t QAT_COMN_CD_FLD_TYPE_16BYTE_DATA, QAT_COMN_PTR_TYPE_FLAT);\n+}\n+\n+static int qat_comp_create_templates(struct qat_comp_xform *qat_xform,\n+\t\t\tconst struct rte_memzone *interm_buff_mz __rte_unused,\n+\t\t\tconst struct rte_comp_xform *xform)\n+{\n+\tstruct icp_qat_fw_comp_req *comp_req;\n+\tint comp_level, algo;\n+\tuint32_t req_par_flags;\n+\tint direction = ICP_QAT_HW_COMPRESSION_DIR_COMPRESS;\n+\n+\tif (unlikely(qat_xform == NULL)) {\n+\t\tQAT_LOG(ERR, \"Session was not created for this device\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (qat_xform->qat_comp_request_type == QAT_COMP_REQUEST_DECOMPRESS) {\n+\t\tdirection = ICP_QAT_HW_COMPRESSION_DIR_DECOMPRESS;\n+\t\tcomp_level = ICP_QAT_HW_COMPRESSION_DEPTH_1;\n+\t\treq_par_flags = ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD(\n+\t\t\t\tICP_QAT_FW_COMP_SOP, ICP_QAT_FW_COMP_EOP,\n+\t\t\t\tICP_QAT_FW_COMP_BFINAL, ICP_QAT_FW_COMP_NO_CNV,\n+\t\t\t\tICP_QAT_FW_COMP_NO_CNV_RECOVERY);\n+\n+\t} else {\n+\t\tif (xform->compress.level == RTE_COMP_LEVEL_PMD_DEFAULT)\n+\t\t\tcomp_level = ICP_QAT_HW_COMPRESSION_DEPTH_8;\n+\t\telse if (xform->compress.level == 1)\n+\t\t\tcomp_level = ICP_QAT_HW_COMPRESSION_DEPTH_1;\n+\t\telse if (xform->compress.level == 2)\n+\t\t\tcomp_level = ICP_QAT_HW_COMPRESSION_DEPTH_4;\n+\t\telse if (xform->compress.level == 3)\n+\t\t\tcomp_level = ICP_QAT_HW_COMPRESSION_DEPTH_8;\n+\t\telse if (xform->compress.level >= 4 &&\n+\t\t\t xform->compress.level <= 9)\n+\t\t\tcomp_level = ICP_QAT_HW_COMPRESSION_DEPTH_16;\n+\t\telse {\n+\t\t\tQAT_LOG(ERR, \"compression level not supported\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\treq_par_flags = ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD(\n+\t\t\t\tICP_QAT_FW_COMP_SOP, ICP_QAT_FW_COMP_EOP,\n+\t\t\t\tICP_QAT_FW_COMP_BFINAL, ICP_QAT_FW_COMP_CNV,\n+\t\t\t\tICP_QAT_FW_COMP_CNV_RECOVERY);\n+\t}\n+\n+\tswitch (xform->compress.algo) {\n+\tcase RTE_COMP_ALGO_DEFLATE:\n+\t\talgo = ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE;\n+\t\tbreak;\n+\tcase RTE_COMP_ALGO_LZS:\n+\tdefault:\n+\t\t/* RTE_COMP_NULL */\n+\t\tQAT_LOG(ERR, \"compression algorithm not supported\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tcomp_req = &qat_xform->qat_comp_req_tmpl;\n+\n+\t/* Initialize header */\n+\tqat_comp_create_req_hdr(&comp_req->comn_hdr,\n+\t\t\t\t\tqat_xform->qat_comp_request_type);\n+\n+\tcomp_req->comn_hdr.serv_specif_flags = ICP_QAT_FW_COMP_FLAGS_BUILD(\n+\t ICP_QAT_FW_COMP_STATELESS_SESSION,\n+\t ICP_QAT_FW_COMP_NOT_AUTO_SELECT_BEST,\n+\t ICP_QAT_FW_COMP_NOT_ENH_AUTO_SELECT_BEST,\n+\t ICP_QAT_FW_COMP_NOT_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST,\n+\t ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_USED_AS_INTMD_BUF);\n+\n+\tcomp_req->cd_pars.sl.comp_slice_cfg_word[0] =\n+\t ICP_QAT_HW_COMPRESSION_CONFIG_BUILD(\n+\t\tdirection,\n+\t\t/* In CPM 1.6 only valid mode ! */\n+\t\tICP_QAT_HW_COMPRESSION_DELAYED_MATCH_ENABLED, algo,\n+\t\t/* Translate level to depth */\n+\t\tcomp_level, ICP_QAT_HW_COMPRESSION_FILE_TYPE_0);\n+\n+\tcomp_req->comp_pars.initial_adler = 1;\n+\tcomp_req->comp_pars.initial_crc32 = 0;\n+\tcomp_req->comp_pars.req_par_flags = req_par_flags;\n+\n+\n+\tif (qat_xform->qat_comp_request_type ==\n+\t\t\tQAT_COMP_REQUEST_FIXED_COMP_STATELESS ||\n+\t qat_xform->qat_comp_request_type == QAT_COMP_REQUEST_DECOMPRESS) {\n+\t\tICP_QAT_FW_COMN_NEXT_ID_SET(&comp_req->comp_cd_ctrl,\n+\t\t\t\t\t ICP_QAT_FW_SLICE_DRAM_WR);\n+\t\tICP_QAT_FW_COMN_CURR_ID_SET(&comp_req->comp_cd_ctrl,\n+\t\t\t\t\t ICP_QAT_FW_SLICE_COMP);\n+\t} else if (qat_xform->qat_comp_request_type ==\n+\t\t QAT_COMP_REQUEST_DYNAMIC_COMP_STATELESS) {\n+\n+\t\tQAT_LOG(ERR, \"Dynamic huffman encoding not supported\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG\n+\tQAT_DP_HEXDUMP_LOG(DEBUG, \"qat compression message template:\", comp_req,\n+\t\t sizeof(struct icp_qat_fw_comp_req));\n+#endif\n+\treturn 0;\n+}\n+\n+/**\n+ * Create driver private_xform data.\n+ *\n+ * @param dev\n+ * Compressdev device\n+ * @param xform\n+ * xform data from application\n+ * @param private_xform\n+ * ptr where handle of pmd's private_xform data should be stored\n+ * @return\n+ * - if successful returns 0\n+ * and valid private_xform handle\n+ * - <0 in error cases\n+ * - Returns -EINVAL if input parameters are invalid.\n+ * - Returns -ENOTSUP if comp device does not support the comp transform.\n+ * - Returns -ENOMEM if the private_xform could not be allocated.\n+ */\n+int\n+qat_comp_private_xform_create(struct rte_compressdev *dev,\n+\t\t\t const struct rte_comp_xform *xform,\n+\t\t\t void **private_xform)\n+{\n+\tstruct qat_comp_dev_private *qat = dev->data->dev_private;\n+\n+\tif (unlikely(private_xform == NULL)) {\n+\t\tQAT_LOG(ERR, \"QAT: private_xform parameter is NULL\");\n+\t\treturn -EINVAL;\n+\t}\n+\tif (unlikely(qat->xformpool == NULL)) {\n+\t\tQAT_LOG(ERR, \"QAT device has no private_xform mempool\");\n+\t\treturn -ENOMEM;\n+\t}\n+\tif (rte_mempool_get(qat->xformpool, private_xform)) {\n+\t\tQAT_LOG(ERR, \"Couldn't get object from qat xform mempool\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tstruct qat_comp_xform *qat_xform =\n+\t\t\t(struct qat_comp_xform *)*private_xform;\n+\n+\tif (xform->type == RTE_COMP_COMPRESS) {\n+\t\tif (xform->compress.deflate.huffman ==\n+\t\t\t\tRTE_COMP_HUFFMAN_DYNAMIC) {\n+\t\t\tQAT_LOG(ERR,\n+\t\t\t\"QAT device doesn't support dynamic compression\");\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n+\n+\t\tif (xform->compress.deflate.huffman == RTE_COMP_HUFFMAN_FIXED ||\n+\t\t ((xform->compress.deflate.huffman == RTE_COMP_HUFFMAN_DEFAULT)\n+\t\t\t\t && qat->interm_buff_mz == NULL))\n+\n+\t\t\tqat_xform->qat_comp_request_type =\n+\t\t\t\t\tQAT_COMP_REQUEST_FIXED_COMP_STATELESS;\n+\n+\n+\t} else {\n+\t\tqat_xform->qat_comp_request_type = QAT_COMP_REQUEST_DECOMPRESS;\n+\t}\n+\n+\tqat_xform->checksum_type = xform->compress.chksum;\n+\n+\tif (qat_comp_create_templates(qat_xform, qat->interm_buff_mz, xform)) {\n+\t\tQAT_LOG(ERR, \"QAT: Problem with setting compression\");\n+\t\treturn -EINVAL;\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n+ * Free driver private_xform data.\n+ *\n+ * @param dev\n+ * Compressdev device\n+ * @param private_xform\n+ * handle of pmd's private_xform data\n+ * @return\n+ * - 0 if successful\n+ * - <0 in error cases\n+ * - Returns -EINVAL if input parameters are invalid.\n+ */\n+int\n+qat_comp_private_xform_free(struct rte_compressdev *dev __rte_unused,\n+\t\t\t void *private_xform)\n+{\n+\tstruct qat_comp_xform *qat_xform =\n+\t\t\t(struct qat_comp_xform *)private_xform;\n+\n+\tif (qat_xform) {\n+\t\tmemset(qat_xform, 0, qat_comp_xform_size());\n+\t\tstruct rte_mempool *mp = rte_mempool_from_obj(qat_xform);\n+\n+\t\trte_mempool_put(mp, qat_xform);\n+\t\treturn 0;\n+\t}\n+\treturn -EINVAL;\n+}\ndiff --git a/drivers/compress/qat/qat_comp.h b/drivers/compress/qat/qat_comp.h\nindex 89c475e..0f58a76 100644\n--- a/drivers/compress/qat/qat_comp.h\n+++ b/drivers/compress/qat/qat_comp.h\n@@ -10,5 +10,35 @@\n #include <rte_compressdev.h>\n #include <rte_compressdev_pmd.h>\n \n+#include \"icp_qat_hw.h\"\n+#include \"icp_qat_fw_comp.h\"\n+#include \"icp_qat_fw_la.h\"\n+\n+enum qat_comp_request_type {\n+\tQAT_COMP_REQUEST_FIXED_COMP_STATELESS,\n+\tQAT_COMP_REQUEST_DYNAMIC_COMP_STATELESS,\n+\tQAT_COMP_REQUEST_DECOMPRESS,\n+\tREQ_COMP_END\n+};\n+\n+\n+struct qat_comp_xform {\n+\tstruct icp_qat_fw_comp_req qat_comp_req_tmpl;\n+\tenum qat_comp_request_type qat_comp_request_type;\n+\tenum rte_comp_checksum_type checksum_type;\n+};\n+\n+\n+int\n+qat_comp_private_xform_create(struct rte_compressdev *dev,\n+\t\t\t const struct rte_comp_xform *xform,\n+\t\t\t void **private_xform);\n+\n+int\n+qat_comp_private_xform_free(struct rte_compressdev *dev, void *private_xform);\n+\n+unsigned int\n+qat_comp_xform_size(void);\n+\n #endif\n #endif\ndiff --git a/drivers/compress/qat/qat_comp_pmd.h b/drivers/compress/qat/qat_comp_pmd.h\nindex 9b5b543..fd97cbf 100644\n--- a/drivers/compress/qat/qat_comp_pmd.h\n+++ b/drivers/compress/qat/qat_comp_pmd.h\n@@ -11,5 +11,21 @@\n #include <rte_compressdev_pmd.h>\n \n \n+/** private data structure for a QAT compression device.\n+ * This QAT device is a device offering only a compression service,\n+ * there can be one of these on each qat_pci_device (VF).\n+ */\n+struct qat_comp_dev_private {\n+\tstruct qat_pci_device *qat_dev;\n+\t/**< The qat pci device hosting the service */\n+\tstruct rte_compressdev *compressdev;\n+\t/**< The pointer to this compression device structure */\n+\tconst struct rte_memzone *interm_buff_mz;\n+\t/**< The device's memory for intermediate buffers */\n+\tstruct rte_mempool *xformpool;\n+\t/**< The device's pool for qat_comp_xforms */\n+\n+};\n+\n #endif\n #endif /* _QAT_COMP_PMD_H_ */\n", "prefixes": [ "v5", "04/16" ] }