Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/42812/?format=api
{ "id": 42812, "url": "http://patches.dpdk.org/api/patches/42812/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/671a715dcf5996c4b51581e5c24eb31d0caa3986.1531293415.git.nelio.laranjeiro@6wind.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<671a715dcf5996c4b51581e5c24eb31d0caa3986.1531293415.git.nelio.laranjeiro@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/671a715dcf5996c4b51581e5c24eb31d0caa3986.1531293415.git.nelio.laranjeiro@6wind.com", "date": "2018-07-11T07:22:52", "name": "[v3,19/21] net/mlx5: add flow GRE item", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "6b7fa8abae03c922dedff7d5a8be6f078af770bb", "submitter": { "id": 243, "url": "http://patches.dpdk.org/api/people/243/?format=api", "name": "Nélio Laranjeiro", "email": "nelio.laranjeiro@6wind.com" }, "delegate": { "id": 6624, "url": "http://patches.dpdk.org/api/users/6624/?format=api", "username": "shahafs", "first_name": "Shahaf", "last_name": "Shuler", "email": "shahafs@mellanox.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/671a715dcf5996c4b51581e5c24eb31d0caa3986.1531293415.git.nelio.laranjeiro@6wind.com/mbox/", "series": [ { "id": 512, "url": "http://patches.dpdk.org/api/series/512/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=512", "date": "2018-07-11T07:22:33", "name": "net/mlx5: flow rework", "version": 3, "mbox": "http://patches.dpdk.org/series/512/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/42812/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/42812/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 114841B58C;\n\tWed, 11 Jul 2018 09:24:07 +0200 (CEST)", "from mail-wr1-f68.google.com (mail-wr1-f68.google.com\n\t[209.85.221.68]) by dpdk.org (Postfix) with ESMTP id 97F861B476\n\tfor <dev@dpdk.org>; Wed, 11 Jul 2018 09:23:34 +0200 (CEST)", "by mail-wr1-f68.google.com with SMTP id p1-v6so16999737wrs.9\n\tfor <dev@dpdk.org>; Wed, 11 Jul 2018 00:23:34 -0700 (PDT)", "from laranjeiro-vm.dev.6wind.com\n\t(host.78.145.23.62.rev.coltfrance.com. [62.23.145.78])\n\tby smtp.gmail.com with ESMTPSA id\n\tt10-v6sm31314212wre.95.2018.07.11.00.23.33\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tWed, 11 Jul 2018 00:23:33 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=6wind-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=ZK6jeOWSx5vgwuwfJxA2sRxE+benqiDssi4mUszWmC4=;\n\tb=zM0vTLvdbnJy4WMeGwxc0JDVlxuiKo0Lrcb5+VE8eow/5Y3XzjlyDTiWcrAHLPRgm+\n\tUNLElOE+rgx2n8K4hZsYNFntRKjsEVUwIl6NW0YNaw+wEj+k8bwDnu04Q0ZaL6zM2aIg\n\tze/dBFdJMvk1Sp7ObMCB4A9yW+KUk0h/3qmDZfSoFwPainjMeXXJ4EwkrXg0wm3zpR8X\n\tsJY8BQmMhpqUCdU+f3w/BMf3PxvajlJYv3TU2po4+KU6zZM5snmr/c4F1xMA7UP1eftA\n\tHV6V+vhnK6HeDFDws+eoE6WbNjwixOdyo1bmcYYVaea4G4kTMeT17wNZjcipNa9AYnrb\n\tfGsw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=ZK6jeOWSx5vgwuwfJxA2sRxE+benqiDssi4mUszWmC4=;\n\tb=ghTKQUAReer+LKOOyfWygNa3XExr52nUm50Uy3TZoZZh67SsxCOoEOtKp4kQ2VQV5l\n\tiA+8dh5P/ON72R51uFj5BAdkU/I7a5CkjLOTfiVZqV5iUgu8CaO2q3VNrFqmpYx0KR5B\n\tSRJAP6Gn5gvP3o8B8uqCE+Yg+gfhMAjIsc+1SXuTb0+AxAhzINlZI3t8ihTICLBFgIpu\n\t5yyCGbeGDSIPbWRUcdA1OcwEDi3vkp8yQqZQLLLFQypHw0hZGeKrTcauNcLB64F7fjqz\n\t70a1rfV6R47BcHsrokc/cH4RsZZWtHnVyoH1cKSPaOyEQOQDvqZ8aQbaUOP82BIQWFwt\n\tk/NQ==", "X-Gm-Message-State": "AOUpUlE4wEOhi8qqFUU/uObo2ucj52OxBdD9TEykDe17KvOWZLu8o8qu\n\tm749PDoeT3toSmC20qi3NCjvugD17A==", "X-Google-Smtp-Source": "AAOMgpePZ+y24yjMkLMstQmcxqqMJZEwRwaWmworoZwVZPKJxARDsWVmVl2j52H3OssA2Kr3r11SxA==", "X-Received": "by 2002:adf:bacf:: with SMTP id\n\tw15-v6mr13784710wrg.203.1531293814112; \n\tWed, 11 Jul 2018 00:23:34 -0700 (PDT)", "From": "Nelio Laranjeiro <nelio.laranjeiro@6wind.com>", "To": "dev@dpdk.org,\n\tYongseok Koh <yskoh@mellanox.com>", "Cc": "Adrien Mazarguil <adrien.mazarguil@6wind.com>", "Date": "Wed, 11 Jul 2018 09:22:52 +0200", "Message-Id": "<671a715dcf5996c4b51581e5c24eb31d0caa3986.1531293415.git.nelio.laranjeiro@6wind.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<cover.1531293415.git.nelio.laranjeiro@6wind.com>", "References": "<cover.1530111623.git.nelio.laranjeiro@6wind.com>\n\t<cover.1531293415.git.nelio.laranjeiro@6wind.com>", "Subject": "[dpdk-dev] [PATCH v3 19/21] net/mlx5: add flow GRE item", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>\n---\n drivers/net/mlx5/mlx5_flow.c | 193 ++++++++++++++++++++++++++++++++++-\n drivers/net/mlx5/mlx5_rxtx.h | 2 +-\n 2 files changed, 192 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex e06df0eb5..3412c856a 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -54,6 +54,7 @@ extern const struct eth_dev_ops mlx5_dev_ops_isolate;\n /* Pattern tunnel Layer bits. */\n #define MLX5_FLOW_LAYER_VXLAN (1u << 12)\n #define MLX5_FLOW_LAYER_VXLAN_GPE (1u << 13)\n+#define MLX5_FLOW_LAYER_GRE (1u << 14)\n \n /* Outer Masks. */\n #define MLX5_FLOW_LAYER_OUTER_L3 \\\n@@ -66,7 +67,8 @@ extern const struct eth_dev_ops mlx5_dev_ops_isolate;\n \n /* Tunnel Masks. */\n #define MLX5_FLOW_LAYER_TUNNEL \\\n-\t(MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE)\n+\t(MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE | \\\n+\t MLX5_FLOW_LAYER_GRE)\n \n /* Inner Masks. */\n #define MLX5_FLOW_LAYER_INNER_L3 \\\n@@ -89,6 +91,7 @@ extern const struct eth_dev_ops mlx5_dev_ops_isolate;\n /* possible L3 layers protocols filtering. */\n #define MLX5_IP_PROTOCOL_TCP 6\n #define MLX5_IP_PROTOCOL_UDP 17\n+#define MLX5_IP_PROTOCOL_GRE 47\n \n /* Priority reserved for default flows. */\n #define MLX5_FLOW_PRIO_RSVD ((uint32_t)-1)\n@@ -105,6 +108,7 @@ enum mlx5_expansion {\n \tMLX5_EXPANSION_OUTER_IPV6_TCP,\n \tMLX5_EXPANSION_VXLAN,\n \tMLX5_EXPANSION_VXLAN_GPE,\n+\tMLX5_EXPANSION_GRE,\n \tMLX5_EXPANSION_ETH,\n \tMLX5_EXPANSION_IPV4,\n \tMLX5_EXPANSION_IPV4_UDP,\n@@ -137,7 +141,8 @@ static const struct rte_flow_expand_node mlx5_support_expansion[] = {\n \t[MLX5_EXPANSION_OUTER_IPV4] = {\n \t\t.next = RTE_FLOW_EXPAND_RSS_NEXT\n \t\t\t(MLX5_EXPANSION_OUTER_IPV4_UDP,\n-\t\t\t MLX5_EXPANSION_OUTER_IPV4_TCP),\n+\t\t\t MLX5_EXPANSION_OUTER_IPV4_TCP,\n+\t\t\t MLX5_EXPANSION_GRE),\n \t\t.type = RTE_FLOW_ITEM_TYPE_IPV4,\n \t\t.rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |\n \t\t\tETH_RSS_NONFRAG_IPV4_OTHER,\n@@ -180,6 +185,10 @@ static const struct rte_flow_expand_node mlx5_support_expansion[] = {\n \t\t\t\t\t\t MLX5_EXPANSION_IPV6),\n \t\t.type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,\n \t},\n+\t[MLX5_EXPANSION_GRE] = {\n+\t\t.next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),\n+\t\t.type = RTE_FLOW_ITEM_TYPE_GRE,\n+\t},\n \t[MLX5_EXPANSION_ETH] = {\n \t\t.next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,\n \t\t\t\t\t\t MLX5_EXPANSION_IPV6),\n@@ -328,6 +337,10 @@ static struct mlx5_flow_tunnel_info tunnels_info[] = {\n \t\t.tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,\n \t\t.ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,\n \t},\n+\t{\n+\t\t.tunnel = MLX5_FLOW_LAYER_GRE,\n+\t\t.ptype = RTE_PTYPE_TUNNEL_GRE,\n+\t},\n };\n \n /**\n@@ -966,6 +979,18 @@ mlx5_flow_item_ipv6(const struct rte_flow_item *item, struct rte_flow *flow,\n \t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n \t\t\t\t\t item,\n \t\t\t\t\t \"L3 cannot follow an L4 layer.\");\n+\t/*\n+\t * IPv6 is not recognised by the NIC inside a GRE tunnel.\n+\t * Such support has to be disabled as the rule will be\n+\t * accepted. Issue reproduced with Mellanox OFED 4.3-3.0.2.1 and\n+\t * Mellanox OFED 4.4-1.0.0.0.\n+\t */\n+\tif (tunnel && flow->layers & MLX5_FLOW_LAYER_GRE)\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"IPv6 inside a GRE tunnel is\"\n+\t\t\t\t\t \" not recognised.\");\n \tif (!mask)\n \t\tmask = &rte_flow_item_ipv6_mask;\n \tret = mlx5_flow_item_acceptable\n@@ -1405,6 +1430,167 @@ mlx5_flow_item_vxlan_gpe(struct rte_eth_dev *dev,\n \treturn size;\n }\n \n+/**\n+ * Update the protocol in Verbs IPv4/IPv6 spec.\n+ *\n+ * @param[in, out] attr\n+ * Pointer to Verbs attributes structure.\n+ * @param[in] search\n+ * Specification type to search in order to update the IP protocol.\n+ * @param[in] protocol\n+ * Protocol value to set if none is present in the specification.\n+ */\n+static void\n+mlx5_flow_item_gre_ip_protocol_update(struct ibv_flow_attr *attr,\n+\t\t\t\t enum ibv_flow_spec_type search,\n+\t\t\t\t uint8_t protocol)\n+{\n+\tunsigned int i;\n+\tstruct ibv_spec_header *hdr = (struct ibv_spec_header *)\n+\t\t((uint8_t *)attr + sizeof(struct ibv_flow_attr));\n+\n+\tif (!attr)\n+\t\treturn;\n+\tfor (i = 0; i != attr->num_of_specs; ++i) {\n+\t\tif (hdr->type == search) {\n+\t\t\tunion {\n+\t\t\t\tstruct ibv_flow_spec_ipv4_ext *ipv4;\n+\t\t\t\tstruct ibv_flow_spec_ipv6 *ipv6;\n+\t\t\t} ip;\n+\n+\t\t\tswitch (search) {\n+\t\t\tcase IBV_FLOW_SPEC_IPV4_EXT:\n+\t\t\t\tip.ipv4 = (struct ibv_flow_spec_ipv4_ext *)hdr;\n+\t\t\t\tif (!ip.ipv4->val.proto) {\n+\t\t\t\t\tip.ipv4->val.proto = protocol;\n+\t\t\t\t\tip.ipv4->mask.proto = 0xff;\n+\t\t\t\t}\n+\t\t\t\tbreak;\n+\t\t\tcase IBV_FLOW_SPEC_IPV6:\n+\t\t\t\tip.ipv6 = (struct ibv_flow_spec_ipv6 *)hdr;\n+\t\t\t\tif (!ip.ipv6->val.next_hdr) {\n+\t\t\t\t\tip.ipv6->val.next_hdr = protocol;\n+\t\t\t\t\tip.ipv6->mask.next_hdr = 0xff;\n+\t\t\t\t}\n+\t\t\t\tbreak;\n+\t\t\tdefault:\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t\tbreak;\n+\t\t}\n+\t\thdr = (struct ibv_spec_header *)((uint8_t *)hdr + hdr->size);\n+\t}\n+}\n+\n+/**\n+ * Convert the @p item into a Verbs specification after ensuring the NIC\n+ * will understand and process it correctly.\n+ * It will also update the previous L3 layer with the protocol value matching\n+ * the GRE.\n+ * If the necessary size for the conversion is greater than the @p flow_size,\n+ * nothing is written in @p flow, the validation is still performed.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device.\n+ * @param[in] item\n+ * Item specification.\n+ * @param[in, out] flow\n+ * Pointer to flow structure.\n+ * @param[in] flow_size\n+ * Size in bytes of the available space in @p flow, if too small, nothing is\n+ * written.\n+ * @param[out] error\n+ * Pointer to error structure.\n+ *\n+ * @return\n+ * On success the number of bytes consumed/necessary, if the returned value\n+ * is lesser or equal to @p flow_size, the @p item has fully been converted,\n+ * otherwise another call with this returned memory size should be done.\n+ * On error, a negative errno value is returned and rte_errno is set.\n+ */\n+static int\n+mlx5_flow_item_gre(const struct rte_flow_item *item,\n+\t\t struct rte_flow *flow, const size_t flow_size,\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct mlx5_flow_verbs *verbs = flow->cur_verbs;\n+\tconst struct rte_flow_item_gre *spec = item->spec;\n+\tconst struct rte_flow_item_gre *mask = item->mask;\n+#ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT\n+\tunsigned int size = sizeof(struct ibv_flow_spec_gre);\n+\tstruct ibv_flow_spec_gre tunnel = {\n+\t\t.type = IBV_FLOW_SPEC_GRE,\n+\t\t.size = size,\n+\t};\n+#else\n+\tunsigned int size = sizeof(struct ibv_flow_spec_tunnel);\n+\tstruct ibv_flow_spec_tunnel tunnel = {\n+\t\t.type = IBV_FLOW_SPEC_VXLAN_TUNNEL,\n+\t\t.size = size,\n+\t};\n+#endif\n+\tint ret;\n+\n+\tif (flow->l3_protocol_en && flow->l3_protocol != MLX5_IP_PROTOCOL_GRE)\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"protocol filtering not compatible\"\n+\t\t\t\t\t \" with this GRE layer\");\n+\tif (flow->layers & MLX5_FLOW_LAYER_TUNNEL)\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"a tunnel is already present\");\n+\tif (!(flow->layers & MLX5_FLOW_LAYER_OUTER_L3))\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"L3 Layer is missing\");\n+\tif (!mask)\n+\t\tmask = &rte_flow_item_gre_mask;\n+\tret = mlx5_flow_item_acceptable\n+\t\t(item, (const uint8_t *)mask,\n+\t\t (const uint8_t *)&rte_flow_item_gre_mask,\n+\t\t sizeof(struct rte_flow_item_gre), error);\n+\tif (ret < 0)\n+\t\treturn ret;\n+#ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT\n+\tif (spec) {\n+\t\ttunnel.val.c_ks_res0_ver = spec->c_rsvd0_ver;\n+\t\ttunnel.val.protocol = spec->protocol;\n+\t\ttunnel.mask.c_ks_res0_ver = mask->c_rsvd0_ver;\n+\t\ttunnel.mask.protocol = mask->protocol;\n+\t\t/* Remove unwanted bits from values. */\n+\t\ttunnel.val.c_ks_res0_ver &= tunnel.mask.c_ks_res0_ver;\n+\t\ttunnel.val.protocol &= tunnel.mask.protocol;\n+\t\ttunnel.val.key &= tunnel.mask.key;\n+\t}\n+#else\n+\tif (spec && (spec->protocol & mask->protocol))\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"without MPLS support the\"\n+\t\t\t\t\t \" specification cannot be used for\"\n+\t\t\t\t\t \" filtering\");\n+#endif /* !HAVE_IBV_DEVICE_MPLS_SUPPORT */\n+\tif (size <= flow_size) {\n+\t\tif (flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)\n+\t\t\tmlx5_flow_item_gre_ip_protocol_update\n+\t\t\t\t(verbs->attr, IBV_FLOW_SPEC_IPV4_EXT,\n+\t\t\t\t MLX5_IP_PROTOCOL_GRE);\n+\t\telse\n+\t\t\tmlx5_flow_item_gre_ip_protocol_update\n+\t\t\t\t(verbs->attr, IBV_FLOW_SPEC_IPV6,\n+\t\t\t\t MLX5_IP_PROTOCOL_GRE);\n+\t\tmlx5_flow_spec_verbs_add(flow, &tunnel, size);\n+\t\tflow->cur_verbs->attr->priority = MLX5_PRIORITY_MAP_L2;\n+\t}\n+\tflow->layers |= MLX5_FLOW_LAYER_GRE;\n+\treturn size;\n+}\n+\n /**\n * Convert the @p pattern into a Verbs specifications after ensuring the NIC\n * will understand and process it correctly.\n@@ -1471,6 +1657,9 @@ mlx5_flow_items(struct rte_eth_dev *dev,\n \t\t\tret = mlx5_flow_item_vxlan_gpe(dev, pattern, flow,\n \t\t\t\t\t\t remain, error);\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_GRE:\n+\t\t\tret = mlx5_flow_item_gre(pattern, flow, remain, error);\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex e97f5766c..53992e8db 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -35,7 +35,7 @@\n #include \"mlx5_prm.h\"\n \n /* Support tunnel matching. */\n-#define MLX5_FLOW_TUNNEL 2\n+#define MLX5_FLOW_TUNNEL 3\n \n struct mlx5_rxq_stats {\n \tunsigned int idx; /**< Mapping index. */\n", "prefixes": [ "v3", "19/21" ] }