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GET /api/patches/42564/?format=api
http://patches.dpdk.org/api/patches/42564/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1530906406-289697-4-git-send-email-yipeng1.wang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1530906406-289697-4-git-send-email-yipeng1.wang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1530906406-289697-4-git-send-email-yipeng1.wang@intel.com", "date": "2018-07-06T19:46:41", "name": "[v3,3/8] hash: fix to have more accurate key slot size", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "28cfd0c03c0a3208e1735cf4c4b4fd4d7c9a43d2", "submitter": { "id": 754, "url": "http://patches.dpdk.org/api/people/754/?format=api", "name": "Wang, Yipeng1", "email": "yipeng1.wang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1530906406-289697-4-git-send-email-yipeng1.wang@intel.com/mbox/", "series": [ { "id": 463, "url": "http://patches.dpdk.org/api/series/463/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=463", "date": "2018-07-06T19:46:38", "name": "Add read-write concurrency to rte_hash library", "version": 3, "mbox": "http://patches.dpdk.org/series/463/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/42564/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/42564/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 21ACB1BE17;\n\tSat, 7 Jul 2018 04:53:57 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id 29E741BE0C\n\tfor <dev@dpdk.org>; Sat, 7 Jul 2018 04:53:55 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t06 Jul 2018 19:53:55 -0700", "from skx-yipeng.jf.intel.com ([10.54.81.175])\n\tby FMSMGA003.fm.intel.com with ESMTP; 06 Jul 2018 19:53:44 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.51,319,1526367600\"; d=\"scan'208\";a=\"62888540\"", "From": "Yipeng Wang <yipeng1.wang@intel.com>", "To": "pablo.de.lara.guarch@intel.com", "Cc": "dev@dpdk.org, yipeng1.wang@intel.com, bruce.richardson@intel.com,\n\thonnappa.nagarahalli@arm.com, vguvva@caviumnetworks.com,\n\tbrijesh.s.singh@gmail.com", "Date": "Fri, 6 Jul 2018 12:46:41 -0700", "Message-Id": "<1530906406-289697-4-git-send-email-yipeng1.wang@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1530906406-289697-1-git-send-email-yipeng1.wang@intel.com>", "References": "<1528455078-328182-1-git-send-email-yipeng1.wang@intel.com>\n\t<1530906406-289697-1-git-send-email-yipeng1.wang@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 3/8] hash: fix to have more accurate key slot\n\tsize", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This commit calculates the needed key slot size more\naccurately. The previous local cache fix requires\nthe free slot ring to be larger than actually needed.\nThe calculation of the value is inaccurate.\n\nFixes: 5915699153d7 (\"hash: fix scaling by reducing contention\")\nCc: stable@dpdk.org\n\nSigned-off-by: Yipeng Wang <yipeng1.wang@intel.com>\n---\n lib/librte_hash/rte_cuckoo_hash.c | 16 +++++++++++-----\n 1 file changed, 11 insertions(+), 5 deletions(-)", "diff": "diff --git a/lib/librte_hash/rte_cuckoo_hash.c b/lib/librte_hash/rte_cuckoo_hash.c\nindex 80dcf41..11602af 100644\n--- a/lib/librte_hash/rte_cuckoo_hash.c\n+++ b/lib/librte_hash/rte_cuckoo_hash.c\n@@ -126,13 +126,13 @@ rte_hash_create(const struct rte_hash_parameters *params)\n \t\t * except for the first cache\n \t\t */\n \t\tnum_key_slots = params->entries + (RTE_MAX_LCORE - 1) *\n-\t\t\t\t\tLCORE_CACHE_SIZE + 1;\n+\t\t\t\t\t(LCORE_CACHE_SIZE - 1) + 1;\n \telse\n \t\tnum_key_slots = params->entries + 1;\n \n \tsnprintf(ring_name, sizeof(ring_name), \"HT_%s\", params->name);\n \t/* Create ring (Dummy slot index is not enqueued) */\n-\tr = rte_ring_create(ring_name, rte_align32pow2(num_key_slots - 1),\n+\tr = rte_ring_create(ring_name, rte_align32pow2(num_key_slots),\n \t\t\tparams->socket_id, 0);\n \tif (r == NULL) {\n \t\tRTE_LOG(ERR, HASH, \"memory allocation failed\\n\");\n@@ -291,7 +291,7 @@ rte_hash_create(const struct rte_hash_parameters *params)\n \t\th->add_key = ADD_KEY_SINGLEWRITER;\n \n \t/* Populate free slots ring. Entry zero is reserved for key misses. */\n-\tfor (i = 1; i < params->entries + 1; i++)\n+\tfor (i = 1; i < num_key_slots; i++)\n \t\trte_ring_sp_enqueue(r, (void *)((uintptr_t) i));\n \n \tte->data = (void *) h;\n@@ -373,7 +373,7 @@ void\n rte_hash_reset(struct rte_hash *h)\n {\n \tvoid *ptr;\n-\tunsigned i;\n+\tuint32_t tot_ring_cnt, i;\n \n \tif (h == NULL)\n \t\treturn;\n@@ -386,7 +386,13 @@ rte_hash_reset(struct rte_hash *h)\n \t\trte_pause();\n \n \t/* Repopulate the free slots ring. Entry zero is reserved for key misses */\n-\tfor (i = 1; i < h->entries + 1; i++)\n+\tif (h->hw_trans_mem_support)\n+\t\ttot_ring_cnt = h->entries + (RTE_MAX_LCORE - 1) *\n+\t\t\t\t\t(LCORE_CACHE_SIZE - 1);\n+\telse\n+\t\ttot_ring_cnt = h->entries;\n+\n+\tfor (i = 1; i < tot_ring_cnt + 1; i++)\n \t\trte_ring_sp_enqueue(h->free_slots, (void *)((uintptr_t) i));\n \n \tif (h->hw_trans_mem_support) {\n", "prefixes": [ "v3", "3/8" ] }{ "id": 42564, "url": "