Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 42540,
    "url": "http://patches.dpdk.org/api/patches/42540/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20180706172116.50951-2-jasvinder.singh@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20180706172116.50951-2-jasvinder.singh@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20180706172116.50951-2-jasvinder.singh@intel.com",
    "date": "2018-07-06T17:20:54",
    "name": "[v5,01/23] net/softnic: restructuring",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "7c112257299bdd38ea4115f14871e161b2b8cfd1",
    "submitter": {
        "id": 285,
        "url": "http://patches.dpdk.org/api/people/285/?format=api",
        "name": "Jasvinder Singh",
        "email": "jasvinder.singh@intel.com"
    },
    "delegate": {
        "id": 10018,
        "url": "http://patches.dpdk.org/api/users/10018/?format=api",
        "username": "cristian_dumitrescu",
        "first_name": "Cristian",
        "last_name": "Dumitrescu",
        "email": "cristian.dumitrescu@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20180706172116.50951-2-jasvinder.singh@intel.com/mbox/",
    "series": [
        {
            "id": 460,
            "url": "http://patches.dpdk.org/api/series/460/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=460",
            "date": "2018-07-06T17:20:53",
            "name": "net/softnic: refactoring",
            "version": 5,
            "mbox": "http://patches.dpdk.org/series/460/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/42540/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/42540/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 544111BEF0;\n\tFri,  6 Jul 2018 19:21:34 +0200 (CEST)",
            "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id 3DD911BEBF\n\tfor <dev@dpdk.org>; Fri,  6 Jul 2018 19:21:30 +0200 (CEST)",
            "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t06 Jul 2018 10:21:28 -0700",
            "from silpixa00381635.ir.intel.com (HELO\n\tsilpixa00381635.ger.corp.intel.com) ([10.237.222.149])\n\tby orsmga003.jf.intel.com with ESMTP; 06 Jul 2018 10:21:18 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.51,317,1526367600\"; d=\"scan'208\";a=\"64955256\"",
        "From": "Jasvinder Singh <jasvinder.singh@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "cristian.dumitrescu@intel.com",
        "Date": "Fri,  6 Jul 2018 18:20:54 +0100",
        "Message-Id": "<20180706172116.50951-2-jasvinder.singh@intel.com>",
        "X-Mailer": "git-send-email 2.9.3",
        "In-Reply-To": "<20180706172116.50951-1-jasvinder.singh@intel.com>",
        "References": "<20180705154754.147420-2-jasvinder.singh@intel.com>\n\t<20180706172116.50951-1-jasvinder.singh@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v5 01/23] net/softnic: restructuring",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Rework the softnic implementation to have flexiblity in enabling\nmore features to its receive and transmit data path.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\nSigned-off-by: Jasvinder Singh <jasvinder.singh@intel.com>\n---\n drivers/net/softnic/rte_eth_softnic.c           | 607 ++++--------------------\n drivers/net/softnic/rte_eth_softnic.h           |  34 +-\n drivers/net/softnic/rte_eth_softnic_internals.h | 101 +---\n drivers/net/softnic/rte_eth_softnic_tm.c        | 100 +---\n 4 files changed, 120 insertions(+), 722 deletions(-)",
    "diff": "diff --git a/drivers/net/softnic/rte_eth_softnic.c b/drivers/net/softnic/rte_eth_softnic.c\nindex 6b3c13e..ccf3bd4 100644\n--- a/drivers/net/softnic/rte_eth_softnic.c\n+++ b/drivers/net/softnic/rte_eth_softnic.c\n@@ -13,40 +13,17 @@\n #include <rte_kvargs.h>\n #include <rte_errno.h>\n #include <rte_ring.h>\n-#include <rte_sched.h>\n #include <rte_tm_driver.h>\n \n #include \"rte_eth_softnic.h\"\n #include \"rte_eth_softnic_internals.h\"\n \n-#define DEV_HARD(p)\t\t\t\t\t\\\n-\t(&rte_eth_devices[p->hard.port_id])\n-\n-#define PMD_PARAM_SOFT_TM\t\t\t\t\t\"soft_tm\"\n-#define PMD_PARAM_SOFT_TM_RATE\t\t\t\t\"soft_tm_rate\"\n-#define PMD_PARAM_SOFT_TM_NB_QUEUES\t\t\t\"soft_tm_nb_queues\"\n-#define PMD_PARAM_SOFT_TM_QSIZE0\t\t\t\"soft_tm_qsize0\"\n-#define PMD_PARAM_SOFT_TM_QSIZE1\t\t\t\"soft_tm_qsize1\"\n-#define PMD_PARAM_SOFT_TM_QSIZE2\t\t\t\"soft_tm_qsize2\"\n-#define PMD_PARAM_SOFT_TM_QSIZE3\t\t\t\"soft_tm_qsize3\"\n-#define PMD_PARAM_SOFT_TM_ENQ_BSZ\t\t\t\"soft_tm_enq_bsz\"\n-#define PMD_PARAM_SOFT_TM_DEQ_BSZ\t\t\t\"soft_tm_deq_bsz\"\n-\n-#define PMD_PARAM_HARD_NAME\t\t\t\t\t\"hard_name\"\n-#define PMD_PARAM_HARD_TX_QUEUE_ID\t\t\t\"hard_tx_queue_id\"\n+#define PMD_PARAM_FIRMWARE                                 \"firmware\"\n+#define PMD_PARAM_CPU_ID                                   \"cpu_id\"\n \n static const char *pmd_valid_args[] = {\n-\tPMD_PARAM_SOFT_TM,\n-\tPMD_PARAM_SOFT_TM_RATE,\n-\tPMD_PARAM_SOFT_TM_NB_QUEUES,\n-\tPMD_PARAM_SOFT_TM_QSIZE0,\n-\tPMD_PARAM_SOFT_TM_QSIZE1,\n-\tPMD_PARAM_SOFT_TM_QSIZE2,\n-\tPMD_PARAM_SOFT_TM_QSIZE3,\n-\tPMD_PARAM_SOFT_TM_ENQ_BSZ,\n-\tPMD_PARAM_SOFT_TM_DEQ_BSZ,\n-\tPMD_PARAM_HARD_NAME,\n-\tPMD_PARAM_HARD_TX_QUEUE_ID,\n+\tPMD_PARAM_FIRMWARE,\n+\tPMD_PARAM_CPU_ID,\n \tNULL\n };\n \n@@ -81,50 +58,35 @@ pmd_dev_infos_get(struct rte_eth_dev *dev __rte_unused,\n }\n \n static int\n-pmd_dev_configure(struct rte_eth_dev *dev)\n+pmd_dev_configure(struct rte_eth_dev *dev __rte_unused)\n {\n-\tstruct pmd_internals *p = dev->data->dev_private;\n-\tstruct rte_eth_dev *hard_dev = DEV_HARD(p);\n-\n-\tif (dev->data->nb_rx_queues > hard_dev->data->nb_rx_queues)\n-\t\treturn -1;\n-\n-\tif (p->params.hard.tx_queue_id >= hard_dev->data->nb_tx_queues)\n-\t\treturn -1;\n-\n \treturn 0;\n }\n \n static int\n pmd_rx_queue_setup(struct rte_eth_dev *dev,\n \tuint16_t rx_queue_id,\n-\tuint16_t nb_rx_desc __rte_unused,\n+\tuint16_t nb_rx_desc,\n \tunsigned int socket_id,\n \tconst struct rte_eth_rxconf *rx_conf __rte_unused,\n \tstruct rte_mempool *mb_pool __rte_unused)\n {\n-\tstruct pmd_internals *p = dev->data->dev_private;\n-\n-\tif (p->params.soft.intrusive == 0) {\n-\t\tstruct pmd_rx_queue *rxq;\n-\n-\t\trxq = rte_zmalloc_socket(p->params.soft.name,\n-\t\t\tsizeof(struct pmd_rx_queue), 0, socket_id);\n-\t\tif (rxq == NULL)\n-\t\t\treturn -ENOMEM;\n+\tuint32_t size = RTE_ETH_NAME_MAX_LEN + strlen(\"_rxq\") + 4;\n+\tchar name[size];\n+\tstruct rte_ring *r;\n \n-\t\trxq->hard.port_id = p->hard.port_id;\n-\t\trxq->hard.rx_queue_id = rx_queue_id;\n-\t\tdev->data->rx_queues[rx_queue_id] = rxq;\n-\t} else {\n-\t\tstruct rte_eth_dev *hard_dev = DEV_HARD(p);\n-\t\tvoid *rxq = hard_dev->data->rx_queues[rx_queue_id];\n+\tsnprintf(name, sizeof(name), \"%s_rxq%04x\",\n+\t\tdev->data->name,\n+\t\trx_queue_id);\n \n-\t\tif (rxq == NULL)\n-\t\t\treturn -1;\n+\tr = rte_ring_create(name,\n+\t\tnb_rx_desc,\n+\t\tsocket_id,\n+\t\tRING_F_SP_ENQ | RING_F_SC_DEQ);\n+\tif (r == NULL)\n+\t\treturn -1;\n \n-\t\tdev->data->rx_queues[rx_queue_id] = rxq;\n-\t}\n+\tdev->data->rx_queues[rx_queue_id] = r;\n \treturn 0;\n }\n \n@@ -140,8 +102,12 @@ pmd_tx_queue_setup(struct rte_eth_dev *dev,\n \tstruct rte_ring *r;\n \n \tsnprintf(name, sizeof(name), \"%s_txq%04x\",\n-\t\tdev->data->name, tx_queue_id);\n-\tr = rte_ring_create(name, nb_tx_desc, socket_id,\n+\t\tdev->data->name,\n+\t\ttx_queue_id);\n+\n+\tr = rte_ring_create(name,\n+\t\tnb_tx_desc,\n+\t\tsocket_id,\n \t\tRING_F_SP_ENQ | RING_F_SC_DEQ);\n \tif (r == NULL)\n \t\treturn -1;\n@@ -153,36 +119,15 @@ pmd_tx_queue_setup(struct rte_eth_dev *dev,\n static int\n pmd_dev_start(struct rte_eth_dev *dev)\n {\n-\tstruct pmd_internals *p = dev->data->dev_private;\n-\n-\tif (tm_used(dev)) {\n-\t\tint status = tm_start(p);\n-\n-\t\tif (status)\n-\t\t\treturn status;\n-\t}\n-\n \tdev->data->dev_link.link_status = ETH_LINK_UP;\n \n-\tif (p->params.soft.intrusive) {\n-\t\tstruct rte_eth_dev *hard_dev = DEV_HARD(p);\n-\n-\t\t/* The hard_dev->rx_pkt_burst should be stable by now */\n-\t\tdev->rx_pkt_burst = hard_dev->rx_pkt_burst;\n-\t}\n-\n \treturn 0;\n }\n \n static void\n pmd_dev_stop(struct rte_eth_dev *dev)\n {\n-\tstruct pmd_internals *p = dev->data->dev_private;\n-\n \tdev->data->dev_link.link_status = ETH_LINK_DOWN;\n-\n-\tif (tm_used(dev))\n-\t\ttm_stop(p);\n }\n \n static void\n@@ -190,6 +135,10 @@ pmd_dev_close(struct rte_eth_dev *dev)\n {\n \tuint32_t i;\n \n+\t/* RX queues */\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n+\t\trte_ring_free((struct rte_ring *)dev->data->rx_queues[i]);\n+\n \t/* TX queues */\n \tfor (i = 0; i < dev->data->nb_tx_queues; i++)\n \t\trte_ring_free((struct rte_ring *)dev->data->tx_queues[i]);\n@@ -203,10 +152,9 @@ pmd_link_update(struct rte_eth_dev *dev __rte_unused,\n }\n \n static int\n-pmd_tm_ops_get(struct rte_eth_dev *dev, void *arg)\n+pmd_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg)\n {\n-\t*(const struct rte_tm_ops **)arg =\n-\t\t(tm_enabled(dev)) ? &pmd_tm_ops : NULL;\n+\t*(const struct rte_tm_ops **)arg = NULL;\n \n \treturn 0;\n }\n@@ -228,12 +176,10 @@ pmd_rx_pkt_burst(void *rxq,\n \tstruct rte_mbuf **rx_pkts,\n \tuint16_t nb_pkts)\n {\n-\tstruct pmd_rx_queue *rx_queue = rxq;\n-\n-\treturn rte_eth_rx_burst(rx_queue->hard.port_id,\n-\t\trx_queue->hard.rx_queue_id,\n-\t\trx_pkts,\n-\t\tnb_pkts);\n+\treturn (uint16_t)rte_ring_sc_dequeue_burst(rxq,\n+\t\t(void **)rx_pkts,\n+\t\tnb_pkts,\n+\t\tNULL);\n }\n \n static uint16_t\n@@ -241,148 +187,12 @@ pmd_tx_pkt_burst(void *txq,\n \tstruct rte_mbuf **tx_pkts,\n \tuint16_t nb_pkts)\n {\n-\treturn (uint16_t)rte_ring_enqueue_burst(txq,\n+\treturn (uint16_t)rte_ring_sp_enqueue_burst(txq,\n \t\t(void **)tx_pkts,\n \t\tnb_pkts,\n \t\tNULL);\n }\n \n-static __rte_always_inline int\n-run_default(struct rte_eth_dev *dev)\n-{\n-\tstruct pmd_internals *p = dev->data->dev_private;\n-\n-\t/* Persistent context: Read Only (update not required) */\n-\tstruct rte_mbuf **pkts = p->soft.def.pkts;\n-\tuint16_t nb_tx_queues = dev->data->nb_tx_queues;\n-\n-\t/* Persistent context: Read - Write (update required) */\n-\tuint32_t txq_pos = p->soft.def.txq_pos;\n-\tuint32_t pkts_len = p->soft.def.pkts_len;\n-\tuint32_t flush_count = p->soft.def.flush_count;\n-\n-\t/* Not part of the persistent context */\n-\tuint32_t pos;\n-\tuint16_t i;\n-\n-\t/* Soft device TXQ read, Hard device TXQ write */\n-\tfor (i = 0; i < nb_tx_queues; i++) {\n-\t\tstruct rte_ring *txq = dev->data->tx_queues[txq_pos];\n-\n-\t\t/* Read soft device TXQ burst to packet enqueue buffer */\n-\t\tpkts_len += rte_ring_sc_dequeue_burst(txq,\n-\t\t\t(void **)&pkts[pkts_len],\n-\t\t\tDEFAULT_BURST_SIZE,\n-\t\t\tNULL);\n-\n-\t\t/* Increment soft device TXQ */\n-\t\ttxq_pos++;\n-\t\tif (txq_pos >= nb_tx_queues)\n-\t\t\ttxq_pos = 0;\n-\n-\t\t/* Hard device TXQ write when complete burst is available */\n-\t\tif (pkts_len >= DEFAULT_BURST_SIZE) {\n-\t\t\tfor (pos = 0; pos < pkts_len; )\n-\t\t\t\tpos += rte_eth_tx_burst(p->hard.port_id,\n-\t\t\t\t\tp->params.hard.tx_queue_id,\n-\t\t\t\t\t&pkts[pos],\n-\t\t\t\t\t(uint16_t)(pkts_len - pos));\n-\n-\t\t\tpkts_len = 0;\n-\t\t\tflush_count = 0;\n-\t\t\tbreak;\n-\t\t}\n-\t}\n-\n-\tif (flush_count >= FLUSH_COUNT_THRESHOLD) {\n-\t\tfor (pos = 0; pos < pkts_len; )\n-\t\t\tpos += rte_eth_tx_burst(p->hard.port_id,\n-\t\t\t\tp->params.hard.tx_queue_id,\n-\t\t\t\t&pkts[pos],\n-\t\t\t\t(uint16_t)(pkts_len - pos));\n-\n-\t\tpkts_len = 0;\n-\t\tflush_count = 0;\n-\t}\n-\n-\tp->soft.def.txq_pos = txq_pos;\n-\tp->soft.def.pkts_len = pkts_len;\n-\tp->soft.def.flush_count = flush_count + 1;\n-\n-\treturn 0;\n-}\n-\n-static __rte_always_inline int\n-run_tm(struct rte_eth_dev *dev)\n-{\n-\tstruct pmd_internals *p = dev->data->dev_private;\n-\n-\t/* Persistent context: Read Only (update not required) */\n-\tstruct rte_sched_port *sched = p->soft.tm.sched;\n-\tstruct rte_mbuf **pkts_enq = p->soft.tm.pkts_enq;\n-\tstruct rte_mbuf **pkts_deq = p->soft.tm.pkts_deq;\n-\tuint32_t enq_bsz = p->params.soft.tm.enq_bsz;\n-\tuint32_t deq_bsz = p->params.soft.tm.deq_bsz;\n-\tuint16_t nb_tx_queues = dev->data->nb_tx_queues;\n-\n-\t/* Persistent context: Read - Write (update required) */\n-\tuint32_t txq_pos = p->soft.tm.txq_pos;\n-\tuint32_t pkts_enq_len = p->soft.tm.pkts_enq_len;\n-\tuint32_t flush_count = p->soft.tm.flush_count;\n-\n-\t/* Not part of the persistent context */\n-\tuint32_t pkts_deq_len, pos;\n-\tuint16_t i;\n-\n-\t/* Soft device TXQ read, TM enqueue */\n-\tfor (i = 0; i < nb_tx_queues; i++) {\n-\t\tstruct rte_ring *txq = dev->data->tx_queues[txq_pos];\n-\n-\t\t/* Read TXQ burst to packet enqueue buffer */\n-\t\tpkts_enq_len += rte_ring_sc_dequeue_burst(txq,\n-\t\t\t(void **)&pkts_enq[pkts_enq_len],\n-\t\t\tenq_bsz,\n-\t\t\tNULL);\n-\n-\t\t/* Increment TXQ */\n-\t\ttxq_pos++;\n-\t\tif (txq_pos >= nb_tx_queues)\n-\t\t\ttxq_pos = 0;\n-\n-\t\t/* TM enqueue when complete burst is available */\n-\t\tif (pkts_enq_len >= enq_bsz) {\n-\t\t\trte_sched_port_enqueue(sched, pkts_enq, pkts_enq_len);\n-\n-\t\t\tpkts_enq_len = 0;\n-\t\t\tflush_count = 0;\n-\t\t\tbreak;\n-\t\t}\n-\t}\n-\n-\tif (flush_count >= FLUSH_COUNT_THRESHOLD) {\n-\t\tif (pkts_enq_len)\n-\t\t\trte_sched_port_enqueue(sched, pkts_enq, pkts_enq_len);\n-\n-\t\tpkts_enq_len = 0;\n-\t\tflush_count = 0;\n-\t}\n-\n-\tp->soft.tm.txq_pos = txq_pos;\n-\tp->soft.tm.pkts_enq_len = pkts_enq_len;\n-\tp->soft.tm.flush_count = flush_count + 1;\n-\n-\t/* TM dequeue, Hard device TXQ write */\n-\tpkts_deq_len = rte_sched_port_dequeue(sched, pkts_deq, deq_bsz);\n-\n-\tfor (pos = 0; pos < pkts_deq_len; )\n-\t\tpos += rte_eth_tx_burst(p->hard.port_id,\n-\t\t\tp->params.hard.tx_queue_id,\n-\t\t\t&pkts_deq[pos],\n-\t\t\t(uint16_t)(pkts_deq_len - pos));\n-\n-\treturn 0;\n-}\n-\n int\n rte_pmd_softnic_run(uint16_t port_id)\n {\n@@ -392,92 +202,23 @@ rte_pmd_softnic_run(uint16_t port_id)\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);\n #endif\n \n-\treturn (tm_used(dev)) ? run_tm(dev) : run_default(dev);\n-}\n-\n-static struct ether_addr eth_addr = { .addr_bytes = {0} };\n-\n-static uint32_t\n-eth_dev_speed_max_mbps(uint32_t speed_capa)\n-{\n-\tuint32_t rate_mbps[32] = {\n-\t\tETH_SPEED_NUM_NONE,\n-\t\tETH_SPEED_NUM_10M,\n-\t\tETH_SPEED_NUM_10M,\n-\t\tETH_SPEED_NUM_100M,\n-\t\tETH_SPEED_NUM_100M,\n-\t\tETH_SPEED_NUM_1G,\n-\t\tETH_SPEED_NUM_2_5G,\n-\t\tETH_SPEED_NUM_5G,\n-\t\tETH_SPEED_NUM_10G,\n-\t\tETH_SPEED_NUM_20G,\n-\t\tETH_SPEED_NUM_25G,\n-\t\tETH_SPEED_NUM_40G,\n-\t\tETH_SPEED_NUM_50G,\n-\t\tETH_SPEED_NUM_56G,\n-\t\tETH_SPEED_NUM_100G,\n-\t};\n-\n-\tuint32_t pos = (speed_capa) ? (31 - __builtin_clz(speed_capa)) : 0;\n-\treturn rate_mbps[pos];\n-}\n-\n-static int\n-default_init(struct pmd_internals *p,\n-\tstruct pmd_params *params,\n-\tint numa_node)\n-{\n-\tp->soft.def.pkts = rte_zmalloc_socket(params->soft.name,\n-\t\t2 * DEFAULT_BURST_SIZE * sizeof(struct rte_mbuf *),\n-\t\t0,\n-\t\tnuma_node);\n-\n-\tif (p->soft.def.pkts == NULL)\n-\t\treturn -ENOMEM;\n-\n+\tdev = dev;\n \treturn 0;\n }\n \n-static void\n-default_free(struct pmd_internals *p)\n-{\n-\trte_free(p->soft.def.pkts);\n-}\n-\n static void *\n-pmd_init(struct pmd_params *params, int numa_node)\n+pmd_init(struct pmd_params *params)\n {\n \tstruct pmd_internals *p;\n-\tint status;\n \n-\tp = rte_zmalloc_socket(params->soft.name,\n+\tp = rte_zmalloc_socket(params->name,\n \t\tsizeof(struct pmd_internals),\n \t\t0,\n-\t\tnuma_node);\n+\t\tparams->cpu_id);\n \tif (p == NULL)\n \t\treturn NULL;\n \n \tmemcpy(&p->params, params, sizeof(p->params));\n-\trte_eth_dev_get_port_by_name(params->hard.name, &p->hard.port_id);\n-\n-\t/* Default */\n-\tstatus = default_init(p, params, numa_node);\n-\tif (status) {\n-\t\tfree(p->params.hard.name);\n-\t\trte_free(p);\n-\t\treturn NULL;\n-\t}\n-\n-\t/* Traffic Management (TM)*/\n-\tif (params->soft.flags & PMD_FEATURE_TM) {\n-\t\tstatus = tm_init(p, params, numa_node);\n-\t\tif (status) {\n-\t\t\tdefault_free(p);\n-\t\t\tfree(p->params.hard.name);\n-\t\t\trte_free(p);\n-\t\t\treturn NULL;\n-\t\t}\n-\t}\n \n \treturn p;\n }\n@@ -485,57 +226,44 @@ pmd_init(struct pmd_params *params, int numa_node)\n static void\n pmd_free(struct pmd_internals *p)\n {\n-\tif (p->params.soft.flags & PMD_FEATURE_TM)\n-\t\ttm_free(p);\n-\n-\tdefault_free(p);\n-\n-\tfree(p->params.hard.name);\n \trte_free(p);\n }\n \n+static struct ether_addr eth_addr = {\n+\t.addr_bytes = {0},\n+};\n+\n static int\n pmd_ethdev_register(struct rte_vdev_device *vdev,\n \tstruct pmd_params *params,\n \tvoid *dev_private)\n {\n-\tstruct rte_eth_dev_info hard_info;\n-\tstruct rte_eth_dev *soft_dev;\n-\tuint32_t hard_speed;\n-\tint numa_node;\n-\tuint16_t hard_port_id;\n-\n-\trte_eth_dev_get_port_by_name(params->hard.name, &hard_port_id);\n-\trte_eth_dev_info_get(hard_port_id, &hard_info);\n-\thard_speed = eth_dev_speed_max_mbps(hard_info.speed_capa);\n-\tnuma_node = rte_eth_dev_socket_id(hard_port_id);\n+\tstruct rte_eth_dev *dev;\n \n \t/* Ethdev entry allocation */\n-\tsoft_dev = rte_eth_dev_allocate(params->soft.name);\n-\tif (!soft_dev)\n+\tdev = rte_eth_dev_allocate(params->name);\n+\tif (!dev)\n \t\treturn -ENOMEM;\n \n \t/* dev */\n-\tsoft_dev->rx_pkt_burst = (params->soft.intrusive) ?\n-\t\tNULL : /* set up later */\n-\t\tpmd_rx_pkt_burst;\n-\tsoft_dev->tx_pkt_burst = pmd_tx_pkt_burst;\n-\tsoft_dev->tx_pkt_prepare = NULL;\n-\tsoft_dev->dev_ops = &pmd_ops;\n-\tsoft_dev->device = &vdev->device;\n+\tdev->rx_pkt_burst = pmd_rx_pkt_burst;\n+\tdev->tx_pkt_burst = pmd_tx_pkt_burst;\n+\tdev->tx_pkt_prepare = NULL;\n+\tdev->dev_ops = &pmd_ops;\n+\tdev->device = &vdev->device;\n \n \t/* dev->data */\n-\tsoft_dev->data->dev_private = dev_private;\n-\tsoft_dev->data->dev_link.link_speed = hard_speed;\n-\tsoft_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;\n-\tsoft_dev->data->dev_link.link_autoneg = ETH_LINK_FIXED;\n-\tsoft_dev->data->dev_link.link_status = ETH_LINK_DOWN;\n-\tsoft_dev->data->mac_addrs = &eth_addr;\n-\tsoft_dev->data->promiscuous = 1;\n-\tsoft_dev->data->kdrv = RTE_KDRV_NONE;\n-\tsoft_dev->data->numa_node = numa_node;\n-\n-\trte_eth_dev_probing_finish(soft_dev);\n+\tdev->data->dev_private = dev_private;\n+\tdev->data->dev_link.link_speed = ETH_SPEED_NUM_100G;\n+\tdev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;\n+\tdev->data->dev_link.link_autoneg = ETH_LINK_FIXED;\n+\tdev->data->dev_link.link_status = ETH_LINK_DOWN;\n+\tdev->data->mac_addrs = &eth_addr;\n+\tdev->data->promiscuous = 1;\n+\tdev->data->kdrv = RTE_KDRV_NONE;\n+\tdev->data->numa_node = params->cpu_id;\n+\n+\trte_eth_dev_probing_finish(dev);\n \n \treturn 0;\n }\n@@ -566,10 +294,10 @@ get_uint32(const char *key __rte_unused, const char *value, void *extra_args)\n }\n \n static int\n-pmd_parse_args(struct pmd_params *p, const char *name, const char *params)\n+pmd_parse_args(struct pmd_params *p, const char *params)\n {\n \tstruct rte_kvargs *kvlist;\n-\tint i, ret;\n+\tint ret = 0;\n \n \tkvlist = rte_kvargs_parse(params, pmd_valid_args);\n \tif (kvlist == NULL)\n@@ -577,141 +305,21 @@ pmd_parse_args(struct pmd_params *p, const char *name, const char *params)\n \n \t/* Set default values */\n \tmemset(p, 0, sizeof(*p));\n-\tp->soft.name = name;\n-\tp->soft.intrusive = INTRUSIVE;\n-\tp->soft.tm.rate = 0;\n-\tp->soft.tm.nb_queues = SOFTNIC_SOFT_TM_NB_QUEUES;\n-\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)\n-\t\tp->soft.tm.qsize[i] = SOFTNIC_SOFT_TM_QUEUE_SIZE;\n-\tp->soft.tm.enq_bsz = SOFTNIC_SOFT_TM_ENQ_BSZ;\n-\tp->soft.tm.deq_bsz = SOFTNIC_SOFT_TM_DEQ_BSZ;\n-\tp->hard.tx_queue_id = SOFTNIC_HARD_TX_QUEUE_ID;\n-\n-\t/* SOFT: TM (optional) */\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM) == 1) {\n-\t\tchar *s;\n-\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM,\n-\t\t\t&get_string, &s);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n-\n-\t\tif (strcmp(s, \"on\") == 0)\n-\t\t\tp->soft.flags |= PMD_FEATURE_TM;\n-\t\telse if (strcmp(s, \"off\") == 0)\n-\t\t\tp->soft.flags &= ~PMD_FEATURE_TM;\n-\t\telse\n-\t\t\tret = -EINVAL;\n-\n-\t\tfree(s);\n-\t\tif (ret)\n-\t\t\tgoto out_free;\n-\t}\n-\n-\t/* SOFT: TM rate (measured in bytes/second) (optional) */\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_RATE) == 1) {\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_RATE,\n-\t\t\t&get_uint32, &p->soft.tm.rate);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n+\tp->firmware = SOFTNIC_FIRMWARE;\n+\tp->cpu_id = SOFTNIC_CPU_ID;\n \n-\t\tp->soft.flags |= PMD_FEATURE_TM;\n-\t}\n-\n-\t/* SOFT: TM number of queues (optional) */\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_NB_QUEUES) == 1) {\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_NB_QUEUES,\n-\t\t\t&get_uint32, &p->soft.tm.nb_queues);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n-\n-\t\tp->soft.flags |= PMD_FEATURE_TM;\n-\t}\n-\n-\t/* SOFT: TM queue size 0 .. 3 (optional) */\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_QSIZE0) == 1) {\n-\t\tuint32_t qsize;\n-\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_QSIZE0,\n-\t\t\t&get_uint32, &qsize);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n-\n-\t\tp->soft.tm.qsize[0] = (uint16_t)qsize;\n-\t\tp->soft.flags |= PMD_FEATURE_TM;\n-\t}\n-\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_QSIZE1) == 1) {\n-\t\tuint32_t qsize;\n-\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_QSIZE1,\n-\t\t\t&get_uint32, &qsize);\n+\t/* Firmware script (optional) */\n+\tif (rte_kvargs_count(kvlist, PMD_PARAM_FIRMWARE) == 1) {\n+\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_FIRMWARE,\n+\t\t\t&get_string, &p->firmware);\n \t\tif (ret < 0)\n \t\t\tgoto out_free;\n-\n-\t\tp->soft.tm.qsize[1] = (uint16_t)qsize;\n-\t\tp->soft.flags |= PMD_FEATURE_TM;\n \t}\n \n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_QSIZE2) == 1) {\n-\t\tuint32_t qsize;\n-\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_QSIZE2,\n-\t\t\t&get_uint32, &qsize);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n-\n-\t\tp->soft.tm.qsize[2] = (uint16_t)qsize;\n-\t\tp->soft.flags |= PMD_FEATURE_TM;\n-\t}\n-\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_QSIZE3) == 1) {\n-\t\tuint32_t qsize;\n-\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_QSIZE3,\n-\t\t\t&get_uint32, &qsize);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n-\n-\t\tp->soft.tm.qsize[3] = (uint16_t)qsize;\n-\t\tp->soft.flags |= PMD_FEATURE_TM;\n-\t}\n-\n-\t/* SOFT: TM enqueue burst size (optional) */\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_ENQ_BSZ) == 1) {\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_ENQ_BSZ,\n-\t\t\t&get_uint32, &p->soft.tm.enq_bsz);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n-\n-\t\tp->soft.flags |= PMD_FEATURE_TM;\n-\t}\n-\n-\t/* SOFT: TM dequeue burst size (optional) */\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_DEQ_BSZ) == 1) {\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_DEQ_BSZ,\n-\t\t\t&get_uint32, &p->soft.tm.deq_bsz);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n-\n-\t\tp->soft.flags |= PMD_FEATURE_TM;\n-\t}\n-\n-\t/* HARD: name (mandatory) */\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_HARD_NAME) == 1) {\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_HARD_NAME,\n-\t\t\t&get_string, &p->hard.name);\n-\t\tif (ret < 0)\n-\t\t\tgoto out_free;\n-\t} else {\n-\t\tret = -EINVAL;\n-\t\tgoto out_free;\n-\t}\n-\n-\t/* HARD: tx_queue_id (optional) */\n-\tif (rte_kvargs_count(kvlist, PMD_PARAM_HARD_TX_QUEUE_ID) == 1) {\n-\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_HARD_TX_QUEUE_ID,\n-\t\t\t&get_uint32, &p->hard.tx_queue_id);\n+\t/* CPU ID (optional) */\n+\tif (rte_kvargs_count(kvlist, PMD_PARAM_CPU_ID) == 1) {\n+\t\tret = rte_kvargs_process(kvlist, PMD_PARAM_CPU_ID,\n+\t\t\t&get_uint32, &p->cpu_id);\n \t\tif (ret < 0)\n \t\t\tgoto out_free;\n \t}\n@@ -726,68 +334,31 @@ pmd_probe(struct rte_vdev_device *vdev)\n {\n \tstruct pmd_params p;\n \tconst char *params;\n-\tint status;\n+\tint status = 0;\n \n-\tstruct rte_eth_dev_info hard_info;\n-\tuint32_t hard_speed;\n-\tuint16_t hard_port_id;\n-\tint numa_node;\n \tvoid *dev_private;\n-\tstruct rte_eth_dev *eth_dev;\n \tconst char *name = rte_vdev_device_name(vdev);\n \n \tPMD_LOG(INFO, \"Probing device \\\"%s\\\"\", name);\n \n \t/* Parse input arguments */\n \tparams = rte_vdev_device_args(vdev);\n-\n-\tif (rte_eal_process_type() == RTE_PROC_SECONDARY &&\n-\t    strlen(params) == 0) {\n-\t\teth_dev = rte_eth_dev_attach_secondary(name);\n-\t\tif (!eth_dev) {\n-\t\t\tPMD_LOG(ERR, \"Failed to probe %s\", name);\n-\t\t\treturn -1;\n-\t\t}\n-\t\t/* TODO: request info from primary to set up Rx and Tx */\n-\t\teth_dev->dev_ops = &pmd_ops;\n-\t\trte_eth_dev_probing_finish(eth_dev);\n-\t\treturn 0;\n-\t}\n-\n \tif (!params)\n \t\treturn -EINVAL;\n \n-\tstatus = pmd_parse_args(&p, rte_vdev_device_name(vdev), params);\n+\tstatus = pmd_parse_args(&p, params);\n \tif (status)\n \t\treturn status;\n \n-\t/* Check input arguments */\n-\tif (rte_eth_dev_get_port_by_name(p.hard.name, &hard_port_id))\n-\t\treturn -EINVAL;\n-\n-\trte_eth_dev_info_get(hard_port_id, &hard_info);\n-\thard_speed = eth_dev_speed_max_mbps(hard_info.speed_capa);\n-\tnuma_node = rte_eth_dev_socket_id(hard_port_id);\n-\n-\tif (p.hard.tx_queue_id >= hard_info.max_tx_queues)\n-\t\treturn -EINVAL;\n-\n-\tif (p.soft.flags & PMD_FEATURE_TM) {\n-\t\tstatus = tm_params_check(&p, hard_speed);\n-\n-\t\tif (status)\n-\t\t\treturn status;\n-\t}\n+\tp.name = name;\n \n \t/* Allocate and initialize soft ethdev private data */\n-\tdev_private = pmd_init(&p, numa_node);\n+\tdev_private = pmd_init(&p);\n \tif (dev_private == NULL)\n \t\treturn -ENOMEM;\n \n \t/* Register soft ethdev */\n-\tPMD_LOG(INFO,\n-\t\t\"Creating soft ethdev \\\"%s\\\" for hard ethdev \\\"%s\\\"\",\n-\t\tp.soft.name, p.hard.name);\n+\tPMD_LOG(INFO, \"Creating soft ethdev \\\"%s\\\"\", p.name);\n \n \tstatus = pmd_ethdev_register(vdev, &p, dev_private);\n \tif (status) {\n@@ -807,8 +378,7 @@ pmd_remove(struct rte_vdev_device *vdev)\n \tif (!vdev)\n \t\treturn -EINVAL;\n \n-\tPMD_LOG(INFO, \"Removing device \\\"%s\\\"\",\n-\t\trte_vdev_device_name(vdev));\n+\tPMD_LOG(INFO, \"Removing device \\\"%s\\\"\", rte_vdev_device_name(vdev));\n \n \t/* Find the ethdev entry */\n \tdev = rte_eth_dev_allocated(rte_vdev_device_name(vdev));\n@@ -817,9 +387,9 @@ pmd_remove(struct rte_vdev_device *vdev)\n \tp = dev->data->dev_private;\n \n \t/* Free device data structures*/\n-\tpmd_free(p);\n \trte_free(dev->data);\n \trte_eth_dev_release_port(dev);\n+\tpmd_free(p);\n \n \treturn 0;\n }\n@@ -831,17 +401,8 @@ static struct rte_vdev_driver pmd_softnic_drv = {\n \n RTE_PMD_REGISTER_VDEV(net_softnic, pmd_softnic_drv);\n RTE_PMD_REGISTER_PARAM_STRING(net_softnic,\n-\tPMD_PARAM_SOFT_TM\t \"=on|off \"\n-\tPMD_PARAM_SOFT_TM_RATE \"=<int> \"\n-\tPMD_PARAM_SOFT_TM_NB_QUEUES \"=<int> \"\n-\tPMD_PARAM_SOFT_TM_QSIZE0 \"=<int> \"\n-\tPMD_PARAM_SOFT_TM_QSIZE1 \"=<int> \"\n-\tPMD_PARAM_SOFT_TM_QSIZE2 \"=<int> \"\n-\tPMD_PARAM_SOFT_TM_QSIZE3 \"=<int> \"\n-\tPMD_PARAM_SOFT_TM_ENQ_BSZ \"=<int> \"\n-\tPMD_PARAM_SOFT_TM_DEQ_BSZ \"=<int> \"\n-\tPMD_PARAM_HARD_NAME \"=<string> \"\n-\tPMD_PARAM_HARD_TX_QUEUE_ID \"=<int>\");\n+\tPMD_PARAM_FIRMWARE \"=<string> \"\n+\tPMD_PARAM_CPU_ID \"=<uint32>\");\n \n RTE_INIT(pmd_softnic_init_log);\n static void\ndiff --git a/drivers/net/softnic/rte_eth_softnic.h b/drivers/net/softnic/rte_eth_softnic.h\nindex 9a2c7ba..fb1d170 100644\n--- a/drivers/net/softnic/rte_eth_softnic.h\n+++ b/drivers/net/softnic/rte_eth_softnic.h\n@@ -11,37 +11,23 @@\n extern \"C\" {\n #endif\n \n-#ifndef SOFTNIC_SOFT_TM_NB_QUEUES\n-#define SOFTNIC_SOFT_TM_NB_QUEUES\t\t\t65536\n+/** Firmware. */\n+#ifndef SOFTNIC_FIRMWARE\n+#define SOFTNIC_FIRMWARE                                   \"firmware.cli\"\n #endif\n \n-#ifndef SOFTNIC_SOFT_TM_QUEUE_SIZE\n-#define SOFTNIC_SOFT_TM_QUEUE_SIZE\t\t\t64\n-#endif\n-\n-#ifndef SOFTNIC_SOFT_TM_ENQ_BSZ\n-#define SOFTNIC_SOFT_TM_ENQ_BSZ\t\t\t\t32\n-#endif\n-\n-#ifndef SOFTNIC_SOFT_TM_DEQ_BSZ\n-#define SOFTNIC_SOFT_TM_DEQ_BSZ\t\t\t\t24\n-#endif\n-\n-#ifndef SOFTNIC_HARD_TX_QUEUE_ID\n-#define SOFTNIC_HARD_TX_QUEUE_ID\t\t\t0\n+/** NUMA node ID. */\n+#ifndef SOFTNIC_CPU_ID\n+#define SOFTNIC_CPU_ID                                     0\n #endif\n \n /**\n- * Run the traffic management function on the softnic device\n- *\n- * This function read the packets from the softnic input queues, insert into\n- * QoS scheduler queues based on mbuf sched field value and transmit the\n- * scheduled packets out through the hard device interface.\n+ * Soft NIC run.\n  *\n- * @param portid\n- *    port id of the soft device.\n+ * @param port_id\n+ *    Port ID of the Soft NIC device.\n  * @return\n- *    zero.\n+ *    Zero on success, error code otherwise.\n  */\n \n int\ndiff --git a/drivers/net/softnic/rte_eth_softnic_internals.h b/drivers/net/softnic/rte_eth_softnic_internals.h\nindex 050e3e7..6ae5954 100644\n--- a/drivers/net/softnic/rte_eth_softnic_internals.h\n+++ b/drivers/net/softnic/rte_eth_softnic_internals.h\n@@ -5,9 +5,11 @@\n #ifndef __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__\n #define __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__\n \n+#include <stddef.h>\n #include <stdint.h>\n \n #include <rte_mbuf.h>\n+#include <rte_ethdev.h>\n #include <rte_sched.h>\n #include <rte_ethdev_driver.h>\n #include <rte_tm_driver.h>\n@@ -18,62 +20,16 @@\n  * PMD Parameters\n  */\n \n-enum pmd_feature {\n-\tPMD_FEATURE_TM = 1, /**< Traffic Management (TM) */\n-};\n-\n-#ifndef INTRUSIVE\n-#define INTRUSIVE\t\t\t\t\t0\n-#endif\n-\n struct pmd_params {\n-\t/** Parameters for the soft device (to be created) */\n-\tstruct {\n-\t\tconst char *name; /**< Name */\n-\t\tuint32_t flags; /**< Flags */\n-\n-\t\t/** 0 = Access hard device though API only (potentially slower,\n-\t\t *      but safer);\n-\t\t *  1 = Access hard device private data structures is allowed\n-\t\t *      (potentially faster).\n-\t\t */\n-\t\tint intrusive;\n-\n-\t\t/** Traffic Management (TM) */\n-\t\tstruct {\n-\t\t\tuint32_t rate; /**< Rate (bytes/second) */\n-\t\t\tuint32_t nb_queues; /**< Number of queues */\n-\t\t\tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n-\t\t\t/**< Queue size per traffic class */\n-\t\t\tuint32_t enq_bsz; /**< Enqueue burst size */\n-\t\t\tuint32_t deq_bsz; /**< Dequeue burst size */\n-\t\t} tm;\n-\t} soft;\n+\tconst char *name;\n+\tconst char *firmware;\n+\tuint32_t cpu_id;\n \n-\t/** Parameters for the hard device (existing) */\n+\t/** Traffic Management (TM) */\n \tstruct {\n-\t\tchar *name; /**< Name */\n-\t\tuint16_t tx_queue_id; /**< TX queue ID */\n-\t} hard;\n-};\n-\n-/**\n- * Default Internals\n- */\n-\n-#ifndef DEFAULT_BURST_SIZE\n-#define DEFAULT_BURST_SIZE\t\t\t\t32\n-#endif\n-\n-#ifndef FLUSH_COUNT_THRESHOLD\n-#define FLUSH_COUNT_THRESHOLD\t\t\t(1 << 17)\n-#endif\n-\n-struct default_internals {\n-\tstruct rte_mbuf **pkts;\n-\tuint32_t pkts_len;\n-\tuint32_t txq_pos;\n-\tuint32_t flush_count;\n+\t\tuint32_t n_queues; /**< Number of queues */\n+\t\tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n+\t} tm;\n };\n \n /**\n@@ -185,14 +141,7 @@ struct tm_internals {\n \n \t/** Blueprints */\n \tstruct tm_params params;\n-\n-\t/** Run-time */\n \tstruct rte_sched_port *sched;\n-\tstruct rte_mbuf **pkts_enq;\n-\tstruct rte_mbuf **pkts_deq;\n-\tuint32_t pkts_enq_len;\n-\tuint32_t txq_pos;\n-\tuint32_t flush_count;\n };\n \n /**\n@@ -204,22 +153,8 @@ struct pmd_internals {\n \n \t/** Soft device */\n \tstruct {\n-\t\tstruct default_internals def; /**< Default */\n \t\tstruct tm_internals tm; /**< Traffic Management */\n \t} soft;\n-\n-\t/** Hard device */\n-\tstruct {\n-\t\tuint16_t port_id;\n-\t} hard;\n-};\n-\n-struct pmd_rx_queue {\n-\t/** Hard device */\n-\tstruct {\n-\t\tuint16_t port_id;\n-\t\tuint16_t rx_queue_id;\n-\t} hard;\n };\n \n /**\n@@ -228,9 +163,6 @@ struct pmd_rx_queue {\n extern const struct rte_tm_ops pmd_tm_ops;\n \n int\n-tm_params_check(struct pmd_params *params, uint32_t hard_rate);\n-\n-int\n tm_init(struct pmd_internals *p, struct pmd_params *params, int numa_node);\n \n void\n@@ -243,20 +175,9 @@ void\n tm_stop(struct pmd_internals *p);\n \n static inline int\n-tm_enabled(struct rte_eth_dev *dev)\n+tm_used(struct rte_eth_dev *dev __rte_unused)\n {\n-\tstruct pmd_internals *p = dev->data->dev_private;\n-\n-\treturn (p->params.soft.flags & PMD_FEATURE_TM);\n-}\n-\n-static inline int\n-tm_used(struct rte_eth_dev *dev)\n-{\n-\tstruct pmd_internals *p = dev->data->dev_private;\n-\n-\treturn (p->params.soft.flags & PMD_FEATURE_TM) &&\n-\t\tp->soft.tm.h.n_tm_nodes[TM_NODE_LEVEL_PORT];\n+\treturn 0;\n }\n \n #endif /* __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__ */\ndiff --git a/drivers/net/softnic/rte_eth_softnic_tm.c b/drivers/net/softnic/rte_eth_softnic_tm.c\nindex 11d638a..8da8310 100644\n--- a/drivers/net/softnic/rte_eth_softnic_tm.c\n+++ b/drivers/net/softnic/rte_eth_softnic_tm.c\n@@ -15,50 +15,6 @@\n #define SUBPORT_TC_PERIOD\t10\n #define PIPE_TC_PERIOD\t\t40\n \n-int\n-tm_params_check(struct pmd_params *params, uint32_t hard_rate)\n-{\n-\tuint64_t hard_rate_bytes_per_sec = (uint64_t)hard_rate * BYTES_IN_MBPS;\n-\tuint32_t i;\n-\n-\t/* rate */\n-\tif (params->soft.tm.rate) {\n-\t\tif (params->soft.tm.rate > hard_rate_bytes_per_sec)\n-\t\t\treturn -EINVAL;\n-\t} else {\n-\t\tparams->soft.tm.rate =\n-\t\t\t(hard_rate_bytes_per_sec > UINT32_MAX) ?\n-\t\t\t\tUINT32_MAX : hard_rate_bytes_per_sec;\n-\t}\n-\n-\t/* nb_queues */\n-\tif (params->soft.tm.nb_queues == 0)\n-\t\treturn -EINVAL;\n-\n-\tif (params->soft.tm.nb_queues < RTE_SCHED_QUEUES_PER_PIPE)\n-\t\tparams->soft.tm.nb_queues = RTE_SCHED_QUEUES_PER_PIPE;\n-\n-\tparams->soft.tm.nb_queues =\n-\t\trte_align32pow2(params->soft.tm.nb_queues);\n-\n-\t/* qsize */\n-\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {\n-\t\tif (params->soft.tm.qsize[i] == 0)\n-\t\t\treturn -EINVAL;\n-\n-\t\tparams->soft.tm.qsize[i] =\n-\t\t\trte_align32pow2(params->soft.tm.qsize[i]);\n-\t}\n-\n-\t/* enq_bsz, deq_bsz */\n-\tif (params->soft.tm.enq_bsz == 0 ||\n-\t\tparams->soft.tm.deq_bsz == 0 ||\n-\t\tparams->soft.tm.deq_bsz >= params->soft.tm.enq_bsz)\n-\t\treturn -EINVAL;\n-\n-\treturn 0;\n-}\n-\n static void\n tm_hierarchy_init(struct pmd_internals *p)\n {\n@@ -134,30 +90,9 @@ tm_hierarchy_uninit(struct pmd_internals *p)\n \n int\n tm_init(struct pmd_internals *p,\n-\tstruct pmd_params *params,\n-\tint numa_node)\n+\tstruct pmd_params *params __rte_unused,\n+\tint numa_node __rte_unused)\n {\n-\tuint32_t enq_bsz = params->soft.tm.enq_bsz;\n-\tuint32_t deq_bsz = params->soft.tm.deq_bsz;\n-\n-\tp->soft.tm.pkts_enq = rte_zmalloc_socket(params->soft.name,\n-\t\t2 * enq_bsz * sizeof(struct rte_mbuf *),\n-\t\t0,\n-\t\tnuma_node);\n-\n-\tif (p->soft.tm.pkts_enq == NULL)\n-\t\treturn -ENOMEM;\n-\n-\tp->soft.tm.pkts_deq = rte_zmalloc_socket(params->soft.name,\n-\t\tdeq_bsz * sizeof(struct rte_mbuf *),\n-\t\t0,\n-\t\tnuma_node);\n-\n-\tif (p->soft.tm.pkts_deq == NULL) {\n-\t\trte_free(p->soft.tm.pkts_enq);\n-\t\treturn -ENOMEM;\n-\t}\n-\n \ttm_hierarchy_init(p);\n \n \treturn 0;\n@@ -167,8 +102,6 @@ void\n tm_free(struct pmd_internals *p)\n {\n \ttm_hierarchy_uninit(p);\n-\trte_free(p->soft.tm.pkts_enq);\n-\trte_free(p->soft.tm.pkts_deq);\n }\n \n int\n@@ -384,7 +317,7 @@ static uint32_t\n tm_level_get_max_nodes(struct rte_eth_dev *dev, enum tm_node_level level)\n {\n \tstruct pmd_internals *p = dev->data->dev_private;\n-\tuint32_t n_queues_max = p->params.soft.tm.nb_queues;\n+\tuint32_t n_queues_max = p->params.tm.n_queues;\n \tuint32_t n_tc_max = n_queues_max / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;\n \tuint32_t n_pipes_max = n_tc_max / RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE;\n \tuint32_t n_subports_max = n_pipes_max;\n@@ -429,7 +362,7 @@ pmd_tm_node_type_get(struct rte_eth_dev *dev,\n \t\t   NULL,\n \t\t   rte_strerror(EINVAL));\n \n-\t*is_leaf = node_id < p->params.soft.tm.nb_queues;\n+\t*is_leaf = node_id < p->params.tm.n_queues;\n \n \treturn 0;\n }\n@@ -1362,7 +1295,7 @@ node_add_check_port(struct rte_eth_dev *dev,\n \t\tparams->shaper_profile_id);\n \n \t/* node type: non-leaf */\n-\tif (node_id < p->params.soft.tm.nb_queues)\n+\tif (node_id < p->params.tm.n_queues)\n \t\treturn -rte_tm_error_set(error,\n \t\t\tEINVAL,\n \t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n@@ -1385,12 +1318,9 @@ node_add_check_port(struct rte_eth_dev *dev,\n \t\t\tNULL,\n \t\t\trte_strerror(EINVAL));\n \n-\t/* Shaper must be valid.\n-\t * Shaper profile peak rate must fit the configured port rate.\n-\t */\n+\t/* Shaper must be valid */\n \tif (params->shaper_profile_id == RTE_TM_SHAPER_PROFILE_ID_NONE ||\n-\t\tsp == NULL ||\n-\t\tsp->params.peak.rate > p->params.soft.tm.rate)\n+\t\tsp == NULL)\n \t\treturn -rte_tm_error_set(error,\n \t\t\tEINVAL,\n \t\t\tRTE_TM_ERROR_TYPE_NODE_PARAMS_SHAPER_PROFILE_ID,\n@@ -1437,7 +1367,7 @@ node_add_check_subport(struct rte_eth_dev *dev,\n \tstruct pmd_internals *p = dev->data->dev_private;\n \n \t/* node type: non-leaf */\n-\tif (node_id < p->params.soft.tm.nb_queues)\n+\tif (node_id < p->params.tm.n_queues)\n \t\treturn -rte_tm_error_set(error,\n \t\t\tEINVAL,\n \t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n@@ -1509,7 +1439,7 @@ node_add_check_pipe(struct rte_eth_dev *dev,\n \tstruct pmd_internals *p = dev->data->dev_private;\n \n \t/* node type: non-leaf */\n-\tif (node_id < p->params.soft.tm.nb_queues)\n+\tif (node_id < p->params.tm.n_queues)\n \t\treturn -rte_tm_error_set(error,\n \t\t\tEINVAL,\n \t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n@@ -1586,7 +1516,7 @@ node_add_check_tc(struct rte_eth_dev *dev,\n \tstruct pmd_internals *p = dev->data->dev_private;\n \n \t/* node type: non-leaf */\n-\tif (node_id < p->params.soft.tm.nb_queues)\n+\tif (node_id < p->params.tm.n_queues)\n \t\treturn -rte_tm_error_set(error,\n \t\t\tEINVAL,\n \t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n@@ -1659,7 +1589,7 @@ node_add_check_queue(struct rte_eth_dev *dev,\n \tstruct pmd_internals *p = dev->data->dev_private;\n \n \t/* node type: leaf */\n-\tif (node_id >= p->params.soft.tm.nb_queues)\n+\tif (node_id >= p->params.tm.n_queues)\n \t\treturn -rte_tm_error_set(error,\n \t\t\tEINVAL,\n \t\t\tRTE_TM_ERROR_TYPE_NODE_ID,\n@@ -2548,10 +2478,10 @@ hierarchy_blueprints_create(struct rte_eth_dev *dev)\n \t\t.n_subports_per_port = root->n_children,\n \t\t.n_pipes_per_subport = h->n_tm_nodes[TM_NODE_LEVEL_PIPE] /\n \t\t\th->n_tm_nodes[TM_NODE_LEVEL_SUBPORT],\n-\t\t.qsize = {p->params.soft.tm.qsize[0],\n-\t\t\tp->params.soft.tm.qsize[1],\n-\t\t\tp->params.soft.tm.qsize[2],\n-\t\t\tp->params.soft.tm.qsize[3],\n+\t\t.qsize = {p->params.tm.qsize[0],\n+\t\t\tp->params.tm.qsize[1],\n+\t\t\tp->params.tm.qsize[2],\n+\t\t\tp->params.tm.qsize[3],\n \t\t},\n \t\t.pipe_profiles = t->pipe_profiles,\n \t\t.n_pipe_profiles = t->n_pipe_profiles,\n",
    "prefixes": [
        "v5",
        "01/23"
    ]
}