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GET /api/patches/42001/?format=api
{ "id": 42001, "url": "http://patches.dpdk.org/api/patches/42001/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/41ccf6375f0c888226b103d856e26766a39dae88.1530300158.git.rahul.lakkireddy@chelsio.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<41ccf6375f0c888226b103d856e26766a39dae88.1530300158.git.rahul.lakkireddy@chelsio.com>", "list_archive_url": "https://inbox.dpdk.org/dev/41ccf6375f0c888226b103d856e26766a39dae88.1530300158.git.rahul.lakkireddy@chelsio.com", "date": "2018-06-29T19:23:54", "name": "[4/5] net/cxgbe: fix Rx channel map and queue type", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "817c91792c409d7796301e6117bf5c393457a1ef", "submitter": { "id": 241, "url": "http://patches.dpdk.org/api/people/241/?format=api", "name": "Rahul Lakkireddy", "email": "rahul.lakkireddy@chelsio.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/41ccf6375f0c888226b103d856e26766a39dae88.1530300158.git.rahul.lakkireddy@chelsio.com/mbox/", "series": [ { "id": 332, "url": "http://patches.dpdk.org/api/series/332/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=332", "date": "2018-06-29T19:23:50", "name": "net/cxgbe: feature updates and bug fixes", "version": 1, "mbox": "http://patches.dpdk.org/series/332/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/42001/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/42001/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DF1851BAFB;\n\tFri, 29 Jun 2018 21:25:36 +0200 (CEST)", "from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8])\n\tby dpdk.org (Postfix) with ESMTP id 353DB1BAE4;\n\tFri, 29 Jun 2018 21:25:35 +0200 (CEST)", "from localhost (scalar.blr.asicdesigners.com [10.193.185.94])\n\tby stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id w5TJPVig029002; \n\tFri, 29 Jun 2018 12:25:32 -0700" ], "From": "Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>", "To": "dev@dpdk.org", "Cc": "surendra@chelsio.com, shaguna@chelsio.com, indranil@chelsio.com,\n\tnirranjan@chelsio.com, stable@dpdk.org", "Date": "Sat, 30 Jun 2018 00:53:54 +0530", "Message-Id": "<41ccf6375f0c888226b103d856e26766a39dae88.1530300158.git.rahul.lakkireddy@chelsio.com>", "X-Mailer": "git-send-email 2.5.3", "In-Reply-To": [ "<cover.1530300158.git.rahul.lakkireddy@chelsio.com>", "<cover.1530300158.git.rahul.lakkireddy@chelsio.com>" ], "References": [ "<cover.1530300158.git.rahul.lakkireddy@chelsio.com>", "<cover.1530300158.git.rahul.lakkireddy@chelsio.com>" ], "Subject": "[dpdk-dev] [PATCH 4/5] net/cxgbe: fix Rx channel map and queue type", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Set the Rx channel map and ingress queue type properly to allow firmware\nto manage the internal mapping correctly.\n\nFixes: 6c2809628cd5 (\"net/cxgbe: improve latency for slow traffic\")\nCc: stable@dpdk.org\n\nSigned-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>\n---\n drivers/net/cxgbe/base/t4fw_interface.h | 8 ++++++++\n drivers/net/cxgbe/cxgbe_compat.h | 9 ---------\n drivers/net/cxgbe/sge.c | 10 +++++++---\n 3 files changed, 15 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/cxgbe/base/t4fw_interface.h b/drivers/net/cxgbe/base/t4fw_interface.h\nindex 9dc6d8123..5ddde6b59 100644\n--- a/drivers/net/cxgbe/base/t4fw_interface.h\n+++ b/drivers/net/cxgbe/base/t4fw_interface.h\n@@ -794,6 +794,11 @@ enum fw_iq_type {\n \tFW_IQ_TYPE_FL_INT_CAP,\n };\n \n+enum fw_iq_iqtype {\n+\tFW_IQ_IQTYPE_NIC = 1,\n+\tFW_IQ_IQTYPE_OFLD,\n+};\n+\n struct fw_iq_cmd {\n \t__be32 op_to_vfn;\n \t__be32 alloc_to_len16;\n@@ -927,6 +932,9 @@ struct fw_iq_cmd {\n \t(((x) >> S_FW_IQ_CMD_IQFLINTCONGEN) & M_FW_IQ_CMD_IQFLINTCONGEN)\n #define F_FW_IQ_CMD_IQFLINTCONGEN\tV_FW_IQ_CMD_IQFLINTCONGEN(1U)\n \n+#define S_FW_IQ_CMD_IQTYPE\t24\n+#define V_FW_IQ_CMD_IQTYPE(x)\t((x) << S_FW_IQ_CMD_IQTYPE)\n+\n #define S_FW_IQ_CMD_FL0CNGCHMAP\t\t20\n #define M_FW_IQ_CMD_FL0CNGCHMAP\t\t0xf\n #define V_FW_IQ_CMD_FL0CNGCHMAP(x)\t((x) << S_FW_IQ_CMD_FL0CNGCHMAP)\ndiff --git a/drivers/net/cxgbe/cxgbe_compat.h b/drivers/net/cxgbe/cxgbe_compat.h\nindex 779bcf165..d33452861 100644\n--- a/drivers/net/cxgbe/cxgbe_compat.h\n+++ b/drivers/net/cxgbe/cxgbe_compat.h\n@@ -198,15 +198,6 @@ static inline int cxgbe_fls(int x)\n \treturn x ? sizeof(x) * 8 - __builtin_clz(x) : 0;\n }\n \n-/**\n- * cxgbe_ffs - find first bit set\n- * @x: the word to search\n- */\n-static inline int cxgbe_ffs(int x)\n-{\n-\treturn x ? __builtin_ffs(x) : 0;\n-}\n-\n static inline unsigned long ilog2(unsigned long n)\n {\n \tunsigned int e = 0;\ndiff --git a/drivers/net/cxgbe/sge.c b/drivers/net/cxgbe/sge.c\nindex 357b4856d..4ea40d191 100644\n--- a/drivers/net/cxgbe/sge.c\n+++ b/drivers/net/cxgbe/sge.c\n@@ -1889,12 +1889,16 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,\n \t\t\t F_FW_CMD_WRITE | F_FW_CMD_EXEC);\n \n \tif (is_pf4(adap)) {\n-\t\tpciechan = cong > 0 ? cxgbe_ffs(cong) - 1 : pi->tx_chan;\n+\t\tpciechan = pi->tx_chan;\n \t\tc.op_to_vfn |= htonl(V_FW_IQ_CMD_PFN(adap->pf) |\n \t\t\t\t V_FW_IQ_CMD_VFN(0));\n \t\tif (cong >= 0)\n-\t\t\tc.iqns_to_fl0congen = htonl(F_FW_IQ_CMD_IQFLINTCONGEN |\n-\t\t\t\t\t\t F_FW_IQ_CMD_IQRO);\n+\t\t\tc.iqns_to_fl0congen =\n+\t\t\t\thtonl(F_FW_IQ_CMD_IQFLINTCONGEN |\n+\t\t\t\t V_FW_IQ_CMD_IQTYPE(cong ?\n+\t\t\t\t\t\t\t FW_IQ_IQTYPE_NIC :\n+\t\t\t\t\t\t\t FW_IQ_IQTYPE_OFLD) |\n+\t\t\t\t F_FW_IQ_CMD_IQRO);\n \t} else {\n \t\tpciechan = pi->port_id;\n \t}\n", "prefixes": [ "4/5" ] }