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GET /api/patches/41989/?format=api
{ "id": 41989, "url": "http://patches.dpdk.org/api/patches/41989/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/79796390c63f1a8e3c67053c026c6079e8abb0ca.1530295732.git.rahul.lakkireddy@chelsio.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<79796390c63f1a8e3c67053c026c6079e8abb0ca.1530295732.git.rahul.lakkireddy@chelsio.com>", "list_archive_url": "https://inbox.dpdk.org/dev/79796390c63f1a8e3c67053c026c6079e8abb0ca.1530295732.git.rahul.lakkireddy@chelsio.com", "date": "2018-06-29T18:12:17", "name": "[2/9] net/cxgbe: validate flows offloaded to HASH region", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "542091913c18cab1d49fa8c2914ad1b5697eb877", "submitter": { "id": 241, "url": "http://patches.dpdk.org/api/people/241/?format=api", "name": "Rahul Lakkireddy", "email": "rahul.lakkireddy@chelsio.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/79796390c63f1a8e3c67053c026c6079e8abb0ca.1530295732.git.rahul.lakkireddy@chelsio.com/mbox/", "series": [ { "id": 331, "url": "http://patches.dpdk.org/api/series/331/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=331", "date": "2018-06-29T18:12:15", "name": "net/cxgbe: add support for offloading flows to HASH region", "version": 1, "mbox": "http://patches.dpdk.org/series/331/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/41989/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/41989/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 302ED1B919;\n\tFri, 29 Jun 2018 20:13:40 +0200 (CEST)", "from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8])\n\tby dpdk.org (Postfix) with ESMTP id 5F4B61B914\n\tfor <dev@dpdk.org>; Fri, 29 Jun 2018 20:13:37 +0200 (CEST)", "from localhost (scalar.blr.asicdesigners.com [10.193.185.94])\n\tby stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id w5TIDWRE028617; \n\tFri, 29 Jun 2018 11:13:33 -0700" ], "From": "Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>", "To": "dev@dpdk.org", "Cc": "shaguna@chelsio.com, indranil@chelsio.com, nirranjan@chelsio.com", "Date": "Fri, 29 Jun 2018 23:42:17 +0530", "Message-Id": "<79796390c63f1a8e3c67053c026c6079e8abb0ca.1530295732.git.rahul.lakkireddy@chelsio.com>", "X-Mailer": "git-send-email 2.5.3", "In-Reply-To": [ "<cover.1530295732.git.rahul.lakkireddy@chelsio.com>", "<cover.1530295732.git.rahul.lakkireddy@chelsio.com>" ], "References": [ "<cover.1530295732.git.rahul.lakkireddy@chelsio.com>", "<cover.1530295732.git.rahul.lakkireddy@chelsio.com>" ], "Subject": "[dpdk-dev] [PATCH 2/9] net/cxgbe: validate flows offloaded to HASH\n\tregion", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Shagun Agrawal <shaguna@chelsio.com>\n\nFetch supported match items in HASH region. Ensure the mask\nis all set for all the supported match items to be offloaded\nto HASH region. Otherwise, offload them to LE-TCAM region.\n\nSigned-off-by: Shagun Agrawal <shaguna@chelsio.com>\nSigned-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>\n---\n drivers/net/cxgbe/base/common.h | 3 +++\n drivers/net/cxgbe/base/t4_hw.c | 7 +++++\n drivers/net/cxgbe/base/t4_regs.h | 3 +++\n drivers/net/cxgbe/cxgbe_filter.h | 1 +\n drivers/net/cxgbe/cxgbe_flow.c | 57 ++++++++++++++++++++++++++++++++++++++++\n 5 files changed, 71 insertions(+)", "diff": "diff --git a/drivers/net/cxgbe/base/common.h b/drivers/net/cxgbe/base/common.h\nindex a276a1ef5..ea3e112b9 100644\n--- a/drivers/net/cxgbe/base/common.h\n+++ b/drivers/net/cxgbe/base/common.h\n@@ -156,6 +156,9 @@ struct tp_params {\n \tint vnic_shift;\n \tint port_shift;\n \tint protocol_shift;\n+\tint ethertype_shift;\n+\n+\tu64 hash_filter_mask;\n };\n \n struct vpd_params {\ndiff --git a/drivers/net/cxgbe/base/t4_hw.c b/drivers/net/cxgbe/base/t4_hw.c\nindex 66d080476..0893b7ba0 100644\n--- a/drivers/net/cxgbe/base/t4_hw.c\n+++ b/drivers/net/cxgbe/base/t4_hw.c\n@@ -5032,6 +5032,8 @@ int t4_init_tp_params(struct adapter *adap)\n \tadap->params.tp.port_shift = t4_filter_field_shift(adap, F_PORT);\n \tadap->params.tp.protocol_shift = t4_filter_field_shift(adap,\n \t\t\t\t\t\t\t F_PROTOCOL);\n+\tadap->params.tp.ethertype_shift = t4_filter_field_shift(adap,\n+\t\t\t\t\t\t\t\tF_ETHERTYPE);\n \n \t/*\n \t * If TP_INGRESS_CONFIG.VNID == 0, then TP_VLAN_PRI_MAP.VNIC_ID\n@@ -5040,6 +5042,11 @@ int t4_init_tp_params(struct adapter *adap)\n \tif ((adap->params.tp.ingress_config & F_VNIC) == 0)\n \t\tadap->params.tp.vnic_shift = -1;\n \n+\tv = t4_read_reg(adap, LE_3_DB_HASH_MASK_GEN_IPV4_T6_A);\n+\tadap->params.tp.hash_filter_mask = v;\n+\tv = t4_read_reg(adap, LE_4_DB_HASH_MASK_GEN_IPV4_T6_A);\n+\tadap->params.tp.hash_filter_mask |= ((u64)v << 32);\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/net/cxgbe/base/t4_regs.h b/drivers/net/cxgbe/base/t4_regs.h\nindex a1f6208ea..cbaf415fa 100644\n--- a/drivers/net/cxgbe/base/t4_regs.h\n+++ b/drivers/net/cxgbe/base/t4_regs.h\n@@ -946,3 +946,6 @@\n #define F_HASHEN V_HASHEN(1U)\n \n #define A_LE_DB_TID_HASHBASE 0x19df8\n+\n+#define LE_3_DB_HASH_MASK_GEN_IPV4_T6_A 0x19eac\n+#define LE_4_DB_HASH_MASK_GEN_IPV4_T6_A 0x19eb0\ndiff --git a/drivers/net/cxgbe/cxgbe_filter.h b/drivers/net/cxgbe/cxgbe_filter.h\nindex 6758a1879..27421a475 100644\n--- a/drivers/net/cxgbe/cxgbe_filter.h\n+++ b/drivers/net/cxgbe/cxgbe_filter.h\n@@ -86,6 +86,7 @@ struct ch_filter_specification {\n \t * matching that doesn't exist as a (value, mask) tuple.\n \t */\n \tuint32_t type:1;\t/* 0 => IPv4, 1 => IPv6 */\n+\tuint32_t cap:1;\t\t/* 0 => LE-TCAM, 1 => Hash */\n \n \t/*\n \t * Packet dispatch information. Ingress packets which match the\ndiff --git a/drivers/net/cxgbe/cxgbe_flow.c b/drivers/net/cxgbe/cxgbe_flow.c\nindex 23b7d00b3..dfb5fac2b 100644\n--- a/drivers/net/cxgbe/cxgbe_flow.c\n+++ b/drivers/net/cxgbe/cxgbe_flow.c\n@@ -48,6 +48,58 @@ cxgbe_validate_item(const struct rte_flow_item *i, struct rte_flow_error *e)\n \treturn 0;\n }\n \n+static void\n+cxgbe_fill_filter_region(struct adapter *adap,\n+\t\t\t struct ch_filter_specification *fs)\n+{\n+\tstruct tp_params *tp = &adap->params.tp;\n+\tu64 hash_filter_mask = tp->hash_filter_mask;\n+\tu64 ntuple_mask = 0;\n+\n+\tfs->cap = 0;\n+\n+\tif (!is_hashfilter(adap))\n+\t\treturn;\n+\n+\tif (fs->type) {\n+\t\tuint8_t biton[16] = {0xff, 0xff, 0xff, 0xff,\n+\t\t\t\t 0xff, 0xff, 0xff, 0xff,\n+\t\t\t\t 0xff, 0xff, 0xff, 0xff,\n+\t\t\t\t 0xff, 0xff, 0xff, 0xff};\n+\t\tuint8_t bitoff[16] = {0};\n+\n+\t\tif (!memcmp(fs->val.lip, bitoff, sizeof(bitoff)) ||\n+\t\t !memcmp(fs->val.fip, bitoff, sizeof(bitoff)) ||\n+\t\t memcmp(fs->mask.lip, biton, sizeof(biton)) ||\n+\t\t memcmp(fs->mask.fip, biton, sizeof(biton)))\n+\t\t\treturn;\n+\t} else {\n+\t\tuint32_t biton = 0xffffffff;\n+\t\tuint32_t bitoff = 0x0U;\n+\n+\t\tif (!memcmp(fs->val.lip, &bitoff, sizeof(bitoff)) ||\n+\t\t !memcmp(fs->val.fip, &bitoff, sizeof(bitoff)) ||\n+\t\t memcmp(fs->mask.lip, &biton, sizeof(biton)) ||\n+\t\t memcmp(fs->mask.fip, &biton, sizeof(biton)))\n+\t\t\treturn;\n+\t}\n+\n+\tif (!fs->val.lport || fs->mask.lport != 0xffff)\n+\t\treturn;\n+\tif (!fs->val.fport || fs->mask.fport != 0xffff)\n+\t\treturn;\n+\n+\tif (tp->protocol_shift >= 0)\n+\t\tntuple_mask |= (u64)fs->mask.proto << tp->protocol_shift;\n+\tif (tp->ethertype_shift >= 0)\n+\t\tntuple_mask |= (u64)fs->mask.ethtype << tp->ethertype_shift;\n+\n+\tif (ntuple_mask != hash_filter_mask)\n+\t\treturn;\n+\n+\tfs->cap = 1;\t/* use hash region */\n+}\n+\n static int\n ch_rte_parsetype_udp(const void *dmask, const struct rte_flow_item *item,\n \t\t struct ch_filter_specification *fs,\n@@ -222,6 +274,8 @@ cxgbe_validate_fidxonadd(struct ch_filter_specification *fs,\n static int\n cxgbe_verify_fidx(struct rte_flow *flow, unsigned int fidx, uint8_t del)\n {\n+\tif (flow->fs.cap)\n+\t\treturn 0; /* Hash filters */\n \treturn del ? cxgbe_validate_fidxondel(flow->f, fidx) :\n \t\tcxgbe_validate_fidxonadd(&flow->fs,\n \t\t\t\t\t ethdev2adap(flow->dev), fidx);\n@@ -329,6 +383,7 @@ cxgbe_rtef_parse_items(struct rte_flow *flow,\n \t\t const struct rte_flow_item items[],\n \t\t struct rte_flow_error *e)\n {\n+\tstruct adapter *adap = ethdev2adap(flow->dev);\n \tconst struct rte_flow_item *i;\n \tchar repeat[ARRAY_SIZE(parseitem)] = {0};\n \n@@ -369,6 +424,8 @@ cxgbe_rtef_parse_items(struct rte_flow *flow,\n \t\t}\n \t}\n \n+\tcxgbe_fill_filter_region(adap, &flow->fs);\n+\n \treturn 0;\n }\n \n", "prefixes": [ "2/9" ] }