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GET /api/patches/41926/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 41926,
    "url": "http://patches.dpdk.org/api/patches/41926/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20180629092944.15576-14-johndale@cisco.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20180629092944.15576-14-johndale@cisco.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20180629092944.15576-14-johndale@cisco.com",
    "date": "2018-06-29T09:29:42",
    "name": "[v2,13/15] net/enic: add simple Rx handler",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "2586b2f3ca44ce7cadd741ff356db0bd4494b40b",
    "submitter": {
        "id": 359,
        "url": "http://patches.dpdk.org/api/people/359/?format=api",
        "name": "John Daley (johndale)",
        "email": "johndale@cisco.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20180629092944.15576-14-johndale@cisco.com/mbox/",
    "series": [
        {
            "id": 308,
            "url": "http://patches.dpdk.org/api/series/308/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=308",
            "date": "2018-06-29T09:29:29",
            "name": "enic PMD fixes and performance improvements",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/308/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/41926/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/41926/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E8D0F1B3AD;\n\tFri, 29 Jun 2018 11:35:18 +0200 (CEST)",
            "from alln-iport-8.cisco.com (alln-iport-8.cisco.com\n\t[173.37.142.95]) by dpdk.org (Postfix) with ESMTP id BE9A97EE3\n\tfor <dev@dpdk.org>; Fri, 29 Jun 2018 11:35:17 +0200 (CEST)",
            "from rcdn-core-8.cisco.com ([173.37.93.144])\n\tby alln-iport-8.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Jun 2018 09:35:17 +0000",
            "from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48])\n\tby rcdn-core-8.cisco.com (8.14.5/8.14.5) with ESMTP id w5T9ZG5q004712;\n\tFri, 29 Jun 2018 09:35:16 GMT",
            "by cisco.com (Postfix, from userid 392789)\n\tid A786820F2001; Fri, 29 Jun 2018 02:35:16 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n\td=cisco.com; i=@cisco.com; l=9475; q=dns/txt; s=iport;\n\tt=1530264917; x=1531474517;\n\th=from:to:cc:subject:date:message-id:in-reply-to: references;\n\tbh=OR4TUYaFuQhmXHiugcRt2ccacRM2Zzm7YNYHhIGdRMA=;\n\tb=acKNGGpcjkQbW9rFnNLubpxNJqftVoKiSNaX701bfk+etdB8Wh3x5KSh\n\t74e6QnysfJOox0QTcNp1O6p6Wdt0zkYR6xGuMetxepp+jgng9fSJH4FdR\n\tIhQcGWtJgXAf+bA6EJmqscci342kQmrmmNfzkNg1rC2ttnuhrtxByDZnl o=;",
        "X-IronPort-AV": "E=Sophos;i=\"5.51,285,1526342400\"; d=\"scan'208\";a=\"135907118\"",
        "From": "John Daley <johndale@cisco.com>",
        "To": "ferruh.yigit@intel.com",
        "Cc": "dev@dpdk.org, John Daley <johndale@cisco.com>,\n\tHyong Youb Kim <hyonkim@cisco.com>",
        "Date": "Fri, 29 Jun 2018 02:29:42 -0700",
        "Message-Id": "<20180629092944.15576-14-johndale@cisco.com>",
        "X-Mailer": "git-send-email 2.16.2",
        "In-Reply-To": "<20180629092944.15576-1-johndale@cisco.com>",
        "References": "<20180628031940.17397-1-johndale@cisco.com>\n\t<20180629092944.15576-1-johndale@cisco.com>",
        "Subject": "[dpdk-dev] [PATCH v2 13/15] net/enic: add simple Rx handler",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add an optimized Rx handler for non-scattered Rx.\n\nSigned-off-by: Hyong Youb Kim <hyonkim@cisco.com>\nSigned-off-by: John Daley <johndale@cisco.com>\n---\n drivers/net/enic/base/cq_desc.h |   1 +\n drivers/net/enic/base/vnic_rq.h |   2 +\n drivers/net/enic/enic.h         |   2 +\n drivers/net/enic/enic_ethdev.c  |   3 +-\n drivers/net/enic/enic_main.c    |  36 ++++++++++++-\n drivers/net/enic/enic_res.h     |   1 +\n drivers/net/enic/enic_rxtx.c    | 114 ++++++++++++++++++++++++++++++++++++++++\n 7 files changed, 156 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/drivers/net/enic/base/cq_desc.h b/drivers/net/enic/base/cq_desc.h\nindex 7e1380270..ae8847c6d 100644\n--- a/drivers/net/enic/base/cq_desc.h\n+++ b/drivers/net/enic/base/cq_desc.h\n@@ -38,6 +38,7 @@ struct cq_desc {\n #define CQ_DESC_TYPE_MASK        ((1 << CQ_DESC_TYPE_BITS) - 1)\n #define CQ_DESC_COLOR_MASK       1\n #define CQ_DESC_COLOR_SHIFT      7\n+#define CQ_DESC_COLOR_MASK_NOSHIFT 0x80\n #define CQ_DESC_Q_NUM_BITS       10\n #define CQ_DESC_Q_NUM_MASK       ((1 << CQ_DESC_Q_NUM_BITS) - 1)\n #define CQ_DESC_COMP_NDX_BITS    12\ndiff --git a/drivers/net/enic/base/vnic_rq.h b/drivers/net/enic/base/vnic_rq.h\nindex 9619290de..d8e67f747 100644\n--- a/drivers/net/enic/base/vnic_rq.h\n+++ b/drivers/net/enic/base/vnic_rq.h\n@@ -52,6 +52,8 @@ struct vnic_rq {\n \tstruct vnic_dev *vdev;\n \tstruct vnic_rq_ctrl __iomem *ctrl;\t/* memory-mapped */\n \tstruct vnic_dev_ring ring;\n+\tstruct rte_mbuf **free_mbufs;\t\t/* reserve of free mbufs */\n+\tint num_free_mbufs;\n \tstruct rte_mbuf **mbuf_ring;\t\t/* array of allocated mbufs */\n \tunsigned int mbuf_next_idx;\t\t/* next mb to consume */\n \tvoid *os_buf_head;\ndiff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h\nindex a40ea790e..7c27bd513 100644\n--- a/drivers/net/enic/enic.h\n+++ b/drivers/net/enic/enic.h\n@@ -313,6 +313,8 @@ int enic_clsf_init(struct enic *enic);\n void enic_clsf_destroy(struct enic *enic);\n uint16_t enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t\tuint16_t nb_pkts);\n+uint16_t enic_noscatter_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t\t  uint16_t nb_pkts);\n uint16_t enic_dummy_recv_pkts(void *rx_queue,\n \t\t\t      struct rte_mbuf **rx_pkts,\n \t\t\t      uint16_t nb_pkts);\ndiff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c\nindex 15d93711d..28bd0ff94 100644\n--- a/drivers/net/enic/enic_ethdev.c\n+++ b/drivers/net/enic/enic_ethdev.c\n@@ -524,7 +524,8 @@ static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)\n \t\tRTE_PTYPE_UNKNOWN\n \t};\n \n-\tif (dev->rx_pkt_burst == enic_recv_pkts)\n+\tif (dev->rx_pkt_burst == enic_recv_pkts ||\n+\t    dev->rx_pkt_burst == enic_noscatter_recv_pkts)\n \t\treturn ptypes;\n \treturn NULL;\n }\ndiff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c\nindex e89105d96..c8456c4b7 100644\n--- a/drivers/net/enic/enic_main.c\n+++ b/drivers/net/enic/enic_main.c\n@@ -571,6 +571,14 @@ int enic_enable(struct enic *enic)\n \t\teth_dev->tx_pkt_burst = &enic_xmit_pkts;\n \t}\n \n+\t/* Use the non-scatter, simplified RX handler if possible. */\n+\tif (enic->rq_count > 0 && enic->rq[0].data_queue_enable == 0) {\n+\t\tPMD_INIT_LOG(DEBUG, \" use the non-scatter Rx handler\");\n+\t\teth_dev->rx_pkt_burst = &enic_noscatter_recv_pkts;\n+\t} else {\n+\t\tPMD_INIT_LOG(DEBUG, \" use the normal Rx handler\");\n+\t}\n+\n \tfor (index = 0; index < enic->wq_count; index++)\n \t\tenic_start_wq(enic, index);\n \tfor (index = 0; index < enic->rq_count; index++)\n@@ -623,6 +631,19 @@ void enic_free_rq(void *rxq)\n \tenic = vnic_dev_priv(rq_sop->vdev);\n \trq_data = &enic->rq[rq_sop->data_queue_idx];\n \n+\tif (rq_sop->free_mbufs) {\n+\t\tstruct rte_mbuf **mb;\n+\t\tint i;\n+\n+\t\tmb = rq_sop->free_mbufs;\n+\t\tfor (i = ENIC_RX_BURST_MAX - rq_sop->num_free_mbufs;\n+\t\t     i < ENIC_RX_BURST_MAX; i++)\n+\t\t\trte_pktmbuf_free(mb[i]);\n+\t\trte_free(rq_sop->free_mbufs);\n+\t\trq_sop->free_mbufs = NULL;\n+\t\trq_sop->num_free_mbufs = 0;\n+\t}\n+\n \tenic_rxmbuf_queue_release(enic, rq_sop);\n \tif (rq_data->in_use)\n \t\tenic_rxmbuf_queue_release(enic, rq_data);\n@@ -786,13 +807,13 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,\n \trq_data->max_mbufs_per_pkt = mbufs_per_pkt;\n \n \tif (mbufs_per_pkt > 1) {\n-\t\tmin_sop = 64;\n+\t\tmin_sop = ENIC_RX_BURST_MAX;\n \t\tmax_sop = ((enic->config.rq_desc_count /\n \t\t\t    (mbufs_per_pkt - 1)) & ENIC_ALIGN_DESCS_MASK);\n \t\tmin_data = min_sop * (mbufs_per_pkt - 1);\n \t\tmax_data = enic->config.rq_desc_count;\n \t} else {\n-\t\tmin_sop = 64;\n+\t\tmin_sop = ENIC_RX_BURST_MAX;\n \t\tmax_sop = enic->config.rq_desc_count;\n \t\tmin_data = 0;\n \t\tmax_data = 0;\n@@ -863,10 +884,21 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,\n \t\t\tgoto err_free_sop_mbuf;\n \t}\n \n+\trq_sop->free_mbufs = (struct rte_mbuf **)\n+\t\trte_zmalloc_socket(\"rq->free_mbufs\",\n+\t\t\t\t   sizeof(struct rte_mbuf *) *\n+\t\t\t\t   ENIC_RX_BURST_MAX,\n+\t\t\t\t   RTE_CACHE_LINE_SIZE, rq_sop->socket_id);\n+\tif (rq_sop->free_mbufs == NULL)\n+\t\tgoto err_free_data_mbuf;\n+\trq_sop->num_free_mbufs = 0;\n+\n \trq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */\n \n \treturn 0;\n \n+err_free_data_mbuf:\n+\trte_free(rq_data->mbuf_ring);\n err_free_sop_mbuf:\n \trte_free(rq_sop->mbuf_ring);\n err_free_cq:\ndiff --git a/drivers/net/enic/enic_res.h b/drivers/net/enic/enic_res.h\nindex 6b1f6acad..3786bc0e2 100644\n--- a/drivers/net/enic/enic_res.h\n+++ b/drivers/net/enic/enic_res.h\n@@ -37,6 +37,7 @@\n #define ENIC_NON_TSO_MAX_DESC\t\t16\n #define ENIC_DEFAULT_RX_FREE_THRESH\t32\n #define ENIC_TX_XMIT_MAX\t\t64\n+#define ENIC_RX_BURST_MAX\t\t64\n \n /* Defaults for dev_info.default_{rx,tx}portconf */\n #define ENIC_DEFAULT_RX_BURST\t\t32\ndiff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c\nindex 04a77fcb4..e0f93dd5e 100644\n--- a/drivers/net/enic/enic_rxtx.c\n+++ b/drivers/net/enic/enic_rxtx.c\n@@ -471,6 +471,120 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \treturn nb_rx;\n }\n \n+uint16_t\n+enic_noscatter_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t uint16_t nb_pkts)\n+{\n+\tstruct rte_mbuf *mb, **rx, **rxmb;\n+\tuint16_t cq_idx, nb_rx, max_rx;\n+\tstruct cq_enet_rq_desc *cqd;\n+\tstruct rq_enet_desc *rqd;\n+\tunsigned int port_id;\n+\tstruct vnic_cq *cq;\n+\tstruct vnic_rq *rq;\n+\tstruct enic *enic;\n+\tuint8_t color;\n+\tbool overlay;\n+\tbool tnl;\n+\n+\trq = rx_queue;\n+\tenic = vnic_dev_priv(rq->vdev);\n+\tcq = &enic->cq[enic_cq_rq(enic, rq->index)];\n+\tcq_idx = cq->to_clean;\n+\n+\t/*\n+\t * Fill up the reserve of free mbufs. Below, we restock the receive\n+\t * ring with these mbufs to avoid allocation failures.\n+\t */\n+\tif (rq->num_free_mbufs == 0) {\n+\t\tif (rte_mempool_get_bulk(rq->mp, (void **)rq->free_mbufs,\n+\t\t\t\t\t ENIC_RX_BURST_MAX))\n+\t\t\treturn 0;\n+\t\trq->num_free_mbufs = ENIC_RX_BURST_MAX;\n+\t}\n+\n+\t/* Receive until the end of the ring, at most. */\n+\tmax_rx = RTE_MIN(nb_pkts, rq->num_free_mbufs);\n+\tmax_rx = RTE_MIN(max_rx, cq->ring.desc_count - cq_idx);\n+\n+\tcqd = (struct cq_enet_rq_desc *)(cq->ring.descs) + cq_idx;\n+\tcolor = cq->last_color;\n+\trxmb = rq->mbuf_ring + cq_idx;\n+\tport_id = enic->port_id;\n+\toverlay = enic->overlay_offload;\n+\n+\trx = rx_pkts;\n+\twhile (max_rx) {\n+\t\tmax_rx--;\n+\t\tif ((cqd->type_color & CQ_DESC_COLOR_MASK_NOSHIFT) == color)\n+\t\t\tbreak;\n+\t\tif (unlikely(cqd->bytes_written_flags &\n+\t\t\t     CQ_ENET_RQ_DESC_FLAGS_TRUNCATED)) {\n+\t\t\trte_pktmbuf_free(*rxmb++);\n+\t\t\trte_atomic64_inc(&enic->soft_stats.rx_packet_errors);\n+\t\t\tcqd++;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tmb = *rxmb++;\n+\t\t/* prefetch mbuf data for caller */\n+\t\trte_packet_prefetch(RTE_PTR_ADD(mb->buf_addr,\n+\t\t\t\t    RTE_PKTMBUF_HEADROOM));\n+\t\tmb->data_len = cqd->bytes_written_flags &\n+\t\t\tCQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;\n+\t\tmb->pkt_len = mb->data_len;\n+\t\tmb->port = port_id;\n+\t\ttnl = overlay && (cqd->completed_index_flags &\n+\t\t\t\t  CQ_ENET_RQ_DESC_FLAGS_FCOE) != 0;\n+\t\tmb->packet_type =\n+\t\t\tenic_cq_rx_flags_to_pkt_type((struct cq_desc *)cqd,\n+\t\t\t\t\t\t     tnl);\n+\t\tenic_cq_rx_to_pkt_flags((struct cq_desc *)cqd, mb);\n+\t\t/* Wipe the outer types set by enic_cq_rx_flags_to_pkt_type() */\n+\t\tif (tnl) {\n+\t\t\tmb->packet_type &= ~(RTE_PTYPE_L3_MASK |\n+\t\t\t\t\t     RTE_PTYPE_L4_MASK);\n+\t\t}\n+\t\tcqd++;\n+\t\t*rx++ = mb;\n+\t}\n+\t/* Number of descriptors visited */\n+\tnb_rx = cqd - (struct cq_enet_rq_desc *)(cq->ring.descs) - cq_idx;\n+\tif (nb_rx == 0)\n+\t\treturn 0;\n+\trqd = ((struct rq_enet_desc *)rq->ring.descs) + cq_idx;\n+\trxmb = rq->mbuf_ring + cq_idx;\n+\tcq_idx += nb_rx;\n+\trq->rx_nb_hold += nb_rx;\n+\tif (unlikely(cq_idx == cq->ring.desc_count)) {\n+\t\tcq_idx = 0;\n+\t\tcq->last_color ^= CQ_DESC_COLOR_MASK_NOSHIFT;\n+\t}\n+\tcq->to_clean = cq_idx;\n+\n+\tmemcpy(rxmb, rq->free_mbufs + ENIC_RX_BURST_MAX - rq->num_free_mbufs,\n+\t       sizeof(struct rte_mbuf *) * nb_rx);\n+\trq->num_free_mbufs -= nb_rx;\n+\twhile (nb_rx) {\n+\t\tnb_rx--;\n+\t\tmb = *rxmb++;\n+\t\tmb->data_off = RTE_PKTMBUF_HEADROOM;\n+\t\trqd->address = mb->buf_iova + RTE_PKTMBUF_HEADROOM;\n+\t\trqd++;\n+\t}\n+\tif (rq->rx_nb_hold > rq->rx_free_thresh) {\n+\t\trq->posted_index = enic_ring_add(rq->ring.desc_count,\n+\t\t\t\t\t\t rq->posted_index,\n+\t\t\t\t\t\t rq->rx_nb_hold);\n+\t\trq->rx_nb_hold = 0;\n+\t\trte_wmb();\n+\t\tiowrite32_relaxed(rq->posted_index,\n+\t\t\t\t  &rq->ctrl->posted_index);\n+\t}\n+\n+\treturn rx - rx_pkts;\n+}\n+\n static void enic_fast_free_wq_bufs(struct vnic_wq *wq, u16 completed_index)\n {\n \tunsigned int desc_count, n, nb_to_free, tail_idx;\n",
    "prefixes": [
        "v2",
        "13/15"
    ]
}