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{
    "id": 41082,
    "url": "http://patches.dpdk.org/api/patches/41082/",
    "web_url": "http://patches.dpdk.org/patch/41082/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<20180614083047.10812-5-adrien.mazarguil@6wind.com>",
    "date": "2018-06-14T08:34:56",
    "name": "[v2,4/7] net/mlx5: re-indent generic probing function",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "66adb7d5d16925d9cb6802b3f0011e549cef160f",
    "submitter": {
        "id": 165,
        "url": "http://patches.dpdk.org/api/people/165/",
        "name": "Adrien Mazarguil",
        "email": "adrien.mazarguil@6wind.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/patch/41082/mbox/",
    "series": [
        {
            "id": 118,
            "url": "http://patches.dpdk.org/api/series/118/",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=118",
            "date": "2018-06-14T08:34:47",
            "name": "net/mlx5: add port representor support",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/118/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/41082/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/41082/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "References": "<20180525161814.13873-1-adrien.mazarguil@6wind.com>\n\t<20180614083047.10812-1-adrien.mazarguil@6wind.com>",
        "X-Mailman-Version": "2.1.15",
        "From": "Adrien Mazarguil <adrien.mazarguil@6wind.com>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "X-BeenThere": "dev@dpdk.org",
        "Content-Type": "text/plain; charset=us-ascii",
        "Delivered-To": "patchwork@dpdk.org",
        "X-Original-To": "patchwork@dpdk.org",
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to;\n\tbh=jhml4OMAm2owFgVdqLqUHV2IF6aO4g0eaY6gYbGUtC8=;\n\tb=t6ah1W0S9Sm0dwdlpxsS5PbfmHPzxK90yo7a59iNiAPgRBwusjAtTSDPTgspjyuG36\n\tfNJTS7w6Xb+2nOvd9dOeu2YRyzW1VHdoCiky3phaKVG9bYUFB6q3Cl4QLbH40M+oepqg\n\tfpHZ/3ACyJQfmKmQHf8A7egrsGJtt2QTSJ/RvzDBSjkfdoyjpQFJCWdv5pTpNDFj82vc\n\tRkXu59qwOX3/iez6kx0RqsUh8RWcKPcq+4g8t/U2XWST6nuBtmCxTlYhAU2kYPV7UvnU\n\tTrRNRmIzgv+LOlMp+VuxQpnPMM9yRChthwjmFELPbikldEZllbuY+ozdmoXbVIGTKhL9\n\tsmag==",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3BEC01E4A3;\n\tThu, 14 Jun 2018 10:35:15 +0200 (CEST)",
            "from mail-wm0-f45.google.com (mail-wm0-f45.google.com\n\t[74.125.82.45]) by dpdk.org (Postfix) with ESMTP id 14BD91E495\n\tfor <dev@dpdk.org>; Thu, 14 Jun 2018 10:35:12 +0200 (CEST)",
            "by mail-wm0-f45.google.com with SMTP id n5-v6so10251626wmc.5\n\tfor <dev@dpdk.org>; Thu, 14 Jun 2018 01:35:12 -0700 (PDT)",
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        ],
        "Subject": "[dpdk-dev] [PATCH v2 4/7] net/mlx5: re-indent generic probing\n\tfunction",
        "X-Received": "by 2002:a1c:852:: with SMTP id\n\t79-v6mr1020822wmi.115.1528965312257; \n\tThu, 14 Jun 2018 01:35:12 -0700 (PDT)",
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        "Message-ID": "<20180614083047.10812-5-adrien.mazarguil@6wind.com>",
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        "Date": "Thu, 14 Jun 2018 10:34:56 +0200",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
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        "Cc": "dev@dpdk.org",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "In-Reply-To": "<20180614083047.10812-1-adrien.mazarguil@6wind.com>",
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        "MIME-Version": "1.0",
        "To": "Shahaf Shuler <shahafs@mellanox.com>",
        "Content-Disposition": "inline"
    },
    "content": "Since commit \"net/mlx5: split PCI from generic probing code\" extracted the\ninner loop to a separate function, mlx5_dev_spawn_one() is left with an\nunnecessary indent level.\n\nThis patch eliminates a block, moves its local variables to function scope,\nand re-indents its contents.\n\nNo functional impact.\n\nSigned-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>\nReviewed-by: Xueming(Steven) Li <xuemingl@mellanox.com>\n---\n drivers/net/mlx5/mlx5.c | 615 +++++++++++++++++++++----------------------\n 1 file changed, 299 insertions(+), 316 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 01dcf25b9..c9815d721 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -660,8 +660,27 @@ mlx5_dev_spawn_one(struct rte_device *dpdk_dev,\n \t\t   unsigned int port)\n {\n \tstruct ibv_context *ctx;\n+\tstruct ibv_port_attr port_attr;\n+\tstruct ibv_pd *pd = NULL;\n \tstruct mlx5dv_context dv_attr = { .comp_mask = 0 };\n+\tstruct mlx5_dev_config config = {\n+\t\t.vf = !!vf,\n+\t\t.tx_vec_en = 1,\n+\t\t.rx_vec_en = 1,\n+\t\t.mpw_hdr_dseg = 0,\n+\t\t.txq_inline = MLX5_ARG_UNSET,\n+\t\t.txqs_inline = MLX5_ARG_UNSET,\n+\t\t.inline_max_packet_sz = MLX5_ARG_UNSET,\n+\t\t.vf_nl_en = 1,\n+\t\t.mprq = {\n+\t\t\t.enabled = 0,\n+\t\t\t.stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,\n+\t\t\t.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,\n+\t\t\t.min_rxqs_num = MLX5_MPRQ_MIN_RXQS,\n+\t\t},\n+\t};\n \tstruct rte_eth_dev *eth_dev = NULL;\n+\tstruct priv *priv = NULL;\n \tint err = 0;\n \tunsigned int mps;\n \tunsigned int cqe_comp;\n@@ -677,6 +696,8 @@ mlx5_dev_spawn_one(struct rte_device *dpdk_dev,\n #ifdef HAVE_IBV_DEVICE_COUNTERS_SET_SUPPORT\n \tstruct ibv_counter_set_description cs_desc = { .counter_type = 0 };\n #endif\n+\tstruct ether_addr mac;\n+\tchar name[RTE_ETH_NAME_MAX_LEN];\n \n \t/* Prepare shared data between primary and secondary process. */\n \tmlx5_prepare_shared_data();\n@@ -712,11 +733,13 @@ mlx5_dev_spawn_one(struct rte_device *dpdk_dev,\n \t\tDRV_LOG(DEBUG, \"MPW isn't supported\");\n \t\tmps = MLX5_MPW_DISABLED;\n \t}\n+\tconfig.mps = mps;\n #ifdef HAVE_IBV_MLX5_MOD_SWP\n \tif (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)\n \t\tswp = dv_attr.sw_parsing_caps.sw_parsing_offloads;\n \tDRV_LOG(DEBUG, \"SWP support: %u\", swp);\n #endif\n+\tconfig.swp = !!swp;\n #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT\n \tif (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {\n \t\tstruct mlx5dv_striding_rq_caps mprq_caps =\n@@ -742,6 +765,8 @@ mlx5_dev_spawn_one(struct rte_device *dpdk_dev,\n \t\t\tmprq_caps.min_single_wqe_log_num_of_strides;\n \t\tmprq_max_stride_num_n =\n \t\t\tmprq_caps.max_single_wqe_log_num_of_strides;\n+\t\tconfig.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,\n+\t\t\t\t\t\t   mprq_min_stride_num_n);\n \t}\n #endif\n \tif (RTE_CACHE_LINE_SIZE == 128 &&\n@@ -749,6 +774,7 @@ mlx5_dev_spawn_one(struct rte_device *dpdk_dev,\n \t\tcqe_comp = 0;\n \telse\n \t\tcqe_comp = 1;\n+\tconfig.cqe_comp = cqe_comp;\n #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT\n \tif (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {\n \t\ttunnel_en = ((dv_attr.tunnel_offloads_caps &\n@@ -762,6 +788,7 @@ mlx5_dev_spawn_one(struct rte_device *dpdk_dev,\n \tDRV_LOG(WARNING,\n \t\t\"tunnel offloading disabled due to old OFED/rdma-core version\");\n #endif\n+\tconfig.tunnel_en = tunnel_en;\n #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT\n \tmpls_en = ((dv_attr.tunnel_offloads_caps &\n \t\t    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&\n@@ -773,338 +800,294 @@ mlx5_dev_spawn_one(struct rte_device *dpdk_dev,\n \tDRV_LOG(WARNING, \"MPLS over GRE/UDP tunnel offloading disabled due to\"\n \t\t\" old OFED/rdma-core version or firmware configuration\");\n #endif\n-\t{\n-\t\tchar name[RTE_ETH_NAME_MAX_LEN];\n-\t\tstruct ibv_port_attr port_attr;\n-\t\tstruct ibv_pd *pd = NULL;\n-\t\tstruct priv *priv = NULL;\n-\t\tstruct ether_addr mac;\n-\t\tstruct mlx5_dev_config config = {\n-\t\t\t.cqe_comp = cqe_comp,\n-\t\t\t.mps = mps,\n-\t\t\t.tunnel_en = tunnel_en,\n-\t\t\t.mpls_en = mpls_en,\n-\t\t\t.tx_vec_en = 1,\n-\t\t\t.rx_vec_en = 1,\n-\t\t\t.mpw_hdr_dseg = 0,\n-\t\t\t.txq_inline = MLX5_ARG_UNSET,\n-\t\t\t.txqs_inline = MLX5_ARG_UNSET,\n-\t\t\t.inline_max_packet_sz = MLX5_ARG_UNSET,\n-\t\t\t.vf_nl_en = 1,\n-\t\t\t.swp = !!swp,\n-\t\t\t.mprq = {\n-\t\t\t\t.enabled = 0, /* Disabled by default. */\n-\t\t\t\t.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,\n-\t\t\t\t\t\t\tmprq_min_stride_num_n),\n-\t\t\t\t.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,\n-\t\t\t\t.min_rxqs_num = MLX5_MPRQ_MIN_RXQS,\n-\t\t\t},\n-\t\t};\n-\n-\t\tif (attr->orig_attr.phys_port_cnt > 1)\n-\t\t\tsnprintf(name, sizeof(name), \"%s port %u\",\n-\t\t\t\t dpdk_dev->name, port);\n-\t\telse\n-\t\t\tsnprintf(name, sizeof(name), \"%s\", dpdk_dev->name);\n-\t\tif (rte_eal_process_type() == RTE_PROC_SECONDARY) {\n-\t\t\teth_dev = rte_eth_dev_attach_secondary(name);\n-\t\t\tif (eth_dev == NULL) {\n-\t\t\t\tDRV_LOG(ERR, \"can not attach rte ethdev\");\n-\t\t\t\trte_errno = ENOMEM;\n-\t\t\t\terr = rte_errno;\n-\t\t\t\tgoto error;\n-\t\t\t}\n-\t\t\teth_dev->device = dpdk_dev;\n-\t\t\teth_dev->dev_ops = &mlx5_dev_sec_ops;\n-\t\t\terr = mlx5_uar_init_secondary(eth_dev);\n-\t\t\tif (err) {\n-\t\t\t\terr = rte_errno;\n-\t\t\t\tgoto error;\n-\t\t\t}\n-\t\t\t/* Receive command fd from primary process */\n-\t\t\terr = mlx5_socket_connect(eth_dev);\n-\t\t\tif (err < 0) {\n-\t\t\t\terr = rte_errno;\n-\t\t\t\tgoto error;\n-\t\t\t}\n-\t\t\t/* Remap UAR for Tx queues. */\n-\t\t\terr = mlx5_tx_uar_remap(eth_dev, err);\n-\t\t\tif (err) {\n-\t\t\t\terr = rte_errno;\n-\t\t\t\tgoto error;\n-\t\t\t}\n-\t\t\t/*\n-\t\t\t * Ethdev pointer is still required as input since\n-\t\t\t * the primary device is not accessible from the\n-\t\t\t * secondary process.\n-\t\t\t */\n-\t\t\teth_dev->rx_pkt_burst =\n-\t\t\t\tmlx5_select_rx_function(eth_dev);\n-\t\t\teth_dev->tx_pkt_burst =\n-\t\t\t\tmlx5_select_tx_function(eth_dev);\n-\t\t\tmlx5_glue->close_device(ctx);\n-\t\t\treturn eth_dev;\n-\t\t}\n-\t\tDRV_LOG(DEBUG, \"using port %u\", port);\n-\t\t/* Check port status. */\n-\t\terr = mlx5_glue->query_port(ctx, port, &port_attr);\n-\t\tif (err) {\n-\t\t\tDRV_LOG(ERR, \"port query failed: %s\", strerror(err));\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\tif (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {\n-\t\t\tDRV_LOG(ERR,\n-\t\t\t\t\"port %d is not configured in Ethernet mode\",\n-\t\t\t\tport);\n-\t\t\terr = EINVAL;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\tif (port_attr.state != IBV_PORT_ACTIVE)\n-\t\t\tDRV_LOG(DEBUG, \"port %d is not active: \\\"%s\\\" (%d)\",\n-\t\t\t\tport,\n-\t\t\t\tmlx5_glue->port_state_str(port_attr.state),\n-\t\t\t\tport_attr.state);\n-\t\t/* Allocate protection domain. */\n-\t\tpd = mlx5_glue->alloc_pd(ctx);\n-\t\tif (pd == NULL) {\n-\t\t\tDRV_LOG(ERR, \"PD allocation failure\");\n-\t\t\terr = ENOMEM;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\t/* from rte_ethdev.c */\n-\t\tpriv = rte_zmalloc(\"ethdev private structure\",\n-\t\t\t\t   sizeof(*priv),\n-\t\t\t\t   RTE_CACHE_LINE_SIZE);\n-\t\tif (priv == NULL) {\n-\t\t\tDRV_LOG(ERR, \"priv allocation failure\");\n-\t\t\terr = ENOMEM;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\tpriv->ctx = ctx;\n-\t\tstrncpy(priv->ibdev_path, priv->ctx->device->ibdev_path,\n-\t\t\tsizeof(priv->ibdev_path));\n-\t\tpriv->device_attr = *attr;\n-\t\tpriv->port = port;\n-\t\tpriv->pd = pd;\n-\t\tpriv->mtu = ETHER_MTU;\n-\t\terr = mlx5_args(&config, dpdk_dev->devargs);\n-\t\tif (err) {\n-\t\t\terr = rte_errno;\n-\t\t\tDRV_LOG(ERR, \"failed to process device arguments: %s\",\n-\t\t\t\tstrerror(rte_errno));\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\tconfig.hw_csum = !!(attr->device_cap_flags_ex &\n-\t\t\t\t    IBV_DEVICE_RAW_IP_CSUM);\n-\t\tDRV_LOG(DEBUG, \"checksum offloading is %ssupported\",\n-\t\t\t(config.hw_csum ? \"\" : \"not \"));\n-#ifdef HAVE_IBV_DEVICE_COUNTERS_SET_SUPPORT\n-\t\tconfig.flow_counter_en = !!attr->max_counter_sets;\n-\t\tmlx5_glue->describe_counter_set(ctx, 0, &cs_desc);\n-\t\tDRV_LOG(DEBUG,\n-\t\t\t\"counter type = %d, num of cs = %ld, attributes = %d\",\n-\t\t\tcs_desc.counter_type, cs_desc.num_of_cs,\n-\t\t\tcs_desc.attributes);\n-#endif\n-\t\tconfig.ind_table_max_size =\n-\t\t\tattr->rss_caps.max_rwq_indirection_table_size;\n-\t\t/* Remove this check once DPDK supports larger/variable\n-\t\t * indirection tables. */\n-\t\tif (config.ind_table_max_size >\n-\t\t\t\t(unsigned int)ETH_RSS_RETA_SIZE_512)\n-\t\t\tconfig.ind_table_max_size = ETH_RSS_RETA_SIZE_512;\n-\t\tDRV_LOG(DEBUG, \"maximum Rx indirection table size is %u\",\n-\t\t\tconfig.ind_table_max_size);\n-\t\tconfig.hw_vlan_strip = !!(attr->raw_packet_caps &\n-\t\t\t\t\t IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);\n-\t\tDRV_LOG(DEBUG, \"VLAN stripping is %ssupported\",\n-\t\t\t(config.hw_vlan_strip ? \"\" : \"not \"));\n-\n-\t\tconfig.hw_fcs_strip = !!(attr->raw_packet_caps &\n-\t\t\t\t\t IBV_RAW_PACKET_CAP_SCATTER_FCS);\n-\t\tDRV_LOG(DEBUG, \"FCS stripping configuration is %ssupported\",\n-\t\t\t(config.hw_fcs_strip ? \"\" : \"not \"));\n-\n-#ifdef HAVE_IBV_WQ_FLAG_RX_END_PADDING\n-\t\tconfig.hw_padding = !!attr->rx_pad_end_addr_align;\n-#endif\n-\t\tDRV_LOG(DEBUG,\n-\t\t\t\"hardware Rx end alignment padding is %ssupported\",\n-\t\t\t(config.hw_padding ? \"\" : \"not \"));\n-\t\tconfig.vf = vf;\n-\t\tconfig.tso = (attr->tso_caps.max_tso > 0 &&\n-\t\t\t      (attr->tso_caps.supported_qpts &\n-\t\t\t       (1 << IBV_QPT_RAW_PACKET)));\n-\t\tif (config.tso)\n-\t\t\tconfig.tso_max_payload_sz = attr->tso_caps.max_tso;\n-\t\tif (config.mps && !mps) {\n-\t\t\tDRV_LOG(ERR,\n-\t\t\t\t\"multi-packet send not supported on this device\"\n-\t\t\t\t\" (\" MLX5_TXQ_MPW_EN \")\");\n-\t\t\terr = ENOTSUP;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\tDRV_LOG(INFO, \"%s MPS is %s\",\n-\t\t\tconfig.mps == MLX5_MPW_ENHANCED ? \"enhanced \" : \"\",\n-\t\t\tconfig.mps != MLX5_MPW_DISABLED ? \"enabled\" :\n-\t\t\t\"disabled\");\n-\t\tif (config.cqe_comp && !cqe_comp) {\n-\t\t\tDRV_LOG(WARNING, \"Rx CQE compression isn't supported\");\n-\t\t\tconfig.cqe_comp = 0;\n-\t\t}\n-\t\tconfig.mprq.enabled = config.mprq.enabled && mprq;\n-\t\tif (config.mprq.enabled) {\n-\t\t\tif (config.mprq.stride_num_n > mprq_max_stride_num_n ||\n-\t\t\t    config.mprq.stride_num_n < mprq_min_stride_num_n) {\n-\t\t\t\tconfig.mprq.stride_num_n =\n-\t\t\t\t\tRTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,\n-\t\t\t\t\t\tmprq_min_stride_num_n);\n-\t\t\t\tDRV_LOG(WARNING,\n-\t\t\t\t\t\"the number of strides\"\n-\t\t\t\t\t\" for Multi-Packet RQ is out of range,\"\n-\t\t\t\t\t\" setting default value (%u)\",\n-\t\t\t\t\t1 << config.mprq.stride_num_n);\n-\t\t\t}\n-\t\t\tconfig.mprq.min_stride_size_n = mprq_min_stride_size_n;\n-\t\t\tconfig.mprq.max_stride_size_n = mprq_max_stride_size_n;\n-\t\t}\n-\t\teth_dev = rte_eth_dev_allocate(name);\n+\tconfig.mpls_en = mpls_en;\n+\tif (attr->orig_attr.phys_port_cnt > 1)\n+\t\tsnprintf(name, sizeof(name), \"%s port %u\",\n+\t\t\t dpdk_dev->name, port);\n+\telse\n+\t\tsnprintf(name, sizeof(name), \"%s\", dpdk_dev->name);\n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY) {\n+\t\teth_dev = rte_eth_dev_attach_secondary(name);\n \t\tif (eth_dev == NULL) {\n-\t\t\tDRV_LOG(ERR, \"can not allocate rte ethdev\");\n-\t\t\terr = ENOMEM;\n-\t\t\tgoto port_error;\n+\t\t\tDRV_LOG(ERR, \"can not attach rte ethdev\");\n+\t\t\trte_errno = ENOMEM;\n+\t\t\terr = rte_errno;\n+\t\t\tgoto error;\n \t\t}\n-\t\teth_dev->data->dev_private = priv;\n-\t\tpriv->dev_data = eth_dev->data;\n-\t\teth_dev->data->mac_addrs = priv->mac;\n \t\teth_dev->device = dpdk_dev;\n-\t\teth_dev->device->driver = &mlx5_driver.driver;\n-\t\terr = mlx5_uar_init_primary(eth_dev);\n+\t\teth_dev->dev_ops = &mlx5_dev_sec_ops;\n+\t\terr = mlx5_uar_init_secondary(eth_dev);\n \t\tif (err) {\n \t\t\terr = rte_errno;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\t/* Configure the first MAC address by default. */\n-\t\tif (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {\n-\t\t\tDRV_LOG(ERR,\n-\t\t\t\t\"port %u cannot get MAC address, is mlx5_en\"\n-\t\t\t\t\" loaded? (errno: %s)\",\n-\t\t\t\teth_dev->data->port_id, strerror(rte_errno));\n-\t\t\terr = ENODEV;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\tDRV_LOG(INFO,\n-\t\t\t\"port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x\",\n-\t\t\teth_dev->data->port_id,\n-\t\t\tmac.addr_bytes[0], mac.addr_bytes[1],\n-\t\t\tmac.addr_bytes[2], mac.addr_bytes[3],\n-\t\t\tmac.addr_bytes[4], mac.addr_bytes[5]);\n-#ifndef NDEBUG\n-\t\t{\n-\t\t\tchar ifname[IF_NAMESIZE];\n-\n-\t\t\tif (mlx5_get_ifname(eth_dev, &ifname) == 0)\n-\t\t\t\tDRV_LOG(DEBUG, \"port %u ifname is \\\"%s\\\"\",\n-\t\t\t\t\teth_dev->data->port_id, ifname);\n-\t\t\telse\n-\t\t\t\tDRV_LOG(DEBUG, \"port %u ifname is unknown\",\n-\t\t\t\t\teth_dev->data->port_id);\n+\t\t\tgoto error;\n \t\t}\n-#endif\n-\t\t/* Get actual MTU if possible. */\n-\t\terr = mlx5_get_mtu(eth_dev, &priv->mtu);\n-\t\tif (err) {\n+\t\t/* Receive command fd from primary process */\n+\t\terr = mlx5_socket_connect(eth_dev);\n+\t\tif (err < 0) {\n \t\t\terr = rte_errno;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\tDRV_LOG(DEBUG, \"port %u MTU is %u\", eth_dev->data->port_id,\n-\t\t\tpriv->mtu);\n-\t\t/*\n-\t\t * Initialize burst functions to prevent crashes before link-up.\n-\t\t */\n-\t\teth_dev->rx_pkt_burst = removed_rx_burst;\n-\t\teth_dev->tx_pkt_burst = removed_tx_burst;\n-\t\teth_dev->dev_ops = &mlx5_dev_ops;\n-\t\t/* Register MAC address. */\n-\t\tclaim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));\n-\t\tpriv->nl_socket = -1;\n-\t\tpriv->nl_sn = 0;\n-\t\tif (vf && config.vf_nl_en) {\n-\t\t\tpriv->nl_socket = mlx5_nl_init(RTMGRP_LINK);\n-\t\t\tif (priv->nl_socket < 0)\n-\t\t\t\tpriv->nl_socket = -1;\n-\t\t\tmlx5_nl_mac_addr_sync(eth_dev);\n+\t\t\tgoto error;\n \t\t}\n-\t\tTAILQ_INIT(&priv->flows);\n-\t\tTAILQ_INIT(&priv->ctrl_flows);\n-\t\t/* Hint libmlx5 to use PMD allocator for data plane resources */\n-\t\tstruct mlx5dv_ctx_allocators alctr = {\n-\t\t\t.alloc = &mlx5_alloc_verbs_buf,\n-\t\t\t.free = &mlx5_free_verbs_buf,\n-\t\t\t.data = priv,\n-\t\t};\n-\t\tmlx5_glue->dv_set_context_attr(ctx,\n-\t\t\t\t\t       MLX5DV_CTX_ATTR_BUF_ALLOCATORS,\n-\t\t\t\t\t       (void *)((uintptr_t)&alctr));\n-\t\t/* Bring Ethernet device up. */\n-\t\tDRV_LOG(DEBUG, \"port %u forcing Ethernet interface up\",\n-\t\t\teth_dev->data->port_id);\n-\t\tmlx5_set_link_up(eth_dev);\n-\t\t/*\n-\t\t * Even though the interrupt handler is not installed yet,\n-\t\t * interrupts will still trigger on the asyn_fd from\n-\t\t * Verbs context returned by ibv_open_device().\n-\t\t */\n-\t\tmlx5_link_update(eth_dev, 0);\n-\t\t/* Store device configuration on private structure. */\n-\t\tpriv->config = config;\n-\t\t/* Create drop queue. */\n-\t\terr = mlx5_flow_create_drop_queue(eth_dev);\n+\t\t/* Remap UAR for Tx queues. */\n+\t\terr = mlx5_tx_uar_remap(eth_dev, err);\n \t\tif (err) {\n-\t\t\tDRV_LOG(ERR, \"port %u drop queue allocation failed: %s\",\n-\t\t\t\teth_dev->data->port_id, strerror(rte_errno));\n \t\t\terr = rte_errno;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\t/* Supported Verbs flow priority number detection. */\n-\t\tif (verb_priorities == 0)\n-\t\t\tverb_priorities = mlx5_get_max_verbs_prio(eth_dev);\n-\t\tif (verb_priorities < MLX5_VERBS_FLOW_PRIO_8) {\n-\t\t\tDRV_LOG(ERR, \"port %u wrong Verbs flow priorities: %u\",\n-\t\t\t\teth_dev->data->port_id, verb_priorities);\n-\t\t\terr = ENOTSUP;\n-\t\t\tgoto port_error;\n+\t\t\tgoto error;\n \t\t}\n-\t\tpriv->config.max_verbs_prio = verb_priorities;\n \t\t/*\n-\t\t * Once the device is added to the list of memory event\n-\t\t * callback, its global MR cache table cannot be expanded\n-\t\t * on the fly because of deadlock. If it overflows, lookup\n-\t\t * should be done by searching MR list linearly, which is slow.\n+\t\t * Ethdev pointer is still required as input since\n+\t\t * the primary device is not accessible from the\n+\t\t * secondary process.\n \t\t */\n-\t\terr = mlx5_mr_btree_init(&priv->mr.cache,\n-\t\t\t\t\t MLX5_MR_BTREE_CACHE_N * 2,\n-\t\t\t\t\t eth_dev->device->numa_node);\n-\t\tif (err) {\n-\t\t\terr = rte_errno;\n-\t\t\tgoto port_error;\n-\t\t}\n-\t\t/* Add device to memory callback list. */\n-\t\trte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);\n-\t\tLIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,\n-\t\t\t\t priv, mem_event_cb);\n-\t\trte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);\n-\t\trte_eth_dev_probing_finish(eth_dev);\n+\t\teth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);\n+\t\teth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);\n+\t\tmlx5_glue->close_device(ctx);\n \t\treturn eth_dev;\n-port_error:\n-\t\tif (priv)\n-\t\t\trte_free(priv);\n-\t\tif (pd)\n-\t\t\tclaim_zero(mlx5_glue->dealloc_pd(pd));\n-\t\tif (eth_dev && rte_eal_process_type() == RTE_PROC_PRIMARY)\n-\t\t\trte_eth_dev_release_port(eth_dev);\n \t}\n+\tDRV_LOG(DEBUG, \"using port %u\", port);\n+\t/* Check port status. */\n+\terr = mlx5_glue->query_port(ctx, port, &port_attr);\n+\tif (err) {\n+\t\tDRV_LOG(ERR, \"port query failed: %s\", strerror(err));\n+\t\tgoto error;\n+\t}\n+\tif (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {\n+\t\tDRV_LOG(ERR, \"port %d is not configured in Ethernet mode\",\n+\t\t\tport);\n+\t\terr = EINVAL;\n+\t\tgoto error;\n+\t}\n+\tif (port_attr.state != IBV_PORT_ACTIVE)\n+\t\tDRV_LOG(DEBUG, \"port %d is not active: \\\"%s\\\" (%d)\",\n+\t\t\tport, mlx5_glue->port_state_str(port_attr.state),\n+\t\t\tport_attr.state);\n+\t/* Allocate protection domain. */\n+\tpd = mlx5_glue->alloc_pd(ctx);\n+\tif (pd == NULL) {\n+\t\tDRV_LOG(ERR, \"PD allocation failure\");\n+\t\terr = ENOMEM;\n+\t\tgoto error;\n+\t}\n+\tpriv = rte_zmalloc(\"ethdev private structure\",\n+\t\t\t   sizeof(*priv),\n+\t\t\t   RTE_CACHE_LINE_SIZE);\n+\tif (priv == NULL) {\n+\t\tDRV_LOG(ERR, \"priv allocation failure\");\n+\t\terr = ENOMEM;\n+\t\tgoto error;\n+\t}\n+\tpriv->ctx = ctx;\n+\tstrncpy(priv->ibdev_path, priv->ctx->device->ibdev_path,\n+\t\tsizeof(priv->ibdev_path));\n+\tpriv->device_attr = *attr;\n+\tpriv->port = port;\n+\tpriv->pd = pd;\n+\tpriv->mtu = ETHER_MTU;\n+\terr = mlx5_args(&config, dpdk_dev->devargs);\n+\tif (err) {\n+\t\terr = rte_errno;\n+\t\tDRV_LOG(ERR, \"failed to process device arguments: %s\",\n+\t\t\tstrerror(rte_errno));\n+\t\tgoto error;\n+\t}\n+\tconfig.hw_csum = !!(attr->device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);\n+\tDRV_LOG(DEBUG, \"checksum offloading is %ssupported\",\n+\t\t(config.hw_csum ? \"\" : \"not \"));\n+#ifdef HAVE_IBV_DEVICE_COUNTERS_SET_SUPPORT\n+\tconfig.flow_counter_en = !!attr->max_counter_sets;\n+\tmlx5_glue->describe_counter_set(ctx, 0, &cs_desc);\n+\tDRV_LOG(DEBUG, \"counter type = %d, num of cs = %ld, attributes = %d\",\n+\t\tcs_desc.counter_type, cs_desc.num_of_cs,\n+\t\tcs_desc.attributes);\n+#endif\n+\tconfig.ind_table_max_size =\n+\t\tattr->rss_caps.max_rwq_indirection_table_size;\n+\t/*\n+\t * Remove this check once DPDK supports larger/variable\n+\t * indirection tables.\n+\t */\n+\tif (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)\n+\t\tconfig.ind_table_max_size = ETH_RSS_RETA_SIZE_512;\n+\tDRV_LOG(DEBUG, \"maximum Rx indirection table size is %u\",\n+\t\tconfig.ind_table_max_size);\n+\tconfig.hw_vlan_strip = !!(attr->raw_packet_caps &\n+\t\t\t\t  IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);\n+\tDRV_LOG(DEBUG, \"VLAN stripping is %ssupported\",\n+\t\t(config.hw_vlan_strip ? \"\" : \"not \"));\n+\tconfig.hw_fcs_strip = !!(attr->raw_packet_caps &\n+\t\t\t\t IBV_RAW_PACKET_CAP_SCATTER_FCS);\n+\tDRV_LOG(DEBUG, \"FCS stripping configuration is %ssupported\",\n+\t\t(config.hw_fcs_strip ? \"\" : \"not \"));\n+#ifdef HAVE_IBV_WQ_FLAG_RX_END_PADDING\n+\tconfig.hw_padding = !!attr->rx_pad_end_addr_align;\n+#endif\n+\tDRV_LOG(DEBUG, \"hardware Rx end alignment padding is %ssupported\",\n+\t\t(config.hw_padding ? \"\" : \"not \"));\n+\tconfig.tso = (attr->tso_caps.max_tso > 0 &&\n+\t\t      (attr->tso_caps.supported_qpts &\n+\t\t       (1 << IBV_QPT_RAW_PACKET)));\n+\tif (config.tso)\n+\t\tconfig.tso_max_payload_sz = attr->tso_caps.max_tso;\n+\tif (config.mps && !mps) {\n+\t\tDRV_LOG(ERR,\n+\t\t\t\"multi-packet send not supported on this device\"\n+\t\t\t\" (\" MLX5_TXQ_MPW_EN \")\");\n+\t\terr = ENOTSUP;\n+\t\tgoto error;\n+\t}\n+\tDRV_LOG(INFO, \"%sMPS is %s\",\n+\t\tconfig.mps == MLX5_MPW_ENHANCED ? \"enhanced \" : \"\",\n+\t\tconfig.mps != MLX5_MPW_DISABLED ? \"enabled\" : \"disabled\");\n+\tif (config.cqe_comp && !cqe_comp) {\n+\t\tDRV_LOG(WARNING, \"Rx CQE compression isn't supported\");\n+\t\tconfig.cqe_comp = 0;\n+\t}\n+\tconfig.mprq.enabled = config.mprq.enabled && mprq;\n+\tif (config.mprq.enabled) {\n+\t\tif (config.mprq.stride_num_n > mprq_max_stride_num_n ||\n+\t\t    config.mprq.stride_num_n < mprq_min_stride_num_n) {\n+\t\t\tconfig.mprq.stride_num_n =\n+\t\t\t\tRTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,\n+\t\t\t\t\tmprq_min_stride_num_n);\n+\t\t\tDRV_LOG(WARNING,\n+\t\t\t\t\"the number of strides\"\n+\t\t\t\t\" for Multi-Packet RQ is out of range,\"\n+\t\t\t\t\" setting default value (%u)\",\n+\t\t\t\t1 << config.mprq.stride_num_n);\n+\t\t}\n+\t\tconfig.mprq.min_stride_size_n = mprq_min_stride_size_n;\n+\t\tconfig.mprq.max_stride_size_n = mprq_max_stride_size_n;\n+\t}\n+\teth_dev = rte_eth_dev_allocate(name);\n+\tif (eth_dev == NULL) {\n+\t\tDRV_LOG(ERR, \"can not allocate rte ethdev\");\n+\t\terr = ENOMEM;\n+\t\tgoto error;\n+\t}\n+\teth_dev->data->dev_private = priv;\n+\tpriv->dev_data = eth_dev->data;\n+\teth_dev->data->mac_addrs = priv->mac;\n+\teth_dev->device = dpdk_dev;\n+\teth_dev->device->driver = &mlx5_driver.driver;\n+\terr = mlx5_uar_init_primary(eth_dev);\n+\tif (err) {\n+\t\terr = rte_errno;\n+\t\tgoto error;\n+\t}\n+\t/* Configure the first MAC address by default. */\n+\tif (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {\n+\t\tDRV_LOG(ERR,\n+\t\t\t\"port %u cannot get MAC address, is mlx5_en\"\n+\t\t\t\" loaded? (errno: %s)\",\n+\t\t\teth_dev->data->port_id, strerror(rte_errno));\n+\t\terr = ENODEV;\n+\t\tgoto error;\n+\t}\n+\tDRV_LOG(INFO,\n+\t\t\"port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x\",\n+\t\teth_dev->data->port_id,\n+\t\tmac.addr_bytes[0], mac.addr_bytes[1],\n+\t\tmac.addr_bytes[2], mac.addr_bytes[3],\n+\t\tmac.addr_bytes[4], mac.addr_bytes[5]);\n+#ifndef NDEBUG\n+\t{\n+\t\tchar ifname[IF_NAMESIZE];\n+\n+\t\tif (mlx5_get_ifname(eth_dev, &ifname) == 0)\n+\t\t\tDRV_LOG(DEBUG, \"port %u ifname is \\\"%s\\\"\",\n+\t\t\t\teth_dev->data->port_id, ifname);\n+\t\telse\n+\t\t\tDRV_LOG(DEBUG, \"port %u ifname is unknown\",\n+\t\t\t\teth_dev->data->port_id);\n+\t}\n+#endif\n+\t/* Get actual MTU if possible. */\n+\terr = mlx5_get_mtu(eth_dev, &priv->mtu);\n+\tif (err) {\n+\t\terr = rte_errno;\n+\t\tgoto error;\n+\t}\n+\tDRV_LOG(DEBUG, \"port %u MTU is %u\", eth_dev->data->port_id,\n+\t\tpriv->mtu);\n+\t/* Initialize burst functions to prevent crashes before link-up. */\n+\teth_dev->rx_pkt_burst = removed_rx_burst;\n+\teth_dev->tx_pkt_burst = removed_tx_burst;\n+\teth_dev->dev_ops = &mlx5_dev_ops;\n+\t/* Register MAC address. */\n+\tclaim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));\n+\tpriv->nl_socket = -1;\n+\tpriv->nl_sn = 0;\n+\tif (vf && config.vf_nl_en) {\n+\t\tpriv->nl_socket = mlx5_nl_init(RTMGRP_LINK);\n+\t\tif (priv->nl_socket < 0)\n+\t\t\tpriv->nl_socket = -1;\n+\t\tmlx5_nl_mac_addr_sync(eth_dev);\n+\t}\n+\tTAILQ_INIT(&priv->flows);\n+\tTAILQ_INIT(&priv->ctrl_flows);\n+\t/* Hint libmlx5 to use PMD allocator for data plane resources */\n+\tstruct mlx5dv_ctx_allocators alctr = {\n+\t\t.alloc = &mlx5_alloc_verbs_buf,\n+\t\t.free = &mlx5_free_verbs_buf,\n+\t\t.data = priv,\n+\t};\n+\tmlx5_glue->dv_set_context_attr(ctx, MLX5DV_CTX_ATTR_BUF_ALLOCATORS,\n+\t\t\t\t       (void *)((uintptr_t)&alctr));\n+\t/* Bring Ethernet device up. */\n+\tDRV_LOG(DEBUG, \"port %u forcing Ethernet interface up\",\n+\t\teth_dev->data->port_id);\n+\tmlx5_set_link_up(eth_dev);\n+\t/*\n+\t * Even though the interrupt handler is not installed yet,\n+\t * interrupts will still trigger on the asyn_fd from\n+\t * Verbs context returned by ibv_open_device().\n+\t */\n+\tmlx5_link_update(eth_dev, 0);\n+\t/* Store device configuration on private structure. */\n+\tpriv->config = config;\n+\t/* Create drop queue. */\n+\terr = mlx5_flow_create_drop_queue(eth_dev);\n+\tif (err) {\n+\t\tDRV_LOG(ERR, \"port %u drop queue allocation failed: %s\",\n+\t\t\teth_dev->data->port_id, strerror(rte_errno));\n+\t\terr = rte_errno;\n+\t\tgoto error;\n+\t}\n+\t/* Supported Verbs flow priority number detection. */\n+\tif (verb_priorities == 0)\n+\t\tverb_priorities = mlx5_get_max_verbs_prio(eth_dev);\n+\tif (verb_priorities < MLX5_VERBS_FLOW_PRIO_8) {\n+\t\tDRV_LOG(ERR, \"port %u wrong Verbs flow priorities: %u\",\n+\t\t\teth_dev->data->port_id, verb_priorities);\n+\t\terr = ENOTSUP;\n+\t\tgoto error;\n+\t}\n+\tpriv->config.max_verbs_prio = verb_priorities;\n+\t/*\n+\t * Once the device is added to the list of memory event\n+\t * callback, its global MR cache table cannot be expanded\n+\t * on the fly because of deadlock. If it overflows, lookup\n+\t * should be done by searching MR list linearly, which is slow.\n+\t */\n+\terr = mlx5_mr_btree_init(&priv->mr.cache,\n+\t\t\t\t MLX5_MR_BTREE_CACHE_N * 2,\n+\t\t\t\t eth_dev->device->numa_node);\n+\tif (err) {\n+\t\terr = rte_errno;\n+\t\tgoto error;\n+\t}\n+\t/* Add device to memory callback list. */\n+\trte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);\n+\tLIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,\n+\t\t\t priv, mem_event_cb);\n+\trte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);\n+\treturn eth_dev;\n error:\n+\tif (priv)\n+\t\trte_free(priv);\n+\tif (pd)\n+\t\tclaim_zero(mlx5_glue->dealloc_pd(pd));\n+\tif (eth_dev)\n+\t\trte_eth_dev_release_port(eth_dev);\n \tif (ctx)\n \t\tclaim_zero(mlx5_glue->close_device(ctx));\n \tassert(err > 0);\n",
    "prefixes": [
        "v2",
        "4/7"
    ]
}